MAINTAINERS: Add myself as mep maintainer.

[toplevel]

	* MAINTAINERS: Add myself as mep maintainer.

[gcc]

	Add MeP port.
	* config.gcc: Add mep support.
	* recog.c: Resurrect validate_replace_rtx_subexp().
	* recog.h: Likewise.
	* config/mep/: Add new port:
	* config/mep/constraints.md: New file.
	* config/mep/default.h: New file.
	* config/mep/intrinsics.h: New file.
	* config/mep/intrinsics.md: New file.
	* config/mep/ivc2-template.h: New file.
	* config/mep/mep-c5.cpu: New file.
	* config/mep/mep-core.cpu: New file.
	* config/mep/mep-default.cpu: New file.
	* config/mep/mep-ext-cop.cpu: New file.
	* config/mep/mep-intrin.h: New file.
	* config/mep/mep-ivc2.cpu: New file.
	* config/mep/mep-lib1.asm: New file.
	* config/mep/mep-lib2.c: New file.
	* config/mep/mep-pragma.c: New file.
	* config/mep/mep-protos.h: New file.
	* config/mep/mep-tramp.c: New file.
	* config/mep/mep.c: New file.
	* config/mep/mep.cpu: New file.
	* config/mep/mep.h: New file.
	* config/mep/mep.md: New file.
	* config/mep/mep.opt: New file.
	* config/mep/predicates.md: New file.
	* config/mep/t-mep: New file.

[gcc/testsuite]

	Add MeP port.
	* lib/target-supports.exp: Add mep support (no profiling).

[libgcc]

	Add MeP port.
	* config.host: Add mep support.

[libstdc++-v3]

	Add MeP port.
	* configure.host: Add mep support.

From-SVN: r148890
This commit is contained in:
DJ Delorie 2009-06-24 00:16:25 -04:00 committed by DJ Delorie
parent 00020c1638
commit 7acf4da6f9
35 changed files with 64071 additions and 0 deletions

View File

@ -1,3 +1,7 @@
2009-06-23 DJ Delorie <dj@redhat.com>
* MAINTAINERS: Add myself as mep maintainer.
2009-06-23 Ian Lance Taylor <iant@google.com>
* configure.ac: Add --enable-build-with-cxx. When set, add c++ to

View File

@ -69,6 +69,7 @@ m68k port (?) Jeff Law law@redhat.com
m68k port Andreas Schwab schwab@linux-m68k.org
m68k-motorola-sysv port Philippe De Muyter phdm@macqel.be
mcore port Nick Clifton nickc@redhat.com
mep port DJ Delorie dj@redhat.com
mips port Eric Christopher echristo@apple.com
mips port Richard Sandiford rdsandiford@googlemail.com
mmix port Hans-Peter Nilsson hp@bitrange.com

View File

@ -1,3 +1,34 @@
2009-06-23 DJ Delorie <dj@redhat.com>
Add MeP port.
* config.gcc: Add mep support.
* recog.c: Resurrect validate_replace_rtx_subexp().
* recog.h: Likewise.
* config/mep/: Add new port:
* config/mep/constraints.md: New file.
* config/mep/default.h: New file.
* config/mep/intrinsics.h: New file.
* config/mep/intrinsics.md: New file.
* config/mep/ivc2-template.h: New file.
* config/mep/mep-c5.cpu: New file.
* config/mep/mep-core.cpu: New file.
* config/mep/mep-default.cpu: New file.
* config/mep/mep-ext-cop.cpu: New file.
* config/mep/mep-intrin.h: New file.
* config/mep/mep-ivc2.cpu: New file.
* config/mep/mep-lib1.asm: New file.
* config/mep/mep-lib2.c: New file.
* config/mep/mep-pragma.c: New file.
* config/mep/mep-protos.h: New file.
* config/mep/mep-tramp.c: New file.
* config/mep/mep.c: New file.
* config/mep/mep.cpu: New file.
* config/mep/mep.h: New file.
* config/mep/mep.md: New file.
* config/mep/mep.opt: New file.
* config/mep/predicates.md: New file.
* config/mep/t-mep: New file.
2009-06-23 Ian Lance Taylor <iant@google.com>
* configure.ac: Invoke AC_PROG_CXX. Separate C specific warnings

View File

@ -1562,6 +1562,18 @@ mcore-*-pe*)
inhibit_libc=true
use_gcc_stdint=wrap
;;
mep-*-*)
tm_file="dbxelf.h elfos.h svr4.h ${tm_file}"
tmake_file=mep/t-mep
extra_parts="crtbegin.o crtend.o"
c_target_objs="mep-pragma.o"
cxx_target_objs="mep-pragma.o"
if test -d "${srcdir}/../newlib/libc/include" &&
test "x$with_headers" = x; then
with_headers=yes
fi
use_gcc_stdint=wrap
;;
mips-sgi-irix[56]*)
tm_file="elfos.h ${tm_file} mips/iris.h"
tmake_file="mips/t-iris mips/t-slibgcc-irix"

View File

@ -0,0 +1,162 @@
;; Toshiba Media Processor Machine constraints
;; Copyright (C) 2009 Free Software Foundation, Inc.
;; Contributed by Red Hat Inc.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
;; License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
(define_register_constraint "a" "SP_REGS"
"The $sp register.")
(define_register_constraint "b" "TP_REGS"
"The $tp register.")
(define_register_constraint "c" "CONTROL_REGS"
"Any control register.")
(define_register_constraint "d" "HILO_REGS"
"Either the $hi or the $lo register.")
(define_register_constraint "em" "LOADABLE_CR_REGS"
"Coprocessor registers that can be directly loaded ($c0-$c15).")
(define_register_constraint "ex" "mep_have_copro_copro_moves_p ? CR_REGS : NO_REGS"
"Coprocessor registers that can be moved to each other.")
(define_register_constraint "er" "mep_have_core_copro_moves_p ? CR_REGS : NO_REGS"
"Coprocessor registers that can be moved to core registers.")
(define_register_constraint "h" "HI_REGS"
"The $hi register.")
(define_register_constraint "j" "RPC_REGS"
"The $rpc register.")
(define_register_constraint "l" "LO_REGS"
"The $lo register.")
(define_register_constraint "t" "TPREL_REGS"
"Registers which can be used in $tp-relative addressing.")
(define_register_constraint "v" "GP_REGS"
"The $gp register.")
(define_register_constraint "x" "CR_REGS"
"The coprocessor registers.")
(define_register_constraint "y" "CCR_REGS"
"The coprocessor control registers.")
(define_register_constraint "z" "R0_REGS"
"The $0 register.")
(define_register_constraint "A" "USER0_REGS"
"User-defined register set A.")
(define_register_constraint "B" "USER1_REGS"
"User-defined register set B.")
(define_register_constraint "C" "USER2_REGS"
"User-defined register set C.")
(define_register_constraint "D" "USER3_REGS"
"User-defined register set D.")
(define_constraint "I"
"Offsets for $gp-rel addressing."
(and (match_code "const_int")
(match_test "ival >= -32768 && ival < 32768")))
(define_constraint "J"
"Constants that can be used directly with boolean insns."
(and (match_code "const_int")
(match_test "ival >= 0 && ival < 65536")))
(define_constraint "K"
"Constants that can be moved directly to registers."
(and (match_code "const_int")
(match_test "ival >= 0 && ival < 0x01000000")))
(define_constraint "L"
"Small constants that can be added to registers."
(and (match_code "const_int")
(match_test "ival >= -32 && ival < 32")))
(define_constraint "M"
"Long shift counts."
(and (match_code "const_int")
(match_test "ival >= 0 && ival < 32")))
(define_constraint "N"
"Small constants that can be compared to registers."
(and (match_code "const_int")
(match_test "ival >= 0 && ival < 16")))
(define_constraint "O"
"Constants that can be loaded into the top half of registers."
(and (match_code "const_int")
(match_test "!(ival & 0xffff) && ival >= -2147483647-1 && ival <= 2147483647")))
(define_constraint "S"
"Signed 8-bit immediates."
(and (match_code "const_int")
(match_test "ival >= -128 && ival < 127")))
;; This must only be used with mep_call_address_operand() as the predicate.
(define_constraint "R"
"@internal
Near symbols that can be used as addresses for CALL."
(not (match_code "reg")))
(define_constraint "T"
"Symbols encoded for $tp-rel or $gp-rel addressing."
(ior (ior
(and (match_code "unspec")
(match_code "symbol_ref" "a"))
(and (match_code "const")
(and (match_code "unspec" "0")
(match_code "symbol_ref" "0a"))))
(and (match_code "const")
(and (match_code "plus" "0")
(and (match_code "unspec" "00")
(match_code "symbol_ref" "00a"))))))
(define_constraint "U"
"Non-constant addresses for loading/saving coprocessor registers."
(and (match_code "mem")
(match_test "! CONSTANT_P (XEXP (op, 0))")))
(define_constraint "W"
"The top half of a symbol's value."
(and (match_code "high")
(match_code "symbol_ref" "0")))
(define_constraint "Y"
"A register indirect address without offset."
(and (match_code "mem")
(match_code "reg" "0")))
(define_constraint "Z"
"Symbolic references to the control bus."
(and (and (match_code "mem")
(match_code "symbol_ref" "0"))
(match_test "mep_section_tag (op) == 'c'")))

10
gcc/config/mep/default.h Normal file
View File

@ -0,0 +1,10 @@
/* Header created by MeP-Integrator */
#undef __section
#define __section(_secname) __attribute__((section(#_secname)))
#undef mep_nop
#define mep_nop() __asm__ volatile ("nop")
#pragma GCC coprocessor available $c0...$c31
#pragma GCC coprocessor call_saved $c6...$c7
#include <intrinsics.h>

626
gcc/config/mep/intrinsics.h Normal file
View File

@ -0,0 +1,626 @@
/* DO NOT EDIT: This file is automatically generated by CGEN.
Any changes you make will be discarded when it is next regenerated.
*/
/* GCC defines these internally, as follows...
#if __MEP_CONFIG_CP_DATA_BUS_WIDTH == 64
typedef long long cp_data_bus_int;
#else
typedef long cp_data_bus_int;
#endif
typedef char cp_v8qi __attribute__((vector_size(8)));
typedef unsigned char cp_v8uqi __attribute__((vector_size(8)));
typedef short cp_v4hi __attribute__((vector_size(8)));
typedef unsigned short cp_v4uhi __attribute__((vector_size(8)));
typedef int cp_v2si __attribute__((vector_size(8)));
typedef unsigned int cp_v2usi __attribute__((vector_size(8)));
*/
// default
void mep_cpfmadila1_h (cp_v4hi, cp_v4hi, long, long);
void mep_cpfmadiua1_h (cp_v4hi, cp_v4hi, long, long);
void mep_cpfmadia1_b (cp_v8qi, cp_v8qi, long, long);
void mep_cpfmadia1u_b (cp_v8uqi, cp_v8uqi, long, long);
void mep_cpfmulila1_h (cp_v4hi, cp_v4hi, long, long);
void mep_cpfmuliua1_h (cp_v4hi, cp_v4hi, long, long);
void mep_cpfmulia1_b (cp_v8qi, cp_v8qi, long, long);
void mep_cpfmulia1u_b (cp_v8uqi, cp_v8uqi, long, long);
void mep_cpamadila1_h (cp_v4hi, cp_v4hi, long);
void mep_cpamadiua1_h (cp_v4hi, cp_v4hi, long);
void mep_cpamadia1_b (cp_v8qi, cp_v8qi, long);
void mep_cpamadia1u_b (cp_v8uqi, cp_v8uqi, long);
void mep_cpamulila1_h (cp_v4hi, cp_v4hi, long);
void mep_cpamuliua1_h (cp_v4hi, cp_v4hi, long);
void mep_cpamulia1_b (cp_v8qi, cp_v8qi, long);
void mep_cpamulia1u_b (cp_v8uqi, cp_v8uqi, long);
void mep_cpfmadila1s1_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmadiua1s1_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmadia1s1_b (cp_v8qi, cp_v8qi, long);
void mep_cpfmadia1s1u_b (cp_v8uqi, cp_v8uqi, long);
void mep_cpfmulila1s1_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmuliua1s1_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmulia1s1_b (cp_v8qi, cp_v8qi, long);
void mep_cpfmulia1s1u_b (cp_v8uqi, cp_v8uqi, long);
void mep_cpfmadila1s0_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmadiua1s0_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmadia1s0_b (cp_v8qi, cp_v8qi, long);
void mep_cpfmadia1s0u_b (cp_v8uqi, cp_v8uqi, long);
void mep_cpfmulila1s0_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmuliua1s0_h (cp_v4hi, cp_v4hi, long);
void mep_cpfmulia1s0_b (cp_v8qi, cp_v8qi, long);
void mep_cpfmulia1s0u_b (cp_v8uqi, cp_v8uqi, long);
void mep_cpacswp (); // volatile
void mep_cpaccpa1 ();
void mep_cpacsuma1 ();
void mep_c1nop (); // volatile
void mep_cpfacla0s1_h (cp_v4hi, cp_v4hi);
void mep_cpfacua0s1_h (cp_v4hi, cp_v4hi);
void mep_cpfaca0s1_b (cp_v8qi, cp_v8qi);
void mep_cpfaca0s1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpfsftbla0s1_h (cp_v4hi, cp_v4hi);
void mep_cpfsftbua0s1_h (cp_v4hi, cp_v4hi);
void mep_cpfsftba0s1_b (cp_v8qi, cp_v8qi);
void mep_cpfsftba0s1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpfacla0s0_h (cp_v4hi, cp_v4hi);
void mep_cpfacua0s0_h (cp_v4hi, cp_v4hi);
void mep_cpfaca0s0_b (cp_v8qi, cp_v8qi);
void mep_cpfaca0s0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpfsftbla0s0_h (cp_v4hi, cp_v4hi);
void mep_cpfsftbua0s0_h (cp_v4hi, cp_v4hi);
void mep_cpfsftba0s0_b (cp_v8qi, cp_v8qi);
void mep_cpfsftba0s0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpsllia0 (long);
void mep_cpsraia0 (long);
void mep_cpsrlia0 (long);
void mep_cpslla0 (cp_data_bus_int);
void mep_cpsraa0 (cp_data_bus_int);
void mep_cpsrla0 (cp_data_bus_int);
void mep_cpaccpa0 ();
void mep_cpacsuma0 ();
cp_v2si mep_cpmovhla0_w ();
cp_v2si mep_cpmovhua0_w ();
cp_v2si mep_cppackla0_w ();
cp_v2si mep_cppackua0_w ();
cp_v4hi mep_cppackla0_h ();
cp_v4hi mep_cppackua0_h ();
cp_v8qi mep_cppacka0_b ();
cp_v8uqi mep_cppacka0u_b ();
cp_v2si mep_cpmovlla0_w ();
cp_v2si mep_cpmovlua0_w ();
cp_v2si mep_cpmovula0_w ();
cp_v2si mep_cpmovuua0_w ();
cp_v4hi mep_cpmovla0_h ();
cp_v4hi mep_cpmovua0_h ();
cp_v8qi mep_cpmova0_b ();
void mep_cpsetla0_w (cp_v2si, cp_v2si);
void mep_cpsetua0_w (cp_v2si, cp_v2si);
void mep_cpseta0_h (cp_v4hi, cp_v4hi);
void mep_cpsadla0_h (cp_v4hi, cp_v4hi);
void mep_cpsadua0_h (cp_v4hi, cp_v4hi);
void mep_cpsada0_b (cp_v8qi, cp_v8qi);
void mep_cpsada0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpabsla0_h (cp_v4hi, cp_v4hi);
void mep_cpabsua0_h (cp_v4hi, cp_v4hi);
void mep_cpabsa0_b (cp_v8qi, cp_v8qi);
void mep_cpabsa0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpsubacla0_h (cp_v4hi, cp_v4hi);
void mep_cpsubacua0_h (cp_v4hi, cp_v4hi);
void mep_cpsubaca0_b (cp_v8qi, cp_v8qi);
void mep_cpsubaca0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpsubla0_h (cp_v4hi, cp_v4hi);
void mep_cpsubua0_h (cp_v4hi, cp_v4hi);
void mep_cpsuba0_b (cp_v8qi, cp_v8qi);
void mep_cpsuba0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpaddacla0_h (cp_v4hi, cp_v4hi);
void mep_cpaddacua0_h (cp_v4hi, cp_v4hi);
void mep_cpaddaca0_b (cp_v8qi, cp_v8qi);
void mep_cpaddaca0u_b (cp_v8uqi, cp_v8uqi);
void mep_cpaddla0_h (cp_v4hi, cp_v4hi);
void mep_cpaddua0_h (cp_v4hi, cp_v4hi);
void mep_cpadda0_b (cp_v8qi, cp_v8qi);
void mep_cpadda0u_b (cp_v8uqi, cp_v8uqi);
void mep_c0nop (); // volatile
void mep_cpsmsbslla1_w (cp_v2si, cp_v2si);
void mep_cpsmsbslua1_w (cp_v2si, cp_v2si);
void mep_cpsmsbslla1_h (cp_v4hi, cp_v4hi);
void mep_cpsmsbslua1_h (cp_v4hi, cp_v4hi);
void mep_cpsmadslla1_w (cp_v2si, cp_v2si);
void mep_cpsmadslua1_w (cp_v2si, cp_v2si);
void mep_cpsmadslla1_h (cp_v4hi, cp_v4hi);
void mep_cpsmadslua1_h (cp_v4hi, cp_v4hi);
void mep_cpmulslla1_w (cp_v2si, cp_v2si);
void mep_cpmulslua1_w (cp_v2si, cp_v2si);
void mep_cpmulslla1_h (cp_v4hi, cp_v4hi);
void mep_cpmulslua1_h (cp_v4hi, cp_v4hi);
void mep_cpsmsbla1_w (cp_v2si, cp_v2si);
void mep_cpsmsbua1_w (cp_v2si, cp_v2si);
void mep_cpsmsbla1_h (cp_v4hi, cp_v4hi);
void mep_cpsmsbua1_h (cp_v4hi, cp_v4hi);
void mep_cpsmadla1_w (cp_v2si, cp_v2si);
void mep_cpsmadua1_w (cp_v2si, cp_v2si);
void mep_cpsmadla1_h (cp_v4hi, cp_v4hi);
void mep_cpsmadua1_h (cp_v4hi, cp_v4hi);
void mep_cpmsbla1_w (cp_v2si, cp_v2si);
void mep_cpmsbua1_w (cp_v2si, cp_v2si);
void mep_cpmsbla1u_w (cp_v2usi, cp_v2usi);
void mep_cpmsbua1u_w (cp_v2usi, cp_v2usi);
void mep_cpmsbla1_h (cp_v4hi, cp_v4hi);
void mep_cpmsbua1_h (cp_v4hi, cp_v4hi);
void mep_cpmadla1_w (cp_v2si, cp_v2si);
void mep_cpmadua1_w (cp_v2si, cp_v2si);
void mep_cpmadla1u_w (cp_v2usi, cp_v2usi);
void mep_cpmadua1u_w (cp_v2usi, cp_v2usi);
void mep_cpmadla1_h (cp_v4hi, cp_v4hi);
void mep_cpmadua1_h (cp_v4hi, cp_v4hi);
void mep_cpmada1_b (cp_v8qi, cp_v8qi);
void mep_cpmada1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpmulla1_w (cp_v2si, cp_v2si);
void mep_cpmulua1_w (cp_v2si, cp_v2si);
void mep_cpmulla1u_w (cp_v2usi, cp_v2usi);
void mep_cpmulua1u_w (cp_v2usi, cp_v2usi);
void mep_cpmulla1_h (cp_v4hi, cp_v4hi);
void mep_cpmulua1_h (cp_v4hi, cp_v4hi);
void mep_cpmula1_b (cp_v8qi, cp_v8qi);
void mep_cpmula1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpssda1_b (cp_v8qi, cp_v8qi);
void mep_cpssda1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpssqa1_b (cp_v8qi, cp_v8qi);
void mep_cpssqa1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpsllia1 (long);
void mep_cpsraia1 (long);
void mep_cpsrlia1 (long);
void mep_cpslla1 (cp_data_bus_int);
void mep_cpsraa1 (cp_data_bus_int);
void mep_cpsrla1 (cp_data_bus_int);
cp_v2si mep_cpmovhla1_w ();
cp_v2si mep_cpmovhua1_w ();
cp_v2si mep_cppackla1_w ();
cp_v2si mep_cppackua1_w ();
cp_v4hi mep_cppackla1_h ();
cp_v4hi mep_cppackua1_h ();
cp_v8qi mep_cppacka1_b ();
cp_v8uqi mep_cppacka1u_b ();
cp_v2si mep_cpmovlla1_w ();
cp_v2si mep_cpmovlua1_w ();
cp_v2si mep_cpmovula1_w ();
cp_v2si mep_cpmovuua1_w ();
cp_v4hi mep_cpmovla1_h ();
cp_v4hi mep_cpmovua1_h ();
cp_v8qi mep_cpmova1_b ();
void mep_cpsetla1_w (cp_v2si, cp_v2si);
void mep_cpsetua1_w (cp_v2si, cp_v2si);
void mep_cpseta1_h (cp_v4hi, cp_v4hi);
void mep_cpsadla1_h (cp_v4hi, cp_v4hi);
void mep_cpsadua1_h (cp_v4hi, cp_v4hi);
void mep_cpsada1_b (cp_v8qi, cp_v8qi);
void mep_cpsada1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpabsla1_h (cp_v4hi, cp_v4hi);
void mep_cpabsua1_h (cp_v4hi, cp_v4hi);
void mep_cpabsa1_b (cp_v8qi, cp_v8qi);
void mep_cpabsa1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpsubacla1_h (cp_v4hi, cp_v4hi);
void mep_cpsubacua1_h (cp_v4hi, cp_v4hi);
void mep_cpsubaca1_b (cp_v8qi, cp_v8qi);
void mep_cpsubaca1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpsubla1_h (cp_v4hi, cp_v4hi);
void mep_cpsubua1_h (cp_v4hi, cp_v4hi);
void mep_cpsuba1_b (cp_v8qi, cp_v8qi);
void mep_cpsuba1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpaddacla1_h (cp_v4hi, cp_v4hi);
void mep_cpaddacua1_h (cp_v4hi, cp_v4hi);
void mep_cpaddaca1_b (cp_v8qi, cp_v8qi);
void mep_cpaddaca1u_b (cp_v8uqi, cp_v8uqi);
void mep_cpaddla1_h (cp_v4hi, cp_v4hi);
void mep_cpaddua1_h (cp_v4hi, cp_v4hi);
void mep_cpadda1_b (cp_v8qi, cp_v8qi);
void mep_cpadda1u_b (cp_v8uqi, cp_v8uqi);
cp_data_bus_int mep_cdmovi (long);
cp_data_bus_int mep_cdmoviu (long);
cp_v2si mep_cpmovi_w (long);
cp_v2usi mep_cpmoviu_w (long);
cp_v4hi mep_cpmovi_h (long);
cp_v4uhi mep_cpmoviu_h (long);
cp_v8qi mep_cpmovi_b (long);
cp_data_bus_int mep_cdclipi3 (cp_data_bus_int, long);
cp_data_bus_int mep_cdclipiu3 (cp_data_bus_int, long);
cp_v2si mep_cpclipi3_w (cp_v2si, long);
cp_v2si mep_cpclipiu3_w (cp_v2si, long);
cp_v2si mep_cpslai3_w (cp_v2si, long);
cp_v4hi mep_cpslai3_h (cp_v4hi, long);
cp_data_bus_int mep_cdslli3 (cp_data_bus_int, long);
cp_v2si mep_cpslli3_w (cp_v2si, long);
cp_v4hi mep_cpslli3_h (cp_v4hi, long);
cp_v8qi mep_cpslli3_b (cp_v8qi, long);
cp_data_bus_int mep_cdsrai3 (cp_data_bus_int, long);
cp_v2si mep_cpsrai3_w (cp_v2si, long);
cp_v4hi mep_cpsrai3_h (cp_v4hi, long);
cp_v8qi mep_cpsrai3_b (cp_v8qi, long);
cp_data_bus_int mep_cdsrli3 (cp_data_bus_int, long);
cp_v2si mep_cpsrli3_w (cp_v2si, long);
cp_v4hi mep_cpsrli3_h (cp_v4hi, long);
cp_v8qi mep_cpsrli3_b (cp_v8qi, long);
void mep_cpocmpge_w (cp_v2si, cp_v2si); // volatile
void mep_cpocmpgeu_w (cp_v2usi, cp_v2usi); // volatile
void mep_cpocmpge_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpocmpge_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpocmpgeu_b (cp_v8uqi, cp_v8uqi); // volatile
void mep_cpocmpgt_w (cp_v2si, cp_v2si); // volatile
void mep_cpocmpgtu_w (cp_v2usi, cp_v2usi); // volatile
void mep_cpocmpgt_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpocmpgt_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpocmpgtu_b (cp_v8uqi, cp_v8uqi); // volatile
void mep_cpocmpne_w (cp_v2si, cp_v2si); // volatile
void mep_cpocmpne_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpocmpne_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpocmpeq_w (cp_v2si, cp_v2si); // volatile
void mep_cpocmpeq_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpocmpeq_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpacmpge_w (cp_v2si, cp_v2si); // volatile
void mep_cpacmpgeu_w (cp_v2usi, cp_v2usi); // volatile
void mep_cpacmpge_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpacmpge_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpacmpgeu_b (cp_v8uqi, cp_v8uqi); // volatile
void mep_cpacmpgt_w (cp_v2si, cp_v2si); // volatile
void mep_cpacmpgtu_w (cp_v2usi, cp_v2usi); // volatile
void mep_cpacmpgt_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpacmpgt_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpacmpgtu_b (cp_v8uqi, cp_v8uqi); // volatile
void mep_cpacmpne_w (cp_v2si, cp_v2si); // volatile
void mep_cpacmpne_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpacmpne_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpacmpeq_w (cp_v2si, cp_v2si); // volatile
void mep_cpacmpeq_h (cp_v4hi, cp_v4hi); // volatile
void mep_cpacmpeq_b (cp_v8qi, cp_v8qi); // volatile
void mep_cpcmpge_w (cp_v2si, cp_v2si);
void mep_cpcmpgeu_w (cp_v2usi, cp_v2usi);
void mep_cpcmpge_h (cp_v4hi, cp_v4hi);
void mep_cpcmpge_b (cp_v8qi, cp_v8qi);
void mep_cpcmpgeu_b (cp_v8uqi, cp_v8uqi);
void mep_cpcmpgt_w (cp_v2si, cp_v2si);
void mep_cpcmpgtu_w (cp_v2usi, cp_v2usi);
void mep_cpcmpgt_h (cp_v4hi, cp_v4hi);
void mep_cpcmpgt_b (cp_v8qi, cp_v8qi);
void mep_cpcmpgtu_b (cp_v8uqi, cp_v8uqi);
void mep_cpcmpne_w (cp_v2si, cp_v2si);
void mep_cpcmpne_h (cp_v4hi, cp_v4hi);
void mep_cpcmpne_b (cp_v8qi, cp_v8qi);
void mep_cpcmpeq_w (cp_v2si, cp_v2si);
void mep_cpcmpeq_h (cp_v4hi, cp_v4hi);
void mep_cpcmpeq_b (cp_v8qi, cp_v8qi);
void mep_cpcmpeqz_b (cp_v8qi, cp_v8qi);
cp_data_bus_int mep_cdcastw (cp_data_bus_int);
cp_data_bus_int mep_cdcastuw (cp_data_bus_int);
cp_v2si mep_cpcasth_w (cp_v2si);
cp_v2si mep_cpcastuh_w (cp_v2si);
cp_v2si mep_cpcastb_w (cp_v2si);
cp_v2si mep_cpcastub_w (cp_v2si);
cp_v4hi mep_cpcastb_h (cp_v4hi);
cp_v4hi mep_cpcastub_h (cp_v4hi);
cp_v4hi mep_cpextl_h (cp_v4hi);
cp_v4uhi mep_cpextlu_h (cp_v4uhi);
cp_v8qi mep_cpextl_b (cp_v8qi);
cp_v8uqi mep_cpextlu_b (cp_v8uqi);
cp_v4uhi mep_cpextu_h (cp_v4uhi);
cp_v4uhi mep_cpextuu_h (cp_v4uhi);
cp_v8uqi mep_cpextu_b (cp_v8uqi);
cp_v8uqi mep_cpextuu_b (cp_v8uqi);
cp_v2si mep_cpbcast_w (cp_v2si);
cp_v4hi mep_cpbcast_h (cp_v4hi);
cp_v8qi mep_cpbcast_b (cp_v8qi);
void mep_cpccadd_b (cp_v8qi*);
cp_v2si mep_cphadd_w (cp_v2si);
cp_v4hi mep_cphadd_h (cp_v4hi);
cp_v8qi mep_cphadd_b (cp_v8qi);
cp_v8uqi mep_cphaddu_b (cp_v8uqi);
cp_v2si mep_cpnorm_w (cp_v2si);
cp_v4hi mep_cpnorm_h (cp_v4hi);
cp_v2si mep_cpldz_w (cp_v2si);
cp_v4hi mep_cpldz_h (cp_v4hi);
cp_v2si mep_cpabsz_w (cp_v2si);
cp_v4hi mep_cpabsz_h (cp_v4hi);
cp_v8qi mep_cpabsz_b (cp_v8qi);
void mep_cpmovtocc (cp_data_bus_int); // volatile
void mep_cpmovtocsar1 (cp_data_bus_int); // volatile
void mep_cpmovtocsar0 (cp_data_bus_int); // volatile
cp_data_bus_int mep_cpmovfrcc ();
cp_data_bus_int mep_cpmovfrcsar1 ();
cp_data_bus_int mep_cpmovfrcsar0 ();
cp_v2si mep_cpmin3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpminu3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpmin3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpmin3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpminu3_b (cp_v8qi, cp_v8qi);
cp_v2si mep_cpmax3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpmaxu3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpmax3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpmax3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpmaxu3_b (cp_v8qi, cp_v8qi);
cp_v4hi mep_cpabs3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpabs3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpabsu3_b (cp_v8qi, cp_v8qi);
cp_v2si mep_cpaddsr3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpaddsr3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpaddsr3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpaddsru3_b (cp_v8qi, cp_v8qi);
cp_v2si mep_cpave3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpave3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpave3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpaveu3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextlsub3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextlsubu3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextusub3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextusubu3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextladd3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextladdu3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextuadd3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextuaddu3_b (cp_v8qi, cp_v8qi);
cp_v2si mep_cpssub3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpssub3_h (cp_v4hi, cp_v4hi);
cp_v2si mep_cpsadd3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpsadd3_h (cp_v4hi, cp_v4hi);
cp_v2si mep_cpsla3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpsla3_h (cp_v4hi, cp_v4hi);
cp_data_bus_int mep_cdsll3 (cp_data_bus_int, cp_data_bus_int);
cp_v2si mep_cpssll3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpsll3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpssll3_h (cp_v4hi, cp_v4hi);
cp_v4hi mep_cpsll3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpssll3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpsll3_b (cp_v8qi, cp_v8qi);
cp_data_bus_int mep_cdsra3 (cp_data_bus_int, cp_data_bus_int);
cp_v2si mep_cpssra3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpsra3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpssra3_h (cp_v4hi, cp_v4hi);
cp_v4hi mep_cpsra3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpssra3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpsra3_b (cp_v8qi, cp_v8qi);
cp_data_bus_int mep_cdsrl3 (cp_data_bus_int, cp_data_bus_int);
cp_v2si mep_cpssrl3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpsrl3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpssrl3_h (cp_v4hi, cp_v4hi);
cp_v4hi mep_cpsrl3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpssrl3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpsrl3_b (cp_v8qi, cp_v8qi);
cp_v4hi mep_cppack_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cppack_b (cp_v8qi, cp_v8qi);
cp_v8uqi mep_cppacku_b (cp_v8uqi, cp_v8uqi);
cp_v2si mep_cpunpackl_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpunpackl_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpunpackl_b (cp_v8qi, cp_v8qi);
cp_v2usi mep_cpunpacku_w (cp_v2usi, cp_v2usi);
cp_v4uhi mep_cpunpacku_h (cp_v4uhi, cp_v4uhi);
cp_v8uqi mep_cpunpacku_b (cp_v8uqi, cp_v8uqi);
cp_data_bus_int mep_cpfsftbs1 (cp_data_bus_int, cp_data_bus_int);
cp_data_bus_int mep_cpfsftbs0 (cp_data_bus_int, cp_data_bus_int);
cp_data_bus_int mep_cpfsftbi (cp_data_bus_int, cp_data_bus_int, long);
cp_data_bus_int mep_cpsel (cp_data_bus_int, cp_data_bus_int);
cp_vector mep_cpxor3 (cp_vector, cp_vector);
cp_vector mep_cpnor3 (cp_vector, cp_vector);
cp_vector mep_cpor3 (cp_vector, cp_vector);
cp_vector mep_cpand3 (cp_vector, cp_vector);
cp_data_bus_int mep_cdsub3 (cp_data_bus_int, cp_data_bus_int);
cp_v2si mep_cpsub3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpsub3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpsub3_b (cp_v8qi, cp_v8qi);
cp_data_bus_int mep_cdadd3 (cp_data_bus_int, cp_data_bus_int);
cp_v2si mep_cpadd3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpadd3_h (cp_v4hi, cp_v4hi);
cp_v8qi mep_cpadd3_b (cp_v8qi, cp_v8qi);
void mep_cmovh_rn_crm_p0 (long, long); // volatile
void mep_cmovh_crn_rm_p0 (long, long); // volatile
void mep_cmovc_rn_ccrm_p0 (long, long); // volatile
void mep_cmovc_ccrn_rm_p0 (long, long); // volatile
void mep_cmov_rn_crm_p0 (long, long); // volatile
void mep_cmov_crn_rm_p0 (long, long); // volatile
void mep_bsrv (void *);
void mep_jsrv (long);
void mep_synccp (); // volatile
void mep_bcpaf (long, void *);
void mep_bcpat (long, void *);
void mep_bcpne (long, void *);
void mep_bcpeq (long, void *);
void mep_lmcpm1 (cp_data_bus_int*, long **, long);
void mep_smcpm1 (cp_data_bus_int, long **, long);
void mep_lwcpm1 (cp_data_bus_int*, long **, long);
void mep_swcpm1 (cp_data_bus_int, long **, long);
void mep_lhcpm1 (cp_data_bus_int*, long **, long);
void mep_shcpm1 (cp_data_bus_int, long **, long);
void mep_lbcpm1 (cp_data_bus_int*, long **, long);
void mep_sbcpm1 (cp_data_bus_int, long **, long);
void mep_lmcpm0 (cp_data_bus_int*, long **, long);
void mep_smcpm0 (cp_data_bus_int, long **, long);
void mep_lwcpm0 (cp_data_bus_int*, long **, long);
void mep_swcpm0 (cp_data_bus_int, long **, long);
void mep_lhcpm0 (cp_data_bus_int*, long **, long);
void mep_shcpm0 (cp_data_bus_int, long **, long);
void mep_lbcpm0 (cp_data_bus_int*, long **, long);
void mep_sbcpm0 (cp_data_bus_int, long **, long);
void mep_lmcpa (cp_data_bus_int*, long **, long);
void mep_smcpa (cp_data_bus_int, long **, long);
void mep_lwcpa (cp_data_bus_int*, long **, long);
void mep_swcpa (cp_data_bus_int, long **, long);
void mep_lhcpa (cp_data_bus_int*, long **, long);
void mep_shcpa (cp_data_bus_int, long **, long);
void mep_lbcpa (cp_data_bus_int*, long **, long);
void mep_sbcpa (cp_data_bus_int, long **, long);
void mep_lmcp16 (cp_data_bus_int*, long, long *);
void mep_smcp16 (cp_data_bus_int, long, long *); // volatile
void mep_lwcp16 (cp_data_bus_int*, long, long *);
void mep_swcp16 (cp_data_bus_int, long, long *);
void mep_lmcpi (cp_data_bus_int*, long **);
void mep_smcpi (cp_data_bus_int, long **);
void mep_lwcpi (cp_data_bus_int*, long **);
void mep_swcpi (cp_data_bus_int, long **);
void mep_lmcp (cp_data_bus_int*, long *);
void mep_smcp (cp_data_bus_int, long *); // volatile
void mep_lwcp (cp_data_bus_int*, long *);
void mep_swcp (cp_data_bus_int, long *);
void mep_ssubu (long*, long);
void mep_saddu (long*, long);
void mep_ssub (long*, long);
void mep_sadd (long*, long);
void mep_clipu (long*, long);
void mep_clip (long*, long);
void mep_maxu (long*, long);
void mep_minu (long*, long);
void mep_max (long*, long);
void mep_min (long*, long);
void mep_ave (long*, long);
void mep_abs (long*, long);
void mep_ldz (long*, long);
void mep_dbreak (); // volatile
void mep_dret ();
void mep_divu (long, long);
void mep_div (long, long);
void mep_maddru (long*, long);
void mep_maddr (long*, long);
void mep_maddu (long, long);
void mep_madd (long, long);
void mep_mulru (long*, long);
void mep_mulr (long*, long);
void mep_mulu (long, long);
void mep_mul (long, long);
void mep_cache (long, long *); // volatile
void mep_tas (long*, long *);
void mep_btstm (long*, long *, long);
void mep_bnotm (long *, long);
void mep_bclrm (long *, long);
void mep_bsetm (long *, long);
void mep_ldcb (long*, long); // volatile
void mep_stcb (long, long); // volatile
void mep_syncm (); // volatile
void mep_break (); // volatile
void mep_swi (long); // volatile
void mep_sleep (); // volatile
void mep_halt (); // volatile
void mep_reti ();
void mep_ei (); // volatile
void mep_di (); // volatile
void mep_ldc (long*, long); // volatile
void mep_ldc_lo (long*);
void mep_ldc_hi (long*);
void mep_ldc_lp (long*);
void mep_stc (long, long); // volatile
void mep_stc_lo (long);
void mep_stc_hi (long);
void mep_stc_lp (long);
void mep_erepeat (void *);
void mep_repeat (long, void *);
void mep_ret ();
void mep_jsr (long);
void mep_jmp24 (void *);
void mep_jmp (long);
void mep_bsr24 (void *);
void mep_bsr12 (void *);
void mep_bne (long, long, void *);
void mep_beq (long, long, void *);
void mep_bgei (long, long, void *);
void mep_blti (long, long, void *);
void mep_bnei (long, long, void *);
void mep_beqi (long, long, void *);
void mep_bnez (long, void *);
void mep_beqz (long, void *);
void mep_bra (void *);
void mep_fsft (long*, long);
void mep_sll3 (long*, long, long);
void mep_slli (long*, long);
void mep_srli (long*, long);
void mep_srai (long*, long);
void mep_sll (long*, long);
void mep_srl (long*, long);
void mep_sra (long*, long);
void mep_xor3 (long*, long, long);
void mep_and3 (long*, long, long);
void mep_or3 (long*, long, long);
void mep_nor (long*, long);
void mep_xor (long*, long);
void mep_and (long*, long);
void mep_or (long*, long);
void mep_sltu3x (long*, long, long);
void mep_slt3x (long*, long, long);
void mep_add3x (long*, long, long);
void mep_sl2ad3 (long*, long, long);
void mep_sl1ad3 (long*, long, long);
void mep_sltu3i (long*, long, long);
void mep_slt3i (long*, long, long);
void mep_sltu3 (long*, long, long);
void mep_slt3 (long*, long, long);
void mep_neg (long*, long);
void mep_sbvck3 (long*, long, long);
void mep_sub (long*, long);
void mep_advck3 (long*, long, long);
void mep_add3i (long*, long);
void mep_add (long*, long);
void mep_add3 (long*, long, long);
void mep_movh (long*, long);
void mep_movu16 (long*, long);
void mep_movu24 (long*, long);
void mep_movi16 (long*, long);
void mep_movi8 (long*, long);
void mep_mov (long*, long);
void mep_ssarb (long, long);
void mep_extuh (long*);
void mep_extub (long*);
void mep_exth (long*);
void mep_extb (long*);
void mep_lw24 (long*, long);
void mep_sw24 (long, long);
void mep_lhu16 (long*, long, long *);
void mep_lbu16 (long*, long, long *);
void mep_lw16 (long*, long, long *);
void mep_lh16 (long*, long, long *);
void mep_lb16 (long*, long, long *);
void mep_sw16 (long, long, long *);
void mep_sh16 (long, long, long *);
void mep_sb16 (long, long, long *);
void mep_lhu_tp (long*, long);
void mep_lbu_tp (long*, long);
void mep_lw_tp (long*, long);
void mep_lh_tp (long*, long);
void mep_lb_tp (long*, long);
void mep_sw_tp (long, long);
void mep_sh_tp (long, long);
void mep_sb_tp (long, long);
void mep_lw_sp (long*, long);
void mep_sw_sp (long, long);
void mep_lhu (long*, long *);
void mep_lbu (long*, long *);
void mep_lw (long*, long *);
void mep_lh (long*, long *);
void mep_lb (long*, long *);
void mep_sw (long, long *);
void mep_sh (long, long *);
void mep_sb (long, long *);
void mep_dsp1 (long*, long); // volatile
void mep_dsp0 (long); // volatile
void mep_dsp (long*, long, long); // volatile
void mep_uci (long*, long, long); // volatile
void mep_lhucpm1 (cp_data_bus_int*, long **, long);
void mep_lbucpm1 (cp_data_bus_int*, long **, long);
void mep_lhucpm0 (cp_data_bus_int*, long **, long);
void mep_lbucpm0 (cp_data_bus_int*, long **, long);
void mep_lhucpa (cp_data_bus_int*, long **, long);
void mep_lbucpa (cp_data_bus_int*, long **, long);
void mep_lhucp (cp_data_bus_int*, long, long *);
void mep_lhcp (cp_data_bus_int*, long, long *);
void mep_shcp (cp_data_bus_int, long, long *);
void mep_lbucp (cp_data_bus_int*, long, long *);
void mep_lbcp (cp_data_bus_int*, long, long *);
void mep_sbcp (cp_data_bus_int, long, long *);
void mep_casw3 (long*, long, long); // volatile
void mep_cash3 (long*, long, long); // volatile
void mep_casb3 (long*, long, long); // volatile
void mep_prefd (long, long, long *); // volatile
void mep_pref (long, long *); // volatile
void mep_ldcb_r (long*, long *); // volatile
void mep_stcb_r (long, long *); // volatile
void mep_cmovh2 (long*, cp_data_bus_int);
void mep_cmovh1 (cp_data_bus_int*, long);
void mep_cmovc2 (long*, long); // volatile
void mep_cmovc1 (long, long); // volatile
void mep_cmov2 (long*, cp_data_bus_int);
void mep_cmov1 (cp_data_bus_int*, long);
cp_data_bus_int mep_cpmov (cp_data_bus_int);

29379
gcc/config/mep/intrinsics.md Normal file

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,9 @@
#undef __section
#define __section(_secname) __attribute__((section(#_secname)))
#undef mep_nop
#define mep_nop() __asm__ volatile ("nop")
#pragma GCC coprocessor available $c0...$c31
#pragma GCC coprocessor call_saved $c6...$c7
#include <intrinsics.h>

260
gcc/config/mep/mep-c5.cpu Normal file
View File

@ -0,0 +1,260 @@
; Insns introduced for the MeP-c5 core
;
(dnf f-c5n4 "extended field" (all-mep-core-isas) 16 4)
(dnf f-c5n5 "extended field" (all-mep-core-isas) 20 4)
(dnf f-c5n6 "extended field" (all-mep-core-isas) 24 4)
(dnf f-c5n7 "extended field" (all-mep-core-isas) 28 4)
(dnf f-rl5 "register l c5" (all-mep-core-isas) 20 4)
(df f-12s20 "extended field" (all-mep-core-isas) 20 12 INT #f #f)
(dnop rl5 "register Rl c5" (all-mep-core-isas) h-gpr f-rl5)
(dnop cdisp12 "copro addend (12 bits)" (all-mep-core-isas) h-sint f-12s20)
(dnci stcb_r "store in control bus space" (VOLATILE (MACH c5))
"stcb $rn,($rma)"
(+ MAJ_7 rn rma (f-sub4 12))
(c-call VOID "do_stcb" rn (and rma #xffff))
((mep (unit u-use-gpr (in usereg rn))
(unit u-use-gpr (in usereg rma))
(unit u-exec)
(unit u-stcb))))
(dnci ldcb_r "load from control bus space" (VOLATILE (MACH c5) (LATENCY 3))
"ldcb $rn,($rma)"
(+ MAJ_7 rn rma (f-sub4 13))
(set rn (c-call SI "do_ldcb" (and rma #xffff)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-ldcb)
(unit u-exec)
(unit u-ldcb-gpr (out loadreg rn)))))
(dnci pref "cache prefetch" ((MACH c5) VOLATILE)
"pref $cimm4,($rma)"
(+ MAJ_7 cimm4 rma (f-sub4 5))
(sequence ()
(c-call VOID "check_option_dcache" pc)
(c-call VOID "do_cache_prefetch" cimm4 rma pc))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci prefd "cache prefetch" ((MACH c5) VOLATILE)
"pref $cimm4,$sdisp16($rma)"
(+ MAJ_15 cimm4 rma (f-sub4 3) sdisp16)
(sequence ()
(c-call VOID "check_option_dcache" pc)
(c-call VOID "do_cache_prefetch" cimm4 (add INT rma (ext SI sdisp16)) pc))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci casb3 "compare and swap byte 3" ((MACH c5) VOLATILE OPTIONAL_BIT_INSN)
"casb3 $rl5,$rn,($rm)"
(+ MAJ_15 rn rm (f-sub4 #x1) (f-c5n4 #x2) rl5 (f-c5n6 #x0) (f-c5n7 #x0))
(sequence ()
(c-call VOID "do_casb3" (index-of rl5) rn rm pc)
(set rl5 rl5)
)
((mep (unit u-use-gpr (in usereg rl5))
(unit u-load-gpr (out loadreg rl5))
(unit u-exec))))
(dnci cash3 "compare and swap halfword 3" ((MACH c5) VOLATILE OPTIONAL_BIT_INSN)
"cash3 $rl5,$rn,($rm)"
(+ MAJ_15 rn rm (f-sub4 #x1) (f-c5n4 #x2) rl5 (f-c5n6 #x0) (f-c5n7 #x1))
(sequence ()
(c-call VOID "do_cash3" (index-of rl5) rn rm pc)
(set rl5 rl5)
)
((mep (unit u-use-gpr (in usereg rl5))
(unit u-load-gpr (out loadreg rl5))
(unit u-exec))))
(dnci casw3 "compare and swap word 3" ((MACH c5) VOLATILE OPTIONAL_BIT_INSN)
"casw3 $rl5,$rn,($rm)"
(+ MAJ_15 rn rm (f-sub4 #x1) (f-c5n4 #x2) rl5 (f-c5n6 #x0) (f-c5n7 #x2))
(sequence ()
(c-call VOID "do_casw3" (index-of rl5) rn rm pc)
(set rl5 rl5)
)
((mep (unit u-use-gpr (in usereg rl5))
(unit u-load-gpr (out loadreg rl5))
(unit u-exec))))
(dnci sbcp "store byte coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
"sbcp $crn,$cdisp12($rma)"
(+ MAJ_15 crn rma (f-sub4 6) (f-ext4 0) cdisp12)
(sequence ()
(c-call "check_option_cp" pc)
(c-call VOID "check_write_to_text" (add rma (ext SI cdisp12)))
(set (mem QI (add rma (ext SI cdisp12))) (and crn #xff)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lbcp "load byte coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
"lbcp $crn,$cdisp12($rma)"
(+ MAJ_15 crn rma (f-sub4 6) (f-ext4 4) cdisp12)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (ext SI (mem QI (add rma (ext SI cdisp12))))))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lbucp "load byte coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
"lbucp $crn,$cdisp12($rma)"
(+ MAJ_15 crn rma (f-sub4 6) (f-ext4 12) cdisp12)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem QI (add rma (ext SI cdisp12))))))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci shcp "store half-word coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
"shcp $crn,$cdisp12($rma)"
(+ MAJ_15 crn rma (f-sub4 6) (f-ext4 1) cdisp12)
(sequence ()
(c-call "check_option_cp" pc)
(c-call VOID "check_write_to_text" (add rma (ext SI cdisp12)))
(set (mem HI (add rma (ext SI cdisp12))) (and crn #xffff)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lhcp "load half-word coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
"lhcp $crn,$cdisp12($rma)"
(+ MAJ_15 crn rma (f-sub4 6) (f-ext4 5) cdisp12)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (ext SI (mem HI (add rma (ext SI cdisp12))))))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lhucp "load half-word coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
"lhucp $crn,$cdisp12($rma)"
(+ MAJ_15 crn rma (f-sub4 6) (f-ext4 13) cdisp12)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem HI (add rma (ext SI cdisp12))))))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lbucpa "load byte coprocessor" (OPTIONAL_CP_INSN (STALL LOAD) (MACH c5))
"lbucpa $crn,($rma+),$cdisp10"
(+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xC) (f-ext62 #x0) cdisp10)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem QI rma)))
(set rma (add rma cdisp10)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lhucpa "load half-word coprocessor" (OPTIONAL_CP_INSN (STALL LOAD) (MACH c5))
"lhucpa $crn,($rma+),$cdisp10a2"
(+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xD) (f-ext62 #x0) cdisp10a2)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem HI (and rma (inv SI 1)))))
(set rma (add rma (ext SI cdisp10a2))))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lbucpm0 "lbucpm0" (OPTIONAL_CP_INSN (MACH c5))
"lbucpm0 $crn,($rma+),$cdisp10"
(+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xc) (f-ext62 #x2) cdisp10)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem QI rma)))
(set rma (mod0 cdisp10)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lhucpm0 "lhucpm0" (OPTIONAL_CP_INSN (MACH c5))
"lhucpm0 $crn,($rma+),$cdisp10a2"
(+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xd) (f-ext62 #x2) cdisp10a2)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem HI (and rma (inv SI 1)))))
(set rma (mod0 cdisp10a2)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lbucpm1 "lbucpm1" (OPTIONAL_CP_INSN (MACH c5))
"lbucpm1 $crn,($rma+),$cdisp10"
(+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xc) (f-ext62 #x3) cdisp10)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem QI rma)))
(set rma (mod1 cdisp10)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci lhucpm1 "lhucpm1" (OPTIONAL_CP_INSN (MACH c5))
"lhucpm1 $crn,($rma+),$cdisp10a2"
(+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xd) (f-ext62 #x3) cdisp10a2)
(sequence ()
(c-call "check_option_cp" pc)
(set crn (zext SI (mem HI (and rma (inv SI 1)))))
(set rma (mod1 cdisp10a2)))
((mep (unit u-use-gpr (in usereg rma))
(unit u-exec))))
(dnci uci "uci" ((MACH c5) VOLATILE)
"uci $rn,$rm,$uimm16"
(+ MAJ_15 rn rm (f-sub4 2) simm16)
(set rn (c-call SI "do_UCI" rn rm (zext SI uimm16) pc))
((mep (unit u-use-gpr (in usereg rm))
(unit u-use-gpr (in usereg rn))
(unit u-exec))))
(dnf f-c5-rnm "register n/m" (all-mep-isas) 4 8)
(dnf f-c5-rm "register m" (all-mep-isas) 8 4)
(df f-c5-16u16 "general 16-bit u-val" (all-mep-isas) 16 16 UINT #f #f)
(dnmf f-c5-rmuimm20 "20-bit immediate in Rm/Imm16" (all-mep-isas) UINT
(f-c5-rm f-c5-16u16)
(sequence () ; insert
(set (ifield f-c5-rm) (srl (ifield f-c5-rmuimm20) 16))
(set (ifield f-c5-16u16) (and (ifield f-c5-rmuimm20) #xffff))
)
(sequence () ; extract
(set (ifield f-c5-rmuimm20) (or (ifield f-c5-16u16)
(sll (ifield f-c5-rm) 16)))
)
)
(dnop c5rmuimm20 "20-bit immediate in rm and imm16" (all-mep-core-isas) h-uint f-c5-rmuimm20)
(dnmf f-c5-rnmuimm24 "24-bit immediate in Rm/Imm16" (all-mep-isas) UINT
(f-c5-rnm f-c5-16u16)
(sequence () ; insert
(set (ifield f-c5-rnm) (srl (ifield f-c5-rnmuimm24) 16))
(set (ifield f-c5-16u16) (and (ifield f-c5-rnmuimm24) #xffff))
)
(sequence () ; extract
(set (ifield f-c5-rnmuimm24) (or (ifield f-c5-16u16)
(sll (ifield f-c5-rnm) 16)))
)
)
(dnop c5rnmuimm24 "24-bit immediate in rn, rm, and imm16" (all-mep-core-isas) h-uint f-c5-rnmuimm24)
(dnci dsp "dsp" ((MACH c5) VOLATILE)
"dsp $rn,$rm,$uimm16"
(+ MAJ_15 rn rm (f-sub4 0) uimm16)
(set rn (c-call SI "do_DSP" rn rm (zext SI uimm16) pc))
((mep (unit u-use-gpr (in usereg rm))
(unit u-use-gpr (in usereg rn))
(unit u-exec))))
(dnci dsp0 "dsp0" ((MACH c5) VOLATILE NO-DIS ALIAS)
"dsp0 $c5rnmuimm24"
(+ MAJ_15 c5rnmuimm24 (f-sub4 0))
(c-call VOID "do_DSP" (zext SI c5rnmuimm24) pc)
((mep (unit u-exec))))
(dnci dsp1 "dsp1" ((MACH c5) VOLATILE NO-DIS ALIAS)
"dsp1 $rn,$c5rmuimm20"
(+ MAJ_15 rn (f-sub4 0) c5rmuimm20)
(set rn (c-call SI "do_DSP" rn (zext SI c5rmuimm20) pc))
((mep (unit u-use-gpr (in usereg rn))
(unit u-exec))))

3065
gcc/config/mep/mep-core.cpu Normal file

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,10 @@
; Toshiba MeP Media Engine architecture description. -*- Scheme -*-
; Copyright (C) 2001 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
; This file serves as a wrapper to bring in the core description plus
; sample implementations of the UCI and DSP instructions.
(include "mep-core.cpu")
(include "mep-ext-cop.cpu")

View File

@ -0,0 +1,8 @@
; Toshiba MeP Media Engine architecture description. -*- Scheme -*-
; Copyright (C) 2003 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
;; begin-user-isa-includes
(include "mep-ivc2.cpu")
;; end-user-isa-includes

8939
gcc/config/mep/mep-intrin.h Normal file

File diff suppressed because it is too large Load Diff

9755
gcc/config/mep/mep-ivc2.cpu Normal file

File diff suppressed because it is too large Load Diff

125
gcc/config/mep/mep-lib1.asm Normal file
View File

@ -0,0 +1,125 @@
/* libgcc routines for Toshiba Media Processor.
Copyright (C) 2001, 2002, 2005, 2009 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3 of the License, or (at your
option) any later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#define SAVEALL \
add3 $sp, $sp, -16*4 ; \
sw $0, ($sp) ; \
sw $1, 4($sp) ; \
sw $2, 8($sp) ; \
sw $3, 12($sp) ; \
sw $4, 16($sp) ; \
sw $5, 20($sp) ; \
sw $6, 24($sp) ; \
sw $7, 28($sp) ; \
sw $8, 32($sp) ; \
sw $9, 36($sp) ; \
sw $10, 40($sp) ; \
sw $11, 44($sp) ; \
sw $12, 48($sp) ; \
sw $13, 52($sp) ; \
sw $14, 56($sp) ; \
ldc $5, $lp ; \
add $5, 3 ; \
mov $6, -4 ; \
and $5, $6
#define RESTOREALL \
stc $5, $lp ; \
lw $14, 56($sp) ; \
lw $13, 52($sp) ; \
lw $12, 48($sp) ; \
lw $11, 44($sp) ; \
lw $10, 40($sp) ; \
lw $9, 36($sp) ; \
lw $8, 32($sp) ; \
lw $7, 28($sp) ; \
lw $6, 24($sp) ; \
lw $5, 20($sp) ; \
lw $4, 16($sp) ; \
lw $3, 12($sp) ; \
lw $2, 8($sp) ; \
lw $1, 4($sp) ; \
lw $0, ($sp) ; \
add3 $sp, $sp, 16*4 ; \
ret
#ifdef L_mep_profile
.text
.global __mep_mcount
__mep_mcount:
SAVEALL
ldc $1, $lp
mov $2, $0
bsr __mep_mcount_2
RESTOREALL
#endif
#ifdef L_mep_bb_init_trace
.text
.global __mep_bb_init_trace_func
__mep_bb_init_trace_func:
SAVEALL
lw $1, ($5)
lw $2, 4($5)
add $5, 8
bsr __bb_init_trace_func
RESTOREALL
#endif
#ifdef L_mep_bb_init
.text
.global __mep_bb_init_func
__mep_bb_init_func:
SAVEALL
lw $1, ($5)
add $5, 4
bsr __bb_init_func
RESTOREALL
#endif
#ifdef L_mep_bb_trace
.text
.global __mep_bb_trace_func
__mep_bb_trace_func:
SAVEALL
movu $3, __bb
lw $1, ($5)
sw $1, ($3)
lw $2, 4($5)
sw $2, 4($3)
add $5, 8
bsr __bb_trace_func
RESTOREALL
#endif
#ifdef L_mep_bb_increment
.text
.global __mep_bb_increment_func
__mep_bb_increment_func:
SAVEALL
lw $1, ($5)
lw $0, ($1)
add $0, 1
sw $0, ($1)
add $5, 4
RESTOREALL
#endif

139
gcc/config/mep/mep-lib2.c Normal file
View File

@ -0,0 +1,139 @@
/* libgcc routines for MeP.
Copyright 2001, 2002, 2009 Free Software Foundation, Inc
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3 of the License, or (at your
option) any later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
typedef int SItype __attribute__ ((mode (SI)));
typedef unsigned int USItype __attribute__ ((mode (SI)));
typedef int word_type __attribute__ ((mode (__word__)));
USItype
__mulsi3 (USItype a, USItype b)
{
USItype c = 0;
while (a != 0)
{
if (a & 1)
c += b;
a >>= 1;
b <<= 1;
}
return c;
}
USItype
udivmodsi4(USItype num, USItype den, word_type modwanted)
{
USItype bit = 1;
USItype res = 0;
while (den < num && bit && !(den & (1L<<31)))
{
den <<=1;
bit <<=1;
}
while (bit)
{
if (num >= den)
{
num -= den;
res |= bit;
}
bit >>=1;
den >>=1;
}
if (modwanted) return num;
return res;
}
SItype
__divsi3 (SItype a, SItype b)
{
word_type neg = 0;
SItype res;
if (a < 0)
{
a = -a;
neg = !neg;
}
if (b < 0)
{
b = -b;
neg = !neg;
}
res = udivmodsi4 (a, b, 0);
if (neg)
res = -res;
return res;
}
SItype
__modsi3 (SItype a, SItype b)
{
word_type neg = 0;
SItype res;
if (a < 0)
{
a = -a;
neg = 1;
}
if (b < 0)
b = -b;
res = udivmodsi4 (a, b, 1);
if (neg)
res = -res;
return res;
}
SItype
__udivsi3 (SItype a, SItype b)
{
return udivmodsi4 (a, b, 0);
}
SItype
__umodsi3 (SItype a, SItype b)
{
return udivmodsi4 (a, b, 1);
}

384
gcc/config/mep/mep-pragma.c Normal file
View File

@ -0,0 +1,384 @@
/* Definitions of Toshiba Media Processor
Copyright (C) 2001, 2002, 2003, 2005, 2006, 2007, 2009 Free
Software Foundation, Inc. Contributed by Red Hat, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include <stdio.h>
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "tree.h"
#include "rtl.h"
#include "toplev.h"
#include "c-pragma.h"
#include "cpplib.h"
#include "hard-reg-set.h"
#include "output.h"
#include "mep-protos.h"
#include "function.h"
#define MAX_RECOG_OPERANDS 10
#include "reload.h"
#include "target.h"
enum cw_which { CW_AVAILABLE, CW_CALL_SAVED };
static enum cpp_ttype
mep_pragma_lex (tree *valp)
{
enum cpp_ttype t = pragma_lex (valp);
if (t == CPP_EOF)
t = CPP_PRAGMA_EOL;
return t;
}
static void
mep_pragma_io_volatile (cpp_reader *reader ATTRIBUTE_UNUSED)
{
/* On off. */
tree val;
enum cpp_ttype type;
const char * str;
type = mep_pragma_lex (&val);
if (type == CPP_NAME)
{
str = IDENTIFIER_POINTER (val);
type = mep_pragma_lex (&val);
if (type != CPP_PRAGMA_EOL)
warning (0, "junk at end of #pragma io_volatile");
if (strcmp (str, "on") == 0)
{
target_flags |= MASK_IO_VOLATILE;
return;
}
if (strcmp (str, "off") == 0)
{
target_flags &= ~ MASK_IO_VOLATILE;
return;
}
}
error ("#pragma io_volatile takes only on or off");
}
static unsigned int
parse_cr_reg (const char * str)
{
unsigned int regno;
regno = decode_reg_name (str);
if (regno >= FIRST_PSEUDO_REGISTER)
return INVALID_REGNUM;
/* Verify that the regno is in CR_REGS. */
if (! TEST_HARD_REG_BIT (reg_class_contents[CR_REGS], regno))
return INVALID_REGNUM;
return regno;
}
static bool
parse_cr_set (HARD_REG_SET * set)
{
tree val;
enum cpp_ttype type;
unsigned int last_regno = INVALID_REGNUM;
bool do_range = false;
CLEAR_HARD_REG_SET (*set);
while ((type = mep_pragma_lex (&val)) != CPP_PRAGMA_EOL)
{
if (type == CPP_COMMA)
{
last_regno = INVALID_REGNUM;
do_range = false;
}
else if (type == CPP_ELLIPSIS)
{
if (last_regno == INVALID_REGNUM)
{
error ("invalid coprocessor register range");
return false;
}
do_range = true;
}
else if (type == CPP_NAME || type == CPP_STRING)
{
const char *str;
unsigned int regno, i;
if (TREE_CODE (val) == IDENTIFIER_NODE)
str = IDENTIFIER_POINTER (val);
else if (TREE_CODE (val) == STRING_CST)
str = TREE_STRING_POINTER (val);
else
gcc_unreachable ();
regno = parse_cr_reg (str);
if (regno == INVALID_REGNUM)
{
error ("invalid coprocessor register %qE", val);
return false;
}
if (do_range)
{
if (last_regno > regno)
i = regno, regno = last_regno;
else
i = last_regno;
do_range = false;
}
else
last_regno = i = regno;
while (i <= regno)
{
SET_HARD_REG_BIT (*set, i);
i++;
}
}
else
{
error ("malformed coprocessor register");
return false;
}
}
return true;
}
static void
mep_pragma_coprocessor_which (enum cw_which cw_which)
{
HARD_REG_SET set;
/* Process the balance of the pragma and turn it into a hard reg set. */
if (! parse_cr_set (&set))
return;
/* Process the collected hard reg set. */
switch (cw_which)
{
case CW_AVAILABLE:
{
int i;
for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
if (TEST_HARD_REG_BIT (set, i))
fixed_regs[i] = 0;
}
break;
case CW_CALL_SAVED:
{
int i;
for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
if (TEST_HARD_REG_BIT (set, i))
fixed_regs[i] = call_used_regs[i] = 0;
}
break;
default:
gcc_unreachable ();
}
/* Fix up register class hierarchy. */
save_register_info ();
reinit_regs ();
if (cfun == 0)
{
init_dummy_function_start ();
init_caller_save ();
expand_dummy_function_end ();
}
else
{
init_caller_save ();
}
}
static void
mep_pragma_coprocessor_width (void)
{
tree val;
enum cpp_ttype type;
HOST_WIDE_INT i;
type = mep_pragma_lex (&val);
switch (type)
{
case CPP_NUMBER:
if (! host_integerp (val, 1))
break;
i = tree_low_cst (val, 1);
/* This pragma no longer has any effect. */
#if 0
if (i == 32)
target_flags &= ~MASK_64BIT_CR_REGS;
else if (i == 64)
target_flags |= MASK_64BIT_CR_REGS;
else
break;
targetm.init_builtins ();
#else
if (i != 32 && i != 64)
break;
#endif
type = mep_pragma_lex (&val);
if (type != CPP_PRAGMA_EOL)
warning (0, "junk at end of #pragma GCC coprocessor width");
return;
default:
break;
}
error ("#pragma GCC coprocessor width takes only 32 or 64");
}
static void
mep_pragma_coprocessor_subclass (void)
{
tree val;
enum cpp_ttype type;
HARD_REG_SET set;
int class_letter;
enum reg_class class;
type = mep_pragma_lex (&val);
if (type != CPP_CHAR)
goto syntax_error;
class_letter = tree_low_cst (val, 1);
if (class_letter >= 'A' && class_letter <= 'D')
class = class_letter - 'A' + USER0_REGS;
else
{
error ("#pragma GCC coprocessor subclass letter must be in [ABCD]");
return;
}
if (reg_class_size[class] > 0)
{
error ("#pragma GCC coprocessor subclass '%c' already defined",
class_letter);
return;
}
type = mep_pragma_lex (&val);
if (type != CPP_EQ)
goto syntax_error;
if (! parse_cr_set (&set))
return;
/* Fix up register class hierarchy. */
COPY_HARD_REG_SET (reg_class_contents[class], set);
init_regs ();
return;
syntax_error:
error ("malformed #pragma GCC coprocessor subclass");
}
static void
mep_pragma_disinterrupt (cpp_reader *reader ATTRIBUTE_UNUSED)
{
tree val;
enum cpp_ttype type;
int saw_one = 0;
for (;;)
{
type = mep_pragma_lex (&val);
if (type == CPP_COMMA)
continue;
if (type != CPP_NAME)
break;
mep_note_pragma_disinterrupt (IDENTIFIER_POINTER (val));
saw_one = 1;
}
if (!saw_one || type != CPP_PRAGMA_EOL)
{
error ("malformed #pragma disinterrupt");
return;
}
}
static void
mep_pragma_coprocessor (cpp_reader *reader ATTRIBUTE_UNUSED)
{
tree val;
enum cpp_ttype type;
type = mep_pragma_lex (&val);
if (type != CPP_NAME)
{
error ("malformed #pragma GCC coprocessor");
return;
}
if (!TARGET_COP)
error ("coprocessor not enabled");
if (strcmp (IDENTIFIER_POINTER (val), "available") == 0)
mep_pragma_coprocessor_which (CW_AVAILABLE);
else if (strcmp (IDENTIFIER_POINTER (val), "call_saved") == 0)
mep_pragma_coprocessor_which (CW_CALL_SAVED);
else if (strcmp (IDENTIFIER_POINTER (val), "width") == 0)
mep_pragma_coprocessor_width ();
else if (strcmp (IDENTIFIER_POINTER (val), "subclass") == 0)
mep_pragma_coprocessor_subclass ();
else
error ("unknown #pragma GCC coprocessor %E", val);
}
static void
mep_pragma_call (cpp_reader *reader ATTRIBUTE_UNUSED)
{
tree val;
enum cpp_ttype type;
int saw_one = 0;
for (;;)
{
type = mep_pragma_lex (&val);
if (type == CPP_COMMA)
continue;
if (type != CPP_NAME)
break;
mep_note_pragma_call (IDENTIFIER_POINTER (val));
saw_one = 1;
}
if (!saw_one || type != CPP_PRAGMA_EOL)
{
error ("malformed #pragma call");
return;
}
}
void
mep_register_pragmas (void)
{
c_register_pragma ("custom", "io_volatile", mep_pragma_io_volatile);
c_register_pragma ("GCC", "coprocessor", mep_pragma_coprocessor);
c_register_pragma (0, "disinterrupt", mep_pragma_disinterrupt);
c_register_pragma (0, "call", mep_pragma_call);
}

131
gcc/config/mep/mep-protos.h Normal file
View File

@ -0,0 +1,131 @@
/* Prototypes for exported functions defined in mep.c
Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009 Free
Software Foundation, Inc.
Contributed by Red Hat Inc (dj@redhat.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
extern void mep_conditional_register_usage (char *, char *);
extern void mep_optimization_options (void);
extern void mep_override_options (void);
extern int mep_regno_reg_class (int);
extern int mep_reg_class_from_constraint (int, const char *);
extern bool mep_const_ok_for_letter_p (HOST_WIDE_INT, int);
extern bool mep_extra_constraint (rtx, int);
extern rtx mep_mulr_source (rtx, rtx, rtx, rtx);
extern bool mep_reuse_lo_p (rtx, rtx, rtx, bool);
extern bool mep_use_post_modify_p (rtx, rtx, rtx);
extern bool mep_allow_clip (rtx, rtx, int);
extern bool mep_bit_position_p (rtx, bool);
extern bool mep_split_mov (rtx *, int);
extern bool mep_vliw_mode_match (rtx);
extern bool mep_multi_slot (rtx);
extern bool mep_legitimate_address (enum machine_mode, rtx, int);
extern int mep_legitimize_address (rtx *, rtx, enum machine_mode);
#ifdef MAX_RELOADS
extern int mep_legitimize_reload_address (rtx *, enum machine_mode, int, enum reload_type, int);
#endif
extern int mep_core_address_length (rtx, int);
extern int mep_cop_address_length (rtx, int);
extern bool mep_expand_mov (rtx *, enum machine_mode);
extern bool mep_mov_ok (rtx *, enum machine_mode);
extern void mep_split_wide_move (rtx *, enum machine_mode);
#ifdef RTX_CODE
extern bool mep_expand_setcc (rtx *);
extern rtx mep_expand_cbranch (rtx *);
#endif
extern const char *mep_emit_cbranch (rtx *, int);
extern void mep_expand_call (rtx *, int);
extern rtx mep_find_base_term (rtx);
extern int mep_secondary_input_reload_class (enum reg_class, enum machine_mode, rtx);
extern int mep_secondary_output_reload_class (enum reg_class, enum machine_mode, rtx);
extern bool mep_secondary_memory_needed (enum reg_class, enum reg_class,
enum machine_mode);
extern void mep_expand_reload (rtx *, enum machine_mode);
extern enum reg_class mep_preferred_reload_class (rtx, enum reg_class);
extern int mep_register_move_cost (enum machine_mode, enum reg_class, enum reg_class);
extern void mep_init_expanders (void);
extern rtx mep_return_addr_rtx (int);
extern bool mep_epilogue_uses (int);
extern int mep_elimination_offset (int, int);
extern void mep_expand_prologue (void);
extern void mep_expand_epilogue (void);
extern void mep_expand_eh_return (rtx *);
extern void mep_emit_eh_epilogue (rtx *);
extern void mep_expand_sibcall_epilogue (void);
extern rtx mep_return_stackadj_rtx (void);
extern rtx mep_return_handler_rtx (void);
extern void mep_function_profiler (FILE *);
extern const char *mep_emit_bb_trace_ret (void);
extern void mep_print_operand_address (FILE *, rtx);
extern void mep_print_operand (FILE *, rtx, int);
extern void mep_final_prescan_insn (rtx, rtx *, int);
extern void mep_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
extern rtx mep_function_arg (CUMULATIVE_ARGS, enum machine_mode, tree, int);
extern void mep_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
extern bool mep_return_in_memory (const_tree, const_tree);
extern rtx mep_function_value (tree, tree);
extern rtx mep_libcall_value (enum machine_mode);
extern void mep_asm_output_opcode (FILE *, const char *);
extern void mep_note_pragma_disinterrupt (const char *);
extern void mep_note_pragma_call (const char *);
extern void mep_file_cleanups (void);
extern const char *mep_strip_name_encoding (const char *);
extern void mep_output_aligned_common (FILE *, tree, const char *,
int, int, int);
extern void mep_init_trampoline (rtx, rtx, rtx);
extern void mep_emit_doloop (rtx *, int);
extern bool mep_vliw_function_p (tree);
extern bool mep_store_data_bypass_p (rtx, rtx);
extern bool mep_mul_hilo_bypass_p (rtx, rtx);
extern bool mep_ipipe_ldc_p (rtx);
extern bool mep_emit_intrinsic (int, const rtx *);
extern bool mep_expand_unary_intrinsic (int, rtx *);
extern bool mep_expand_binary_intrinsic (int, int, int, int, rtx *);
extern int mep_intrinsic_length (int);
extern void mep_register_pragmas (void);
extern int mep_section_tag (rtx);
extern bool mep_lookup_pragma_call (const char *);
extern bool mep_have_core_copro_moves_p;
extern bool mep_have_copro_copro_moves_p;
extern bool mep_cannot_change_mode_class (enum machine_mode, enum machine_mode,
enum reg_class);
extern int cgen_h_uint_6a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_7a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_8a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_6a2_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_22a4_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_2a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_24a1_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_6a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_5a4_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_2a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_16a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_3a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_5a1_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_16a1_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_8a1_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_7a2_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_6a4_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_5a8_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_4a1_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_10a1_immediate (rtx, enum machine_mode);
extern int cgen_h_sint_12a1_immediate (rtx, enum machine_mode);
extern int cgen_h_uint_20a1_immediate (rtx, enum machine_mode);

103
gcc/config/mep/mep-tramp.c Normal file
View File

@ -0,0 +1,103 @@
/* Trampoline support for MeP
Copyright (C) 2004, 2007 Free Software Foundation, Inc.
Contributed by Red Hat Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3 of the License, or (at your
option) any later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
/*
7a0a ldc $10,$pc
c0ae000a lw $0,10($10)
caae000e lw $10,14($10)
10ae jmp $10
00000000 static chain
00000000 function address
*/
static inline int
cache_config_register(void) {
int rv;
asm ("ldc\t%0, $ccfg" : "=r" (rv));
return rv;
}
#define ICACHE_SIZE ((cache_config_register() >> 16) & 0x7f)
#define DCACHE_SIZE (cache_config_register() & 0x7f)
#define ICACHE_DATA_BASE 0x00300000
#define ICACHE_TAG_BASE 0x00310000
#define DCACHE_DATA_BASE 0x00320000
#define DCACHE_TAG_BASE 0x00330000
static inline void
flush_dcache (int addr)
{
asm volatile ("cache\t0, (%0)" : : "r" (addr));
}
void
__mep_trampoline_helper (unsigned long *tramp,
int function_address,
int static_chain);
void
__mep_trampoline_helper (unsigned long *tramp,
int function_address,
int static_chain)
{
int dsize, isize;
#ifdef __LITTLE_ENDIAN__
tramp[0] = 0xc0ae7a0a;
tramp[1] = 0xcaae000a;
tramp[2] = 0x10ae000e;
#else
tramp[0] = 0x7a0ac0ae;
tramp[1] = 0x000acaae;
tramp[2] = 0x000e10ae;
#endif
tramp[3] = static_chain;
tramp[4] = function_address;
dsize = DCACHE_SIZE;
isize = ICACHE_SIZE;
if (dsize)
{
flush_dcache ((int)tramp);
flush_dcache ((int)tramp+16);
}
if (isize)
{
int imask = (isize * 1024) - 1;
int tmask = ~imask;
unsigned int i;
volatile unsigned int *tags;
imask &= 0xffe0;
for (i=(unsigned int)tramp; i<(unsigned int)tramp+20; i+=16)
{
tags = (unsigned int *)(ICACHE_TAG_BASE + (i & imask));
if ((*tags & tmask) == (i & tmask))
*tags &= ~1;
}
}
}

7311
gcc/config/mep/mep.c Normal file

File diff suppressed because it is too large Load Diff

1
gcc/config/mep/mep.cpu Normal file
View File

@ -0,0 +1 @@
(include "mep-default.cpu")

860
gcc/config/mep/mep.h Normal file
View File

@ -0,0 +1,860 @@
/* Definitions for Toshiba Media Processor
Copyright (C) 2001, 2003, 2004, 2005, 2007, 2008, 2009
Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#undef CPP_SPEC
#define CPP_SPEC "\
-D__MEP__ -D__MeP__ \
-D__section(_x)=__attribute__((section(_x))) \
-D__align(_x)=__attribute__((aligned(_x))) \
-D__io(_x)=__attribute__((io(_x))) \
-D__cb(_x)=__attribute__((cb(_x))) \
-D__based=__attribute__((based)) \
-D__tiny=__attribute__((tiny)) \
-D__near=__attribute__((near)) \
-D__far=__attribute__((far)) \
-D__vliw=__attribute__((vliw)) \
-D__interrupt=__attribute__((interrupt)) \
-D__disinterrupt=__attribute__((disinterrupt)) \
-D__cop=__attribute__((cop)) \
%{!meb:%{!mel:-D__BIG_ENDIAN__}} \
%{meb:-U__LITTLE_ENDIAN__ -D__BIG_ENDIAN__} \
%{mel:-U__BIG_ENDIAN__ -D__LITTLE_ENDIAN__} \
%{mconfig=*:-D__MEP_CONFIG_%*} \
%{mivc2:-D__MEP_CONFIG_CP_DATA_BUS_WIDTH=64} \
"
#undef CC1_SPEC
#define CC1_SPEC "%{!mlibrary:%(config_cc_spec)} \
%{!.cc:%{O2:%{!funroll*:--param max-completely-peeled-insns=10 \
--param max-unrolled-insns=10 -funroll-loops}}}"
#undef CC1PLUS_SPEC
#define CC1PLUS_SPEC "%{!mlibrary:%(config_cc_spec)}"
#undef ASM_SPEC
#define ASM_SPEC "%{mconfig=*} %{meb:-EB} %{mel:-EL} \
%{mno-satur} %{msatur} %{mno-clip} %{mclip} %{mno-minmax} %{mminmax} \
%{mno-absdiff} %{mabsdiff} %{mno-leadz} %{mleadz} %{mno-bitops} %{mbitops} \
%{mno-div} %{mdiv} %{mno-mult} %{mmult} %{mno-average} %{maverage} \
%{mcop32} %{mno-debug} %{mdebug} %{mlibrary}"
/* The MeP config tool will edit this spec. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{msdram:%{msim:simsdram-crt0.o%s}} \
%{mno-sdram:%{msim:sim-crt0.o%s}} \
%{msdram:%{!msim*:sdram-crt0.o%s}} \
%{mno-sdram:%{!msim*:crt0.o%s}} \
%(config_start_spec) \
%{msimnovec:simnovec-crt0.o%s} \
crtbegin.o%s"
#undef LIB_SPEC
#define LIB_SPEC "-( -lc %{msim*:-lsim}%{!msim*:-lnosys} -) %(config_link_spec)"
#undef LINK_SPEC
#define LINK_SPEC "%{meb:-EB} %{mel:-EL}"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s %{msim*:sim-crtn.o%s}%{!msim*:crtn.o%s}"
/* The MeP config tool will edit this spec. */
#define CONFIG_CC_SPEC "\
%{mconfig=default: -mbitops -mleadz -mabsdiff -maverage -mminmax -mclip -msatur -mvl64 -mvliw -mcop64 -D__MEP_CONFIG_CP_DATA_BUS_WIDTH=64 -mivc2}\
"
/* end-config-cc-spec */
/* The MeP config tool will edit this spec. */
#define CONFIG_LINK_SPEC "\
%{mconfig=default: %{!T*:-Tdefault.ld}}\
"
/* end-config-link-spec */
/* The MeP config tool will edit this spec. */
#define CONFIG_START_SPEC "\
%{!msdram:%{!mno-sdram:%{!msim*:crt0.o%s}}} \
%{!msdram:%{!mno-sdram:%{msim:sim-crt0.o%s}}} \
"
/* end-config-start-spec */
#define EXTRA_SPECS \
{ "config_cc_spec", CONFIG_CC_SPEC }, \
{ "config_link_spec", CONFIG_LINK_SPEC }, \
{ "config_start_spec", CONFIG_START_SPEC },
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("mep"); \
builtin_assert ("machine=mep"); \
} \
while (0)
extern int target_flags;
/* Controlled by MeP-Integrator. */
#define TARGET_H1 0
#define MEP_ALL_OPTS (MASK_OPT_AVERAGE \
| MASK_OPT_MULT \
| MASK_OPT_DIV \
| MASK_OPT_BITOPS \
| MASK_OPT_LEADZ \
| MASK_OPT_ABSDIFF \
| MASK_OPT_MINMAX \
| MASK_OPT_CLIP \
| MASK_OPT_SATUR )
#define TARGET_DEFAULT (MASK_IO_VOLATILE | MASK_OPT_REPEAT | MEP_ALL_OPTS | MASK_LITTLE_ENDIAN)
#define TARGET_IO_NO_VOLATILE (! (target_flags & MASK_IO_VOLATILE))
#define TARGET_OPT_NOREPEAT (! (target_flags & MASK_OPT_REPEAT))
#define TARGET_32BIT_CR_REGS (! (target_flags & MASK_64BIT_CR_REGS))
#define TARGET_BIG_ENDIAN (! (target_flags & MASK_LITTLE_ENDIAN))
#define TARGET_COPRO_MULT 0
#define TARGET_VERSION fprintf (stderr, " (Toshiba Media Processor (MeP))");
#define OVERRIDE_OPTIONS mep_override_options ();
/* The MeP config tool will add TARGET_OPTION_TRANSLATE_TABLE here. */
#define TARGET_OPTION_TRANSLATE_TABLE \
{"-mall-opts", "-maverage -mmult -mdiv -mbitops -mleadz \
-mabsdiff -mminmax -mclip -msatur -mdebug" }, \
{"-mno-opts", "-mno-average -mno-mult -mno-div -mno-bitops -mno-leadz \
-mno-absdiff -mno-minmax -mno-clip -mno-satur -mno-debug" }, \
{"-mfar", "-ml -mtf -mc=far" } \
/* start-target-option-table */ \
, {"-mconfig=default", "-mconfig=default -mmult -mdiv -D__MEP_CONFIG_ISA=1" } \
/* end-target-option-table */
/* The MeP config tool will replace this as appropriate. */
#define DEFAULT_ENDIAN_SPEC "%{!meb: -mel}"
/* The MeP config tool will replace this with an -mconfig= switch. */
#define LIBRARY_CONFIG_SPEC "-mconfig=default"
/* Don't add an endian option when building the libraries. */
#define DRIVER_SELF_SPECS \
"%{!mlibrary:" DEFAULT_ENDIAN_SPEC "}", \
"%{mlibrary: " LIBRARY_CONFIG_SPEC " %{!mel:-meb}}"
/* The MeP config tool will add COPROC_SELECTION_TABLE here. */
/* start-coproc-selection-table */
#define COPROC_SELECTION_TABLE \
{"default", ISA_EXT1}
/* end-coproc-selection-table */
#define CAN_DEBUG_WITHOUT_FP
#define OPTIMIZATION_OPTIONS(LEVEL, FOR_SIZE) mep_optimization_options ()
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN ? 0 : 1)
#define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN ? 0 : 1)
#ifdef __LITTLE_ENDIAN__
#define LIBGCC2_WORDS_BIG_ENDIAN 0
#else
#define LIBGCC2_WORDS_BIG_ENDIAN 1
#endif
#define UNITS_PER_WORD 4
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
do \
{ \
if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < 4) \
(MODE) = SImode; \
} \
while (0)
#define PARM_BOUNDARY 32
#define STACK_BOUNDARY 32
#define PREFERRED_STACK_BOUNDARY 64
#define FUNCTION_BOUNDARY 16
#define BIGGEST_ALIGNMENT 64
#define DATA_ALIGNMENT(TYPE, ALIGN) \
(TREE_CODE (TYPE) == ARRAY_TYPE \
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
(TREE_CODE (EXP) == STRING_CST \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define STRICT_ALIGNMENT 1
#define PCC_BITFIELD_TYPE_MATTERS 1
#define DEFAULT_VTABLE_THUNKS 1
#define INT_TYPE_SIZE 32
#define SHORT_TYPE_SIZE 16
#define LONG_TYPE_SIZE 32
#define LONG_LONG_TYPE_SIZE 64
#define CHAR_TYPE_SIZE 8
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
#define DEFAULT_SIGNED_CHAR 1
/* Register numbers:
0..15 core registers
16..47 control registers
48..79 coprocessor registers
80..111 coprocessor control registers
112 virtual arg pointer register */
#define FIRST_PSEUDO_REGISTER (LAST_SHADOW_REGISTER + 1)
/* R12 is optionally FP. R13 is TP, R14 is GP, R15 is SP. */
/* hi and lo can be used as general registers. Others have
immutable bits. */
/* A "1" here means the register is generally not available to gcc,
and is assumed to remain unchanged or unused throughout. */
#define FIXED_REGISTERS { \
/* core registers */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
/* control registers */ \
1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* coprocessor registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* coprocessor control registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* virtual arg pointer */ \
1, FIXED_SHADOW_REGISTERS \
}
/* This is a call-clobbered reg not used for args or return value,
that we use as a temp for saving control registers in the prolog
and restoring them in the epilog. */
#define REGSAVE_CONTROL_TEMP 11
/* A "1" here means a register may be changed by a function without
needing to preserve its previous value. */
#define CALL_USED_REGISTERS { \
/* core registers */ \
1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, \
/* control registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* coprocessor registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* coprocessor control registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* virtual arg pointer */ \
1, CALL_USED_SHADOW_REGISTERS \
}
#define CONDITIONAL_REGISTER_USAGE \
mep_conditional_register_usage (fixed_regs, call_used_regs);
#define REG_ALLOC_ORDER { \
/* core registers */ \
3, 2, 1, 0, 9, 10, 11, 12, 4, 5, 6, 7, 8, 13, 14, 15, \
/* control registers */ \
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
/* coprocessor registers */ \
/* Prefer to use the non-loadable registers when looking for a \
member of CR_REGS (as opposed to LOADABLE_CR_REGS). */ \
64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 48, 49, 50, 51, 52, 58, \
59, 60, 61, 62, 63, 53, 54, 55, 56, 57, 74, 75, 76, 77, 78, 79, \
/* coprocessor control registers */ \
80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, \
/* virtual arg pointer */ \
112, SHADOW_REG_ALLOC_ORDER \
}
/* We must somehow disable register remapping for interrupt functions. */
extern char mep_leaf_registers[];
#define LEAF_REGISTERS mep_leaf_registers
#define LEAF_REG_REMAP(REG) (REG)
#define FIRST_GR_REGNO 0
#define FIRST_CONTROL_REGNO (FIRST_GR_REGNO + 16)
#define FIRST_CR_REGNO (FIRST_CONTROL_REGNO + 32)
#define FIRST_CCR_REGNO (FIRST_CR_REGNO + 32)
#define GR_REGNO_P(REGNO) \
((unsigned) ((REGNO) - FIRST_GR_REGNO) < 16)
#define CONTROL_REGNO_P(REGNO) \
((unsigned) ((REGNO) - FIRST_CONTROL_REGNO) < 32)
#define LOADABLE_CR_REGNO_P(REGNO) \
((unsigned) ((REGNO) - FIRST_CR_REGNO) < 16)
#define CR_REGNO_P(REGNO) \
((unsigned) ((REGNO) - FIRST_CR_REGNO) < 32)
#define CCR_REGNO_P(REGNO) \
((unsigned) ((REGNO) - FIRST_CCR_REGNO) < 32)
#define ANY_CONTROL_REGNO_P(REGNO) \
(CONTROL_REGNO_P (REGNO) || CCR_REGNO_P (REGNO))
#define HARD_REGNO_NREGS(REGNO, MODE) \
((CR_REGNO_P (REGNO) && TARGET_64BIT_CR_REGS) \
? (GET_MODE_SIZE (MODE) + 8 - 1) / 8 \
: (GET_MODE_SIZE (MODE) + 4 - 1) / 4)
#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
#define MODES_TIEABLE_P(MODE1, MODE2) 1
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
mep_cannot_change_mode_class (FROM, TO, CLASS)
enum reg_class
{
NO_REGS,
SP_REGS,
TP_REGS,
GP_REGS,
R0_REGS,
RPC_REGS,
HI_REGS,
LO_REGS,
HILO_REGS,
TPREL_REGS,
GENERAL_NOT_R0_REGS,
GENERAL_REGS,
CONTROL_REGS,
CONTROL_OR_GENERAL_REGS,
USER0_REGS,
USER1_REGS,
USER2_REGS,
USER3_REGS,
LOADABLE_CR_REGS,
CR_REGS,
CCR_REGS,
ALL_REGS,
LIM_REG_CLASSES
};
#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
#define REG_CLASS_NAMES { \
"NO_REGS", \
"SP_REGS", \
"TP_REGS", \
"GP_REGS", \
"R0_REGS", \
"RPC_REGS", \
"HI_REGS", \
"LO_REGS", \
"HILO_REGS", \
"TPREL_REGS", \
"GENERAL_NOT_R0_REGS", \
"GENERAL_REGS", \
"CONTROL_REGS", \
"CONTROL_OR_GENERAL_REGS", \
"USER0_REGS", \
"USER1_REGS", \
"USER2_REGS", \
"USER3_REGS", \
"LOADABLE_CR_REGS", \
"CR_REGS", \
"CCR_REGS", \
"ALL_REGS" }
#define REG_CLASS_CONTENTS { \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
{ 0x00008000, 0x00000000, 0x00000000, 0x00000000 }, /* SP_REGS */ \
{ 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* TP_REGS */ \
{ 0x00004000, 0x00000000, 0x00000000, 0x00000000 }, /* GP_REGS */ \
{ 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, /* R0_REGS */ \
{ 0x00400000, 0x00000000, 0x00000000, 0x00000000 }, /* RPC_REGS */ \
{ 0x00800000, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */ \
{ 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* LO_REGS */ \
{ 0x01800000, 0x00000000, 0x00000000, 0x00000000 }, /* HILO_REGS */ \
{ 0x000000ff, 0x00000000, 0x00000000, 0x00000000 }, /* TPREL_REGS */ \
{ 0x0000fffe, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_NOT_R0_REGS */ \
{ 0x0000ffff, 0x00000000, 0x00000000, 0x00010000 }, /* GENERAL_REGS */ \
{ 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, /* CONTROL_REGS */ \
{ 0xffffffff, 0x0000ffff, 0x00000000, 0x00000000 }, /* CONTROL_OR_GENERAL_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER1_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER2_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER3_REGS */ \
{ 0x00000000, 0xffff0000, 0x00000000, 0x00000000 }, /* LOADABLE_CR_REGS */ \
{ 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, /* CR_REGS */ \
{ 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, /* CCR_REGS */ \
{ 0xffffffff, 0xffffffff, 0xffffffff, 0x0001ffff }, /* ALL_REGS */ \
}
#define REGNO_REG_CLASS(REGNO) mep_regno_reg_class (REGNO)
#define IRA_COVER_CLASSES { GENERAL_REGS, CONTROL_REGS, CR_REGS, CCR_REGS, LIM_REG_CLASSES }
#define BASE_REG_CLASS GENERAL_REGS
#define INDEX_REG_CLASS GENERAL_REGS
#if 0
#define REG_CLASS_FROM_CONSTRAINT(CHAR, STRING) \
mep_reg_class_from_constraint (CHAR, STRING)
#endif
#define REGNO_OK_FOR_BASE_P(NUM) (GR_REGNO_P (NUM) \
|| (NUM) == ARG_POINTER_REGNUM \
|| (NUM) >= FIRST_PSEUDO_REGISTER)
#define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
#define PREFERRED_RELOAD_CLASS(X, CLASS) mep_preferred_reload_class (X, CLASS)
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
mep_secondary_input_reload_class (CLASS, MODE, X)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
mep_secondary_output_reload_class (CLASS, MODE, X)
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
mep_secondary_memory_needed (CLASS1, CLASS2, MODE)
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#if 0
#define CONST_OK_FOR_LETTER_P(VALUE, C) mep_const_ok_for_letter_p (VALUE, C)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
#define CONSTRAINT_LEN(C, STR) \
((C) == 'e' ? 2 : DEFAULT_CONSTRAINT_LEN (C, STR))
#define EXTRA_CONSTRAINT(VALUE, C) mep_extra_constraint (VALUE, C)
#endif
#define WANT_GCC_DECLARATIONS
#include "mep-intrin.h"
#undef WANT_GCC_DECLARATIONS
extern int mep_intrinsic_insn[];
extern unsigned int mep_selected_isa;
/* True if intrinsic X is available. X is a mep_* value declared
in mep-intrin.h. */
#define MEP_INTRINSIC_AVAILABLE_P(X) (mep_intrinsic_insn[X] >= 0)
/* Used to define CGEN_ENABLE_INTRINSIC_P in mep-intrin.h. */
#define CGEN_CURRENT_ISAS mep_selected_isa
#define CGEN_CURRENT_GROUP \
(mep_vliw_function_p (cfun->decl) ? GROUP_VLIW : GROUP_NORMAL)
#define STACK_GROWS_DOWNWARD 1
#define FRAME_GROWS_DOWNWARD 1
#define STARTING_FRAME_OFFSET 0
#define FIRST_PARM_OFFSET(FUNDECL) 0
#define INCOMING_FRAME_SP_OFFSET 0
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) mep_return_addr_rtx (COUNT)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, LP_REGNO)
#define DWARF_FRAME_RETURN_COLUMN LP_REGNO
#define STACK_POINTER_REGNUM 15
#define FRAME_POINTER_REGNUM 8
#define ARG_POINTER_REGNUM 112
#define RETURN_ADDRESS_POINTER_REGNUM 17
#define STATIC_CHAIN_REGNUM 0
#define FRAME_POINTER_REQUIRED 0
#define ELIMINABLE_REGS \
{ \
{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
}
#define CAN_ELIMINATE(FROM, TO) \
((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
? ! frame_pointer_needed \
: 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = mep_elimination_offset (FROM, TO)
#define ACCUMULATE_OUTGOING_ARGS 1
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
/* The ABI is thus: Arguments are in $1, $2, $3, $4, stack. Arguments
larger than 4 bytes are passed indirectly. Return value in 0,
unless bigger than 4 bytes, then the caller passes a pointer as the
first arg. For varargs, we copy $1..$4 to the stack. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
mep_function_arg (CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) 1
typedef struct
{
int nregs;
int vliw;
} CUMULATIVE_ARGS;
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
mep_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
mep_arg_advance (& (CUM), MODE, TYPE, NAMED)
#define FUNCTION_ARG_REGNO_P(REGNO) ((REGNO) >= 1 && (REGNO) <= 4)
#define RETURN_VALUE_REGNUM 0
#define FUNCTION_VALUE(VALTYPE, FUNC) mep_function_value (VALTYPE, FUNC)
#define LIBCALL_VALUE(MODE) mep_libcall_value (MODE)
#define FUNCTION_VALUE_REGNO_P(REGNO) \
((REGNO) == RETURN_VALUE_REGNUM)
#define DEFAULT_PCC_STRUCT_RETURN 0
#define STRUCT_VALUE 0
#define FUNCTION_OK_FOR_SIBCALL(DECL) mep_function_ok_for_sibcall(DECL)
/* Prologue and epilogues are all handled via RTL. */
#define EXIT_IGNORE_STACK 1
#define EPILOGUE_USES(REGNO) mep_epilogue_uses (REGNO)
/* Profiling is supported. */
#define FUNCTION_PROFILER(FILE, LABELNO) mep_function_profiler (FILE);
#undef TARGET_HAS_F_SETLKW
#define NO_PROFILE_COUNTERS 1
/* Trampolines are built at run-time. The cache is invalidated at
run-time also. */
#define TRAMPOLINE_SIZE 20
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
mep_init_trampoline (ADDR, FNADDR, STATIC_CHAIN)
#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
#define MAX_REGS_PER_ADDRESS 1
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
if (mep_legitimate_address ((MODE), (X), 1)) goto LABEL
#else
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
if (mep_legitimate_address ((MODE), (X), 0)) goto LABEL
#endif
#ifdef REG_OK_STRICT
#define REG_OK_FOR_BASE_P(X) GR_REGNO_P (REGNO (X))
#else
#define REG_OK_FOR_BASE_P(X) (GR_REGNO_P (REGNO (X)) \
|| REGNO (X) == ARG_POINTER_REGNUM \
|| REGNO (X) >= FIRST_PSEUDO_REGISTER)
#endif
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
if (mep_legitimize_reload_address (&(X), (MODE), (OPNUM), (TYPE), (IND_LEVELS))) \
goto WIN
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define LEGITIMATE_CONSTANT_P(X) 1
#define SELECT_CC_MODE(OP, X, Y) CCmode
/* Moves between control regs need a scratch. */
#define REGISTER_MOVE_COST(MODE, FROM, TO) mep_register_move_cost (MODE, FROM, TO)
#define SLOW_BYTE_ACCESS 1
/* Define this macro if it is as good or better to call a constant function
address than to call an address kept in a register. */
#define NO_FUNCTION_CSE
#define TEXT_SECTION_ASM_OP "\t.text\n\t.core"
#define DATA_SECTION_ASM_OP "\t.data"
#define BSS_SECTION_ASM_OP ".bss"
#define TARGET_ASM_FILE_END mep_file_cleanups
#define ASM_APP_ON "#APP\n"
#define ASM_APP_OFF "#NO_APP\n"
#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
do \
{ \
long l[2]; \
\
REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
fprintf (FILE, "\t.long\t0x%lx,0x%lx\n", l[0], l[1]); \
} \
while (0)
#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
do \
{ \
long l; \
\
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
fprintf ((FILE), "\t.long\t0x%lx\n", l); \
} \
while (0)
#define ASM_OUTPUT_CHAR(FILE, VALUE) \
do \
{ \
fprintf (FILE, "\t.byte\t"); \
output_addr_const (FILE, (VALUE)); \
fprintf (FILE, "\n"); \
} \
while (0)
#define ASM_OUTPUT_SHORT(FILE, VALUE) \
do \
{ \
fprintf (FILE, "\t.hword\t"); \
output_addr_const (FILE, (VALUE)); \
fprintf (FILE, "\n"); \
} \
while (0)
#define ASM_OUTPUT_INT(FILE, VALUE) \
do \
{ \
fprintf (FILE, "\t.word\t"); \
output_addr_const (FILE, (VALUE)); \
fprintf (FILE, "\n"); \
} \
while (0)
#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
/* Most of these are here to support based/tiny/far/io attributes. */
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
mep_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 1)
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
mep_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0)
#define ASM_OUTPUT_LABEL(STREAM, NAME) \
do \
{ \
assemble_name (STREAM, NAME); \
fputs (":\n", STREAM); \
} \
while (0)
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.globl "
#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
asm_fprintf ((STREAM), "%U%s", mep_strip_name_encoding (NAME))
#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \
do \
{ \
(OUTVAR) = (char *) alloca (strlen ((NAME)) + 12); \
sprintf ((OUTVAR), "%s.%ld", (NAME), (long)(NUMBER)); \
} \
while (0)
#define REGISTER_NAMES \
{ \
/* Core registers. */ \
"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", \
"$8", "$9", "$10", "$11", "$12", "$tp", "$gp", "$sp", \
/* Control registers. */ \
"$pc", "$lp", "$sar", "3", "$rpb", "$rpe", "$rpc", "$hi", \
"$lo", "9", "10", "11", "$mb0", "$me0", "$mb1", "$me1", \
"$psw", "$id", "$tmp", "$epc", "$exc", "$cfg", "22", "$npc", \
"$dbg", "$depc", "$opt", "$rcfg", "$ccfg", "29", "30", "31", \
/* Coprocessor registers. */ \
"$c0", "$c1", "$c2", "$c3", "$c4", "$c5", "$c6", "$c7", \
"$c8", "$c9", "$c10", "$c11", "$c12", "$c13", "$c14", "$c15", \
"$c16", "$c17", "$c18", "$c19", "$c20", "$c21", "$c22", "$c23", \
"$c24", "$c25", "$c26", "$c27", "$c28", "$c29", "$c30", "$c31", \
/* Coprocessor control registers. */ \
"$ccr0", "$ccr1", "$ccr2", "$ccr3", "$ccr4", "$ccr5", "$ccr6", \
"$ccr7", "$ccr8", "$ccr9", "$ccr10", "$ccr11", "$ccr12", "$ccr13", \
"$ccr14", "$ccr15", "$ccr16", "$ccr17", "$ccr18", "$ccr19", "$ccr20", \
"$ccr21", "$ccr22", "$ccr23", "$ccr24", "$ccr25", "$ccr26", "$ccr27", \
"$ccr28", "$ccr29", "$ccr30", "$ccr31", \
/* Virtual arg pointer. */ \
"$argp", SHADOW_REGISTER_NAMES \
}
/* We duplicate some of the above because we twiddle the above
according to *how* the registers are used. Likewise, we include
the standard names for coprocessor control registers so that
coprocessor options can rename them in the default table. Note
that these are compared to stripped names (see REGISTER_PREFIX
below). */
#define ADDITIONAL_REGISTER_NAMES \
{ \
{ "8", 8 }, { "fp", 8 }, \
{ "13", 13 }, { "tp", 13 }, \
{ "14", 14 }, { "gp", 14 }, \
{ "15", 15 }, { "sp", 15 }, \
{ "ccr0", FIRST_CCR_REGNO + 0 }, \
{ "ccr1", FIRST_CCR_REGNO + 1 }, \
{ "ccr2", FIRST_CCR_REGNO + 2 }, \
{ "ccr3", FIRST_CCR_REGNO + 3 }, \
{ "ccr4", FIRST_CCR_REGNO + 4 }, \
{ "ccr5", FIRST_CCR_REGNO + 5 }, \
{ "ccr6", FIRST_CCR_REGNO + 6 }, \
{ "ccr7", FIRST_CCR_REGNO + 7 }, \
{ "ccr8", FIRST_CCR_REGNO + 8 }, \
{ "ccr9", FIRST_CCR_REGNO + 9 }, \
{ "ccr10", FIRST_CCR_REGNO + 10 }, \
{ "ccr11", FIRST_CCR_REGNO + 11 }, \
{ "ccr12", FIRST_CCR_REGNO + 12 }, \
{ "ccr13", FIRST_CCR_REGNO + 13 }, \
{ "ccr14", FIRST_CCR_REGNO + 14 }, \
{ "ccr15", FIRST_CCR_REGNO + 15 }, \
{ "ccr16", FIRST_CCR_REGNO + 16 }, \
{ "ccr17", FIRST_CCR_REGNO + 17 }, \
{ "ccr18", FIRST_CCR_REGNO + 18 }, \
{ "ccr19", FIRST_CCR_REGNO + 19 }, \
{ "ccr20", FIRST_CCR_REGNO + 20 }, \
{ "ccr21", FIRST_CCR_REGNO + 21 }, \
{ "ccr22", FIRST_CCR_REGNO + 22 }, \
{ "ccr23", FIRST_CCR_REGNO + 23 }, \
{ "ccr24", FIRST_CCR_REGNO + 24 }, \
{ "ccr25", FIRST_CCR_REGNO + 25 }, \
{ "ccr26", FIRST_CCR_REGNO + 26 }, \
{ "ccr27", FIRST_CCR_REGNO + 27 }, \
{ "ccr28", FIRST_CCR_REGNO + 28 }, \
{ "ccr29", FIRST_CCR_REGNO + 29 }, \
{ "ccr30", FIRST_CCR_REGNO + 30 }, \
{ "ccr31", FIRST_CCR_REGNO + 31 } \
}
/* We watch for pipeline hazards with these */
#define ASM_OUTPUT_OPCODE(STREAM, PTR) mep_asm_output_opcode (STREAM, PTR)
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) mep_final_prescan_insn (INSN, OPVEC, NOPERANDS)
#define PRINT_OPERAND(STREAM, X, CODE) mep_print_operand (STREAM, X, CODE)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '!' || (CODE) == '<')
#define PRINT_OPERAND_ADDRESS(STREAM, X) mep_print_operand_address (STREAM, X)
#define REGISTER_PREFIX "$"
#define LOCAL_LABEL_PREFIX "."
#define USER_LABEL_PREFIX ""
#define IMMEDIATE_PREFIX ""
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t.word .L%d\n", VALUE)
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
#define DWARF2_DEBUGGING_INFO 1
#define DWARF2_UNWIND_INFO 1
#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) + 10 : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_RTX mep_return_stackadj_rtx ()
#define EH_RETURN_HANDLER_RTX mep_return_handler_rtx ()
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
fprintf ((STREAM), "\t.p2align %d\n", (POWER))
#define CASE_VECTOR_MODE SImode
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
#define SHORT_IMMEDIATES_SIGN_EXTEND
#define MOVE_MAX 4
#define SHIFT_COUNT_TRUNCATED 1
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define STORE_FLAG_VALUE 1
#define Pmode SImode
#define FUNCTION_MODE SImode
#define REGISTER_TARGET_PRAGMAS() mep_register_pragmas ()
#define HANDLE_PRAGMA_PACK_PUSH_POP 1
/* If defined, a C expression to determine the base term of address X.
This macro is used in only one place: `find_base_term' in alias.c.
It is always safe for this macro to not be defined. It exists so
that alias analysis can understand machine-dependent addresses.
The typical use of this macro is to handle addresses containing
a label_ref or symbol_ref within an UNSPEC. */
#define FIND_BASE_TERM(X) mep_find_base_term (X)
/* start-sanitize-never */
#define INCLUDE_MEP_EEMBC
#define NO_GCSE_BACK_EDGE_INSERTIONS
/* end-sanitize-never */

2258
gcc/config/mep/mep.md Normal file

File diff suppressed because it is too large Load Diff

163
gcc/config/mep/mep.opt Normal file
View File

@ -0,0 +1,163 @@
; Target specific command line options for the MEP port of the compiler.
; Copyright (C) 2005, 2007, 2009 Free Software Foundation, Inc.
; Contributed by Red Hat Inc.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>. */
mabsdiff
Target Mask(OPT_ABSDIFF)
Enable absolute difference instructions
mall-opts
Target RejectNegative
Enable all optional instructions
maverage
Target Mask(OPT_AVERAGE)
Enable average instructions
mbased=
Target Joined Var(mep_based_cutoff) RejectNegative UInteger Init(0)
Variables this size and smaller go in the based section. (default 0)
mbitops
Target Mask(OPT_BITOPS)
Enable bit manipulation instructions
mc=
Target Joined Var(mep_const_section) RejectNegative
Section to put all const variables in (tiny, near, far) (no default)
mclip
Target Mask(OPT_CLIP)
Enable clip instructions
mconfig=
Target Joined Var(mep_config_string) RejectNegative
Configuration name
mcop
Target Mask(COP)
Enable MeP Coprocessor
mcop32
Target Mask(COP) MaskExists RejectNegative
Enable MeP Coprocessor with 32-bit registers
mcop64
Target Mask(64BIT_CR_REGS) RejectNegative
Enable MeP Coprocessor with 64-bit registers
mivc2
Target Mask(IVC2) RejectNegative
Enable IVC2 scheduling
mdc
Target Mask(DC) RejectNegative
Const variables default to the near section
mdebug
Target Disabled Undocumented
mdiv
Target Mask(OPT_DIV)
Enable 32-bit divide instructions
meb
Target InverseMask(LITTLE_ENDIAN) RejectNegative
Use big-endian byte order
mel
Target Mask(LITTLE_ENDIAN) RejectNegative
Use little-endian byte order
mfar
Target RejectNegative
Enable -ml, -mtf, and -mc=far
mio-volatile
Target Mask(IO_VOLATILE)
__io vars are volatile by default
ml
Target Mask(L) RejectNegative
All variables default to the far section
mleadz
Target Mask(OPT_LEADZ)
Enable leading zero instructions
mlibrary
Target Mask(LIBRARY) RejectNegative Undocumented
mm
Target Mask(M) RejectNegative
All variables default to the near section
mminmax
Target Mask(OPT_MINMAX)
Enable min/max instructions
mmult
Target Mask(OPT_MULT)
Enable 32-bit multiply instructions
mno-opts
Target RejectNegative
Disable all optional instructions
mrand-tpgp
Target Mask(RAND_TPGP) RejectNegative Undocumented
mrepeat
Target Mask(OPT_REPEAT)
Allow gcc to use the repeat/erepeat instructions
ms
Target Mask(S) RejectNegative
All variables default to the tiny section
msatur
Target Mask(OPT_SATUR)
Enable saturation instructions
msdram
Target
Use sdram version of runtime
msim
Target RejectNegative
Use simulator runtime
msimnovec
Target RejectNegative
Use simulator runtime without vectors
mtf
Target Mask(TF) RejectNegative
All functions default to the far section
mtiny=
Target Joined Var(mep_tiny_cutoff) RejectNegative UInteger Init(4)
Variables this size and smaller go in the tiny section. (default 4)
mvl32
Target InverseMask(OPT_VL64) Undocumented RejectNegative
mvl64
Target Mask(OPT_VL64) Undocumented RejectNegative
mvliw
Target Mask(VLIW) Undocumented

View File

@ -0,0 +1,184 @@
;; Toshiba Media Processor Machine predicates
;; Copyright (C) 2009 Free Software Foundation, Inc.
;; Contributed by Red Hat Inc.
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
;; License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; (define_predicate "cgen_h_uint_7a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_6a2_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_22a4_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_sint_2a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_24a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_sint_6a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_5a4_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_2a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_16a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_3a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_5a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_sint_16a1_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_sint_5a8_immediate"
;; (match_code "const_int"))
;; (define_predicate "cgen_h_uint_4a1_immediate"
;; (match_code "const_int"))
(define_predicate "cgen_h_sint_7a2_immediate"
(match_code "const_int")
{ int i = INTVAL (op);
return ((i & 1) == 0 && i >= -128 && i < 128);
})
(define_predicate "cgen_h_sint_6a4_immediate"
(match_code "const_int")
{ int i = INTVAL (op);
return ((i & 3) == 0 && i >= -256 && i < 256);
})
;; This is used below, to simplify things.
(define_predicate "mep_subreg_operand"
(ior
(and (and (and (match_code "subreg")
(match_code "reg" "0"))
(match_test "REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER"))
(match_test "!(reload_completed || reload_in_progress)"))
(and (match_code "reg")
(match_test "REGNO (op) >= FIRST_PSEUDO_REGISTER"))))
(define_predicate "symbolic_operand"
(match_code "const,symbol_ref,label_ref"))
(define_predicate "mep_farsym_operand"
(and (match_code "const,symbol_ref")
(match_test "mep_section_tag (op) == 'f'")))
(define_predicate "mep_nearsym_operand"
(and (match_code "const,symbol_ref,label_ref")
(match_test "mep_section_tag (op) != 'f'")))
(define_predicate "mep_movdest_operand"
(and (match_test "mep_section_tag (op) != 'f'")
(match_operand 0 "nonimmediate_operand")))
(define_predicate "mep_r0_15_operand"
(ior (match_operand 0 "mep_subreg_operand")
(and (match_code "reg")
(match_test "GR_REGNO_P (REGNO (op))"))))
(define_predicate "mep_r0_operand"
(and (match_code "reg")
(ior (match_test "REGNO (op) == 0")
(match_test "!(reload_completed || reload_in_progress)
&& REGNO (op) >= FIRST_PSEUDO_REGISTER"))))
(define_predicate "mep_hi_operand"
(ior (match_operand 0 "mep_subreg_operand")
(and (match_code "reg")
(match_test "REGNO (op) == HI_REGNO"))))
(define_predicate "mep_lo_operand"
(ior (match_operand 0 "mep_subreg_operand")
(and (match_code "reg")
(match_test "REGNO (op) == LO_REGNO"))))
(define_predicate "mep_tp_operand"
(ior (match_operand 0 "mep_subreg_operand")
(and (match_code "reg")
(match_test "REGNO (op) == TP_REGNO"))))
(define_predicate "mep_gp_operand"
(ior (match_operand 0 "mep_subreg_operand")
(and (match_code "reg")
(match_test "REGNO (op) == GP_REGNO"))))
(define_predicate "mep_sp_operand"
(match_test "op == stack_pointer_rtx"))
(define_predicate "mep_tprel_operand"
(ior (match_operand 0 "mep_subreg_operand")
(and (match_code "reg")
(match_test "REGNO (op) < 8"))))
(define_predicate "mep_call_address_operand"
(and (match_test "mep_section_tag (op) != 'f'")
(and (ior (not (match_code "symbol_ref"))
(match_test "mep_section_tag (DECL_RTL (cfun->decl)) != 'f'
&& !mep_lookup_pragma_call (XSTR (op, 0))"))
(match_code "symbol_ref,reg"))))
(define_predicate "mep_Y_operand"
(and (match_code "mem")
(match_code "reg" "0")))
(define_predicate "mep_imm4_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
(define_predicate "mep_reg_or_imm4_operand"
(ior (match_code "reg")
(and (match_code "const_int")
(match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15"))))
(define_predicate "mep_imm7a4_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 128 && INTVAL (op) % 4 == 0")))
(define_predicate "mep_slad_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) == 2 || INTVAL (op) == 4")))
(define_predicate "mep_add_operand"
(ior (and (match_code "const")
(and (match_operand 0 "symbolic_operand")
(and (match_test "mep_section_tag(op) == 'b' || mep_section_tag(op) == 't'")
(ior (match_code "unspec" "0")
(and (match_code "plus" "0")
(match_code "unspec" "00"))))))
(match_code "const_int,reg")))
;; Return true if OP is an integer in the range 0..7 inclusive.
;; On the MeP-h1, shifts by such constants execute in a single stage
;; and shifts by larger values execute in two.
(define_predicate "mep_single_shift_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
;; Return true if OP is an operation that can be performed using bsetm,
;; bclrm or bnotm. The possibilities are:
;; bsetm: (ior X Y), Y has one bit set
;; bclrm: (and X Y), Y has one bit clear
;; bnotm: (xor X Y), Y has one bit set.
(define_predicate "mep_bit_operator"
(and (match_code "and,ior,xor")
(match_test "mep_bit_position_p (XEXP (op, 1), GET_CODE (op) != AND)")))
(define_predicate "mep_reload_operand"
(ior (and (match_code "reg")
(match_test "!ANY_CONTROL_REGNO_P (REGNO (op))"))
(and (match_code "mem,symbol_ref")
(match_test "mep_section_tag (op) != 'f'"))))

105
gcc/config/mep/t-mep Normal file
View File

@ -0,0 +1,105 @@
# -*- makefile -*-
# GCC makefile fragment for MeP
# Copyright (C) 2001, 2002, 2003, 2005, 2007, 2009
# Free Software Foundation, Inc.
# Contributed by Red Hat Inc
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
# License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>. */
# Force genpreds to be rebuilt in case MeP-Integrator changed the predicates
GTM_H = tm.h $(tm_file_list) $(srcdir)/config/mep/mep-intrin.h
# Use -O0 instead of -O2 so we don't get complex relocations
CRTSTUFF_CFLAGS = -O0 $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -g0 \
-finhibit-size-directive -fno-inline-functions -fno-exceptions \
-fno-zero-initialized-in-bss -fno-unit-at-a-time
TCFLAGS = -mlibrary
mep-pragma.o: $(srcdir)/config/mep/mep-pragma.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(TREE_H) $(RTL_H) toplev.h c-pragma.h \
$(CPPLIB_H) hard-reg-set.h output.h $(srcdir)/config/mep/mep-protos.h \
function.h insn-config.h reload.h $(TARGET_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
# profiling support
LIB1ASMSRC = mep/mep-lib1.asm
LIB1ASMFUNCS = _mep_profile \
_mep_bb_init_trace \
_mep_bb_init \
_mep_bb_trace \
_mep_bb_increment
# multiply and divide routines
LIB2FUNCS_EXTRA = \
$(srcdir)/config/mep/mep-lib2.c \
$(srcdir)/config/mep/mep-tramp.c
# floating point emulation libraries
FPBIT = fp-bit.c
DPBIT = dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c > dp-bit.c
MULTILIB_OPTIONS = mel mall-opts mfar
MULTILIB_DIRNAMES = el allopt far
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
MD_INCLUDES = \
$(srcdir)/config/mep/intrinsics.md \
$(srcdir)/config/mep/predicates.md \
$(srcdir)/config/mep/constraints.md
mep.o : $(srcdir)/config/mep/mep-intrin.h
# begin-isas
MEP_CORE = ext_core1
MEP_COPRO = ext_cop1_16,ext_cop1_32,ext_cop1_48,ext_cop1_64
# end-isas
# To use this, you must have cgen and cgen/cpu in the same source tree as
# gcc.
cgen-maint :
S=`cd $(srcdir); pwd`; \
cd $$S/config/mep && \
guile -s $$S/../cgen/cgen-intrinsics.scm \
-s $$S/../cgen \
$(CGENFLAGS) \
-a $$S/../cgen/cpu/mep.cpu \
-m mep,c5 \
-i mep,$(MEP_CORE),$(MEP_COPRO) \
-K mep,$(MEP_CORE),$(MEP_COPRO) \
-M intrinsics.md \
-N mep-intrin.h \
-P intrinsics.h
# start-extra-headers
EXTRA_HEADERS = $(srcdir)/config/mep/intrinsics.h \
$(srcdir)/config/mep/default.h
# end-extra-headers

View File

@ -738,6 +738,17 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object,
simplify_while_replacing (loc, to, object, op0_mode);
}
/* Try replacing every occurrence of FROM in subexpression LOC of INSN
with TO. After all changes have been made, validate by seeing
if INSN is still valid. */
int
validate_replace_rtx_subexp (rtx from, rtx to, rtx insn, rtx *loc)
{
validate_replace_rtx_1 (loc, from, to, insn, true);
return apply_change_group ();
}
/* Try replacing every occurrence of FROM in INSN with TO. After all
changes have been made, validate by seeing if INSN is still valid. */

View File

@ -86,6 +86,7 @@ extern int constrain_operands (int);
extern int constrain_operands_cached (int);
extern int memory_address_p (enum machine_mode, rtx);
extern int strict_memory_address_p (enum machine_mode, rtx);
extern int validate_replace_rtx_subexp (rtx, rtx, rtx, rtx *);
extern int validate_replace_rtx (rtx, rtx, rtx);
extern int validate_replace_rtx_part (rtx, rtx, rtx *, rtx);
extern int validate_replace_rtx_part_nosimplify (rtx, rtx, rtx *, rtx);

View File

@ -1,3 +1,8 @@
2009-06-23 DJ Delorie <dj@redhat.com>
Add MeP port.
* lib/target-supports.exp: Add mep support (no profiling).
2009-06-23 Steve Ellcey <sje@cup.hp.com>
PR testsuite/39297

View File

@ -498,6 +498,7 @@ proc check_profiling_available { test_what } {
|| [istarget m32c-*-elf]
|| [istarget m68k-*-elf]
|| [istarget m68k-*-uclinux*]
|| [istarget mep-*-elf]
|| [istarget mips*-*-elf*]
|| [istarget moxie-*-elf*]
|| [istarget xstormy16-*]

View File

@ -1,3 +1,8 @@
2009-06-23 DJ Delorie <dj@redhat.com>
Add MeP port.
* config.host: Add mep support.
2009-06-22 Kai Tietz <kai.tietz@onevision.com>
* config.host: Add i386/${host_address}/t-fprules-softfp and

View File

@ -102,6 +102,8 @@ m32r*-*-*)
;;
m68k-*-*)
;;
mep*-*-*)
;;
mips*-*-*)
cpu_type=mips
;;
@ -553,6 +555,8 @@ am33_2.0-*-linux*)
;;
m32c-*-elf*|m32c-*-rtems*)
;;
mep*-*-*)
;;
*)
echo "*** Configuration ${host} not supported" 1>&2
exit 1

View File

@ -1,3 +1,8 @@
2009-06-23 DJ Delorie <dj@redhat.com>
Add MeP port.
* configure.host: Add mep support.
2009-06-23 Benjamin Kosnik <bkoz@redhat.com>
* doc/doxygen/user.cfg.in (PREDEFINED): Add _GLIBCXX_ATOMIC_BUILTINS_*.

View File

@ -103,6 +103,10 @@ case "${host_cpu}" in
hppa*)
try_cpu=hppa
;;
mep*)
EXTRA_CXX_FLAGS=-mm
try_cpu=generic
;;
mips*)
try_cpu=mips
;;