Fix a bug in tilegx_fixup_pcrel_references...
Fix a bug in tilegx_fixup_pcrel_references, to properly match and fixup the second instruction of the instruction sequence to generate a pc relative address. * config/tilegx/tilegx.c (match_pcrel_step2): Fix instruction pattern. (replace_mov_pcrel_step2): Ditto. From-SVN: r184582
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@ -1,3 +1,9 @@
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2012-02-26 Walter Lee <walt@tilera.com>
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* config/tilegx/tilegx.c (match_pcrel_step2): Fix instruction
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pattern.
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(replace_mov_pcrel_step2): Ditto.
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2012-02-25 Alexandre Oliva <aoliva@redhat.com>
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PR debug/52001
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@ -4420,7 +4420,9 @@ replace_mov_pcrel_step1 (rtx insn)
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static bool
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match_pcrel_step2 (rtx insn)
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{
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rtx src;
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rtx unspec;
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rtx addr;
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if (TARGET_32BIT)
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{
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if (recog_memoized (insn) != CODE_FOR_insn_addr_shl16insli_32bit)
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@ -4432,11 +4434,12 @@ match_pcrel_step2 (rtx insn)
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return false;
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}
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src = SET_SRC (PATTERN (insn));
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unspec = SET_SRC (PATTERN (insn));
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addr = XVECEXP (unspec, 0, 1);
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return (GET_CODE (src) == CONST
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&& GET_CODE (XEXP (src, 0)) == UNSPEC
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&& XINT (XEXP (src, 0), 1) == UNSPEC_HW0_PCREL);
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return (GET_CODE (addr) == CONST
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&& GET_CODE (XEXP (addr, 0)) == UNSPEC
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&& XINT (XEXP (addr, 0), 1) == UNSPEC_HW0_PCREL);
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}
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@ -4446,6 +4449,7 @@ replace_mov_pcrel_step2 (rtx insn)
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{
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rtx pattern = PATTERN (insn);
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rtx unspec;
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rtx addr;
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rtx opnds[3];
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rtx new_insns;
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rtx got_rtx = tilegx_got_rtx ();
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@ -4453,10 +4457,18 @@ replace_mov_pcrel_step2 (rtx insn)
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gcc_assert (GET_CODE (pattern) == SET);
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opnds[0] = SET_DEST (pattern);
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unspec = XEXP (SET_SRC (pattern), 0);
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unspec = SET_SRC (pattern);
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gcc_assert (GET_CODE (unspec) == UNSPEC);
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gcc_assert (XINT (unspec, 1) == UNSPEC_INSN_ADDR_SHL16INSLI);
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opnds[1] = XVECEXP (unspec, 0, 0);
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addr = XVECEXP (unspec, 0, 1);
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gcc_assert (GET_CODE (addr) == CONST);
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unspec = XEXP (addr, 0);
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gcc_assert (GET_CODE (unspec) == UNSPEC);
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gcc_assert (XINT (unspec, 1) == UNSPEC_HW0_PCREL);
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opnds[1] = XEXP (XEXP (SET_SRC (pattern), 0), 0);
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opnds[2] = XVECEXP (unspec, 0, 0);
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/* We only need to replace SYMBOL_REFs, not LABEL_REFs. */
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