m32r.h (RETURN_ADDR_RTX): Define.
* config/m32r/m32r.h (RETURN_ADDR_RTX): Define. (INCOMING_RETURN_ADDR_RTX): Define. * config/m32r/m32r-protos.h (m32r_return_addr): Added. * config/m32r/m32r.c (m32r_exppand_prologue): Changed for __builtin_return_address(0). (m32r_return_addr): Added for __builtin_return_address(0). (m32r_reload_lr): Ditto. From-SVN: r83171
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parent
cf11c05cfd
commit
7b14411a87
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@ -1,3 +1,13 @@
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2004-06-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* config/m32r/m32r.h (RETURN_ADDR_RTX): Define.
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(INCOMING_RETURN_ADDR_RTX): Define.
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* config/m32r/m32r-protos.h (m32r_return_addr): Added.
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* config/m32r/m32r.c (m32r_exppand_prologue): Changed for
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__builtin_return_address(0).
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(m32r_return_addr): Added for __builtin_return_address(0).
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(m32r_reload_lr): Ditto.
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2004-06-15 Paolo Bonzini <bonzini@gnu.org>
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* doc/install.texi (Prerequisites): Update libbanshee,
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@ -5910,7 +5920,7 @@
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* config/arm/t-xscale-elf: Disable iwmmxt multilibs until they can
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be safely built.
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2004-04-16 Kazuhiro Inaoka <inaoka dot kazuhiro at renesas dot com>
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2004-04-16 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* config/m32r/m32r.h (BIG_ENDIAN_BIT): Deleted to fix endian
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bug.
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@ -58,6 +58,7 @@ extern int m32r_not_same_reg (rtx, rtx);
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extern int m32r_hard_regno_rename_ok (unsigned int, unsigned int);
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extern int m32r_legitimate_pic_operand_p (rtx);
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extern rtx m32r_legitimize_pic_address (rtx, rtx);
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extern rtx m32r_return_addr (int);
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#ifdef HAVE_MACHINE_MODES
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extern int call_address_operand (rtx, Mmode);
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@ -1905,6 +1905,29 @@ m32r_compute_frame_size (int size) /* # of var. bytes allocated. */
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/* The table we use to reference PIC data. */
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static rtx global_offset_table;
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static void
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m32r_reload_lr (rtx sp, int size)
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{
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rtx lr = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
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if (size == 0)
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emit_insn (gen_movsi (lr, gen_rtx_MEM (Pmode, sp)));
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else if (size <= 32768)
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emit_insn (gen_movsi (lr, gen_rtx_MEM (Pmode,
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gen_rtx_PLUS (Pmode, sp,
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GEN_INT (size)))));
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else
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{
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rtx tmp = gen_rtx_REG (Pmode, PROLOGUE_TMP_REGNUM);
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emit_insn (gen_movsi (tmp, GEN_INT (size)));
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emit_insn (gen_addsi3 (tmp, tmp, sp));
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emit_insn (gen_movsi (lr, gen_rtx_MEM (Pmode, tmp)));
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}
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emit_insn (gen_rtx_USE (VOIDmode, lr));
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}
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void
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m32r_load_pic_register (void)
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{
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@ -1993,7 +2016,11 @@ m32r_expand_prologue (void)
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gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM)));
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if (pic_reg_used)
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{
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m32r_load_pic_register ();
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m32r_reload_lr (stack_pointer_rtx,
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(current_function_profile ? 0 : frame_size));
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}
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if (current_function_profile && !pic_reg_used)
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emit_insn (gen_blockage ());
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@ -3052,3 +3079,12 @@ m32r_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
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return 1;
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}
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rtx
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m32r_return_addr (int count)
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{
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if (count != 0)
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return const0_rtx;
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return get_hard_reg_initial_val (Pmode, RETURN_ADDR_REGNUM);
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}
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@ -1265,6 +1265,10 @@ L2: .word STATIC
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/* Generate calls to memcpy, memcmp and memset. */
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#define TARGET_MEM_FUNCTIONS
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#define RETURN_ADDR_RTX(COUNT, FRAME) m32r_return_addr (COUNT)
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#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM)
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/* Addressing modes, and classification of registers for them. */
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/* Maximum number of registers that can appear in a valid memory address. */
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