i386.md (adddi3_carry_rex64, [...]): Name pattern.
* i386.md (adddi3_carry_rex64, subdi3_carry_rex64): Name pattern. (addhi3_carry, addqi3_carry, subhi3_carry, subqi3_carry): New patterns. (add??cc): New expanders. * i386.c (expand_int_addcc): New function. * i386-protos.h (expand_int_addcc): Declare. * alias.c (memory_modified_1): New static function. (memory_modified): New static varaible. (memory_modified_in_insn_p): New global function. * rtl.h (memory_modified_in_insn_p): Declare. * rtlanal.c (modified_between_p, modified_in_p): Be smart about memory references. * expr.h (emit_conditional_add): Declare. From-SVN: r61038
This commit is contained in:
Jan Hubicka
Jan Hubicka
parent
67d96a1661
commit
7b52eedeed
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@ -1,3 +1,20 @@
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Wed Jan 8 12:10:57 CET 2003 Jan Hubicka <jh@suse.cz>
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* i386.md (adddi3_carry_rex64, subdi3_carry_rex64): Name pattern.
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(addhi3_carry, addqi3_carry, subhi3_carry, subqi3_carry): New patterns.
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(add??cc): New expanders.
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* i386.c (expand_int_addcc): New function.
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* i386-protos.h (expand_int_addcc): Declare.
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* alias.c (memory_modified_1): New static function.
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(memory_modified): New static varaible.
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(memory_modified_in_insn_p): New global function.
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* rtl.h (memory_modified_in_insn_p): Declare.
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* rtlanal.c (modified_between_p, modified_in_p): Be smart about memory
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references.
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* expr.h (emit_conditional_add): Declare.
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2003-01-07 Janis Johnson <janis187@us.ibm.com>
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PR other/8947
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30
gcc/alias.c
30
gcc/alias.c
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@ -119,6 +119,7 @@ static int nonlocal_referenced_p_1 PARAMS ((rtx *, void *));
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static int nonlocal_referenced_p PARAMS ((rtx));
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static int nonlocal_set_p_1 PARAMS ((rtx *, void *));
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static int nonlocal_set_p PARAMS ((rtx));
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static void memory_modified_1 PARAMS ((rtx, rtx, void *));
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/* Set up all info needed to perform alias analysis on memory references. */
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@ -2703,6 +2704,35 @@ init_alias_once ()
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alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
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}
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/* Set MEMORY_MODIFIED when X modifies DATA (that is assumed
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to be memory reference. */
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static bool memory_modified;
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static void
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memory_modified_1 (x, pat, data)
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rtx x, pat ATTRIBUTE_UNUSED;
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void *data;
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{
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if (GET_CODE (x) == MEM)
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{
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if (anti_dependence (x, (rtx)data) || output_dependence (x, (rtx)data))
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memory_modified = true;
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}
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}
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/* Return true when INSN possibly modify memory contents of MEM
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(ie address can be modified). */
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bool
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memory_modified_in_insn_p (mem, insn)
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rtx mem, insn;
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{
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if (!INSN_P (insn))
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return false;
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memory_modified = false;
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note_stores (PATTERN (insn), memory_modified_1, mem);
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return memory_modified;
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}
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/* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
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array. */
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@ -141,6 +141,7 @@ extern void ix86_expand_branch PARAMS ((enum rtx_code, rtx));
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extern int ix86_expand_setcc PARAMS ((enum rtx_code, rtx));
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extern int ix86_expand_int_movcc PARAMS ((rtx[]));
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extern int ix86_expand_fp_movcc PARAMS ((rtx[]));
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extern int ix86_expand_int_addcc PARAMS ((rtx[]));
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extern void ix86_expand_call PARAMS ((rtx, rtx, rtx, rtx, rtx, int));
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extern void x86_initialize_trampoline PARAMS ((rtx, rtx, rtx));
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extern rtx ix86_zero_extend_to_Pmode PARAMS ((rtx));
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@ -9981,6 +9981,69 @@ ix86_expand_fp_movcc (operands)
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return 1;
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}
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/* Expand conditional increment or decrement using adb/sbb instructions.
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The default case using setcc followed by the conditional move can be
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done by generic code. */
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int
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ix86_expand_int_addcc (operands)
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rtx operands[];
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{
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enum rtx_code code = GET_CODE (operands[1]);
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rtx compare_op;
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rtx val = const0_rtx;
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if (operands[3] != const1_rtx
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&& operands[3] != constm1_rtx)
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return 0;
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if (!ix86_expand_carry_flag_compare (code, ix86_compare_op0,
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ix86_compare_op1, &compare_op))
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return 0;
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if (GET_CODE (compare_op) != LTU)
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val = operands[3] == const1_rtx ? constm1_rtx : const1_rtx;
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if ((GET_CODE (compare_op) == LTU) == (operands[3] == constm1_rtx))
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{
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switch (GET_MODE (operands[0]))
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{
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case QImode:
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emit_insn (gen_subqi3_carry (operands[0], operands[2], val));
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break;
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case HImode:
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emit_insn (gen_subhi3_carry (operands[0], operands[2], val));
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break;
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case SImode:
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emit_insn (gen_subsi3_carry (operands[0], operands[2], val));
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break;
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case DImode:
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emit_insn (gen_subdi3_carry_rex64 (operands[0], operands[2], val));
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break;
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default:
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abort ();
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}
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}
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else
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{
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switch (GET_MODE (operands[0]))
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{
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case QImode:
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emit_insn (gen_addqi3_carry (operands[0], operands[2], val));
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break;
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case HImode:
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emit_insn (gen_addhi3_carry (operands[0], operands[2], val));
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break;
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case SImode:
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emit_insn (gen_addsi3_carry (operands[0], operands[2], val));
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break;
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case DImode:
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emit_insn (gen_adddi3_carry_rex64 (operands[0], operands[2], val));
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break;
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default:
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abort ();
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}
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}
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return 1; /* DONE */
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}
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/* Split operands 0 and 1 into SImode parts. Similar to split_di, but
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works for floating pointer parameters and nonoffsetable memories.
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For pushes, it returns just stack offsets; the values will be saved
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@ -4951,7 +4951,7 @@
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split_di (operands+1, 1, operands+1, operands+4);
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split_di (operands+2, 1, operands+2, operands+5);")
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(define_insn "*adddi3_carry_rex64"
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(define_insn "adddi3_carry_rex64"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=rm,r")
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(plus:DI (plus:DI (ltu:DI (reg:CC 17) (const_int 0))
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(match_operand:DI 1 "nonimmediate_operand" "%0,0"))
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@ -4976,7 +4976,33 @@
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[(set_attr "type" "alu")
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(set_attr "mode" "DI")])
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(define_insn "*addsi3_carry"
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(define_insn "addqi3_carry"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=rm,r")
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(plus:QI (plus:QI (ltu:QI (reg:CC 17) (const_int 0))
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(match_operand:QI 1 "nonimmediate_operand" "%0,0"))
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(match_operand:QI 2 "general_operand" "ri,rm")))
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(clobber (reg:CC 17))]
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"ix86_binary_operator_ok (PLUS, QImode, operands)"
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"adc{b}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "QI")
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(set_attr "ppro_uops" "few")])
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(define_insn "addhi3_carry"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
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(plus:HI (plus:HI (ltu:HI (reg:CC 17) (const_int 0))
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(match_operand:HI 1 "nonimmediate_operand" "%0,0"))
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(match_operand:HI 2 "general_operand" "ri,rm")))
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(clobber (reg:CC 17))]
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"ix86_binary_operator_ok (PLUS, HImode, operands)"
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"adc{w}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "HI")
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(set_attr "ppro_uops" "few")])
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(define_insn "addsi3_carry"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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(plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
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(match_operand:SI 1 "nonimmediate_operand" "%0,0"))
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@ -6653,6 +6679,31 @@
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[(set_attr "type" "alu")
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(set_attr "mode" "DI")])
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(define_insn "subqi3_carry"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=rm,r")
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(minus:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
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(plus:QI (ltu:QI (reg:CC 17) (const_int 0))
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(match_operand:QI 2 "general_operand" "ri,rm"))))
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(clobber (reg:CC 17))]
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"ix86_binary_operator_ok (MINUS, QImode, operands)"
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"sbb{b}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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(set_attr "ppro_uops" "few")
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(set_attr "mode" "QI")])
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(define_insn "subhi3_carry"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
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(minus:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
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(plus:HI (ltu:HI (reg:CC 17) (const_int 0))
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(match_operand:HI 2 "general_operand" "ri,rm"))))
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(clobber (reg:CC 17))]
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"ix86_binary_operator_ok (MINUS, HImode, operands)"
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"sbb{w}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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(set_attr "ppro_uops" "few")
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(set_attr "mode" "HI")])
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(define_insn "subsi3_carry"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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@ -16459,6 +16510,39 @@
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(match_dup 1)
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(match_dup 2)))])
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;; Conditional addition patterns
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(define_expand "addqicc"
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[(match_operand:QI 0 "register_operand" "")
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(match_operand 1 "comparison_operator" "")
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(match_operand:QI 2 "register_operand" "")
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(match_operand:QI 3 "const_int_operand" "")]
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""
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"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;")
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(define_expand "addhicc"
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[(match_operand:HI 0 "register_operand" "")
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(match_operand 1 "comparison_operator" "")
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(match_operand:HI 2 "register_operand" "")
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(match_operand:HI 3 "const_int_operand" "")]
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""
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"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;")
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(define_expand "addsicc"
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[(match_operand:SI 0 "register_operand" "")
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(match_operand 1 "comparison_operator" "")
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(match_operand:SI 2 "register_operand" "")
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(match_operand:SI 3 "const_int_operand" "")]
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""
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"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;")
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(define_expand "adddicc"
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[(match_operand:DI 0 "register_operand" "")
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(match_operand 1 "comparison_operator" "")
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(match_operand:DI 2 "register_operand" "")
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(match_operand:DI 3 "const_int_operand" "")]
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"TARGET_64BIT"
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"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;")
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;; We can't represent the LT test directly. Do this by swapping the operands.
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(define_split
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@ -307,6 +307,9 @@ rtx emit_conditional_move PARAMS ((rtx, enum rtx_code, rtx, rtx,
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int can_conditionally_move_p PARAMS ((enum machine_mode mode));
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#endif
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rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx,
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enum machine_mode, rtx, rtx,
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enum machine_mode, int);
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/* Functions from expmed.c: */
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@ -2251,6 +2251,7 @@ extern void init_alias_once PARAMS ((void));
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extern void init_alias_analysis PARAMS ((void));
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extern void end_alias_analysis PARAMS ((void));
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extern rtx addr_side_effect_eval PARAMS ((rtx, int, int));
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extern bool memory_modified_in_insn_p PARAMS ((rtx, rtx));
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/* In sibcall.c */
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typedef enum {
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@ -1037,7 +1037,7 @@ regs_set_between_p (x, start, end)
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/* Similar to reg_set_between_p, but check all registers in X. Return 0
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only if none of them are modified between START and END. Return 1 if
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X contains a MEM; this routine does not perform any memory aliasing. */
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X contains a MEM; this routine does usememory aliasing. */
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int
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modified_between_p (x, start, end)
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@ -1047,6 +1047,10 @@ modified_between_p (x, start, end)
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enum rtx_code code = GET_CODE (x);
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const char *fmt;
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int i, j;
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rtx insn;
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if (start == end)
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return 0;
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switch (code)
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{
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@ -1063,10 +1067,14 @@ modified_between_p (x, start, end)
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return 1;
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case MEM:
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/* If the memory is not constant, assume it is modified. If it is
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constant, we still have to check the address. */
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if (! RTX_UNCHANGING_P (x))
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if (RTX_UNCHANGING_P (x))
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return 0;
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if (modified_between_p (XEXP (x, 0), start, end))
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return 1;
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for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn))
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if (memory_modified_in_insn_p (x, insn))
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return 1;
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return 0;
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break;
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case REG:
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@ -1093,7 +1101,7 @@ modified_between_p (x, start, end)
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/* Similar to reg_set_p, but check all registers in X. Return 0 only if none
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of them are modified in INSN. Return 1 if X contains a MEM; this routine
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does not perform any memory aliasing. */
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does use memory aliasing. */
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int
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modified_in_p (x, insn)
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@ -1119,10 +1127,13 @@ modified_in_p (x, insn)
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return 1;
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case MEM:
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/* If the memory is not constant, assume it is modified. If it is
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constant, we still have to check the address. */
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if (! RTX_UNCHANGING_P (x))
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if (RTX_UNCHANGING_P (x))
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return 0;
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if (modified_in_p (XEXP (x, 0), insn))
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return 1;
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if (memory_modified_in_insn_p (x, insn))
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return 1;
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return 0;
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break;
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case REG:
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