arm.c (neon_vector_mem_operand): Allow register POST_MODIFY for neon loads and stores.
2014-06-18 Charles Baylis <charles.baylis@linaro.org> * config/arm/arm.c (neon_vector_mem_operand): Allow register POST_MODIFY for neon loads and stores. (arm_print_operand): Output post-index register for neon loads and stores. From-SVN: r211783
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@ -1,3 +1,10 @@
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2014-06-18 Charles Baylis <charles.baylis@linaro.org>
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* config/arm/arm.c (neon_vector_mem_operand): Allow register
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POST_MODIFY for neon loads and stores.
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(arm_print_operand): Output post-index register for neon loads and
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stores.
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2014-06-18 Richard Biener <rguenther@suse.de>
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* tree-ssa-dce.c (perform_tree_ssa_dce): Fixup bogus commit.
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@ -12792,7 +12792,11 @@ neon_vector_mem_operand (rtx op, int type, bool strict)
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|| (type == 0 && GET_CODE (ind) == PRE_DEC))
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return arm_address_register_rtx_p (XEXP (ind, 0), 0);
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/* FIXME: vld1 allows register post-modify. */
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/* Allow post-increment by register for VLDn */
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if (type == 2 && GET_CODE (ind) == POST_MODIFY
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&& GET_CODE (XEXP (ind, 1)) == PLUS
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&& REG_P (XEXP (XEXP (ind, 1), 1)))
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return true;
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/* Match:
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(plus (reg)
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@ -21824,6 +21828,7 @@ arm_print_operand (FILE *stream, rtx x, int code)
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{
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rtx addr;
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bool postinc = FALSE;
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rtx postinc_reg = NULL;
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unsigned align, memsize, align_bits;
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gcc_assert (MEM_P (x));
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@ -21833,6 +21838,11 @@ arm_print_operand (FILE *stream, rtx x, int code)
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postinc = 1;
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addr = XEXP (addr, 0);
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}
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if (GET_CODE (addr) == POST_MODIFY)
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{
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postinc_reg = XEXP( XEXP (addr, 1), 1);
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addr = XEXP (addr, 0);
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}
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asm_fprintf (stream, "[%r", REGNO (addr));
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/* We know the alignment of this access, so we can emit a hint in the
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@ -21858,6 +21868,8 @@ arm_print_operand (FILE *stream, rtx x, int code)
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if (postinc)
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fputs("!", stream);
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if (postinc_reg)
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asm_fprintf (stream, ", %r", REGNO (postinc_reg));
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}
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return;
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