sparc.c (fp_zero_operand): Turn into a normal predicate.
* sparc.c (fp_zero_operand): Turn into a normal predicate. Use CONST0_RTX. Update all callers. * sparc.h, sparc-protos.h: Update accordingly. * sparc.md (fp mov insns): Use fp_zero_operand directly where applicable. From-SVN: r31748
This commit is contained in:
parent
32bd39747e
commit
7ce86678bf
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@ -1,3 +1,11 @@
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2000-02-01 Richard Henderson <rth@cygnus.com>
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* sparc.c (fp_zero_operand): Turn into a normal predicate.
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Use CONST0_RTX. Update all callers.
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* sparc.h, sparc-protos.h: Update accordingly.
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* sparc.md (fp mov insns): Use fp_zero_operand directly
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where applicable.
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Wed Feb 2 02:59:45 2000 Hans-Peter Nilsson <hp@bitrange.com>
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* tm.texi (Values in Registers): Fix typo in HARD_REGNO_NREGS
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@ -124,7 +124,7 @@ extern int eligible_for_return_delay PARAMS ((rtx));
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extern int emit_move_sequence PARAMS ((rtx, enum machine_mode));
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extern int extend_op PARAMS ((rtx, enum machine_mode));
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extern int fcc_reg_operand PARAMS ((rtx, enum machine_mode));
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extern int fp_zero_operand PARAMS ((rtx));
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extern int fp_zero_operand PARAMS ((rtx, enum machine_mode));
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extern int fp_sethi_p PARAMS ((rtx));
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extern int fp_mov_p PARAMS ((rtx));
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extern int fp_high_losum_p PARAMS ((rtx));
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@ -387,9 +387,7 @@ reg_or_0_operand (op, mode)
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&& CONST_DOUBLE_HIGH (op) == 0
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&& CONST_DOUBLE_LOW (op) == 0)
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return 1;
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if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
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&& GET_CODE (op) == CONST_DOUBLE
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&& fp_zero_operand (op))
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if (fp_zero_operand (op, mode))
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return 1;
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return 0;
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}
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@ -397,13 +395,13 @@ reg_or_0_operand (op, mode)
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/* Nonzero if OP is a floating point value with value 0.0. */
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int
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fp_zero_operand (op)
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fp_zero_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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{
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REAL_VALUE_TYPE r;
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REAL_VALUE_FROM_CONST_DOUBLE (r, op);
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return (REAL_VALUES_EQUAL (r, dconst0) && ! REAL_VALUE_MINUS_ZERO (r));
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if (GET_MODE_CLASS (GET_MODE (op)) != MODE_FLOAT)
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return 0;
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return op == CONST0_RTX (mode);
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}
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/* Nonzero if OP is a floating point constant which can
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@ -1467,8 +1467,8 @@ extern char leaf_reg_remap[];
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Here VALUE is the CONST_DOUBLE rtx itself. */
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'G' ? fp_zero_operand (VALUE) \
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: (C) == 'H' ? arith_double_operand (VALUE, DImode) \
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((C) == 'G' ? fp_zero_operand (VALUE, GET_MODE (VALUE)) \
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: (C) == 'H' ? arith_double_operand (VALUE, DImode) \
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: 0)
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/* Given an rtx X being reloaded into a reg required to be
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@ -2266,7 +2266,7 @@ LFLGRET"ID":\n\
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(TARGET_VIS && \
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(GET_MODE (X) == SFmode || GET_MODE (X) == DFmode || \
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GET_MODE (X) == TFmode) && \
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fp_zero_operand (X)))
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fp_zero_operand (X, GET_MODE (X))))
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/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
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and check its validity for a certain class.
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@ -3023,7 +3023,7 @@
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"(TARGET_FPU && ! TARGET_VIS && ! TARGET_LIVE_G0)
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&& (register_operand (operands[0], SFmode)
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|| register_operand (operands[1], SFmode)
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|| fp_zero_operand (operands[1]))"
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|| fp_zero_operand (operands[1], SFmode))"
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"*
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{
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if (GET_CODE (operands[1]) == CONST_DOUBLE
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@ -3068,7 +3068,7 @@
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"(TARGET_FPU && TARGET_VIS)
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&& (register_operand (operands[0], SFmode)
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|| register_operand (operands[1], SFmode)
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|| fp_zero_operand (operands[1]))"
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|| fp_zero_operand (operands[1], SFmode))"
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"*
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{
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if (GET_CODE (operands[1]) == CONST_DOUBLE
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@ -3181,9 +3181,7 @@
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if (GET_CODE (operands[0]) == REG
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&& CONSTANT_P (operands[1]))
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{
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if (TARGET_VIS
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& fp_zero_operand (operands[1]))
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if (TARGET_VIS && fp_zero_operand (operands[1], SFmode))
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goto movsf_is_ok;
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/* emit_group_store will send such bogosity to us when it is
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@ -3199,9 +3197,7 @@
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if (GET_CODE (operands[0]) == MEM)
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{
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if (register_operand (operands[1], SFmode)
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|| (! TARGET_LIVE_G0
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& fp_zero_operand (operands[1])))
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|| (! TARGET_LIVE_G0 && fp_zero_operand (operands[1], SFmode)))
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goto movsf_is_ok;
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if (! reload_in_progress)
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@ -3234,19 +3230,16 @@
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(define_insn "*clear_df"
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[(set (match_operand:DF 0 "register_operand" "=e")
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(match_operand:DF 1 "const_double_operand" ""))]
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"TARGET_VIS
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&& fp_zero_operand (operands[1])"
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(match_operand:DF 1 "fp_zero_operand" ""))]
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"TARGET_VIS"
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"fzero\\t%0"
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[(set_attr "type" "fpmove")
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(set_attr "length" "1")])
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(define_insn "*clear_dfp"
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[(set (match_operand:DF 0 "memory_operand" "=m")
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(match_operand:DF 1 "const_double_operand" ""))]
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"! TARGET_LIVE_G0
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&& TARGET_V9
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&& fp_zero_operand (operands[1])"
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(match_operand:DF 1 "fp_zero_operand" ""))]
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"! TARGET_LIVE_G0 && TARGET_V9"
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"stx\\t%%g0, %0"
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[(set_attr "type" "store")
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(set_attr "length" "1")])
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@ -3340,9 +3333,7 @@
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if (GET_CODE (operands[0]) == REG
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&& CONSTANT_P (operands[1]))
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{
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if (TARGET_VIS
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& fp_zero_operand (operands[1]))
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if (TARGET_VIS && fp_zero_operand (operands[1], DFmode))
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goto movdf_is_ok;
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/* emit_group_store will send such bogosity to us when it is
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@ -3604,18 +3595,16 @@
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(define_insn "*clear_tf"
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[(set (match_operand:TF 0 "register_operand" "=e")
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(match_operand:TF 1 "const_double_operand" ""))]
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"TARGET_VIS
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&& fp_zero_operand (operands[1])"
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(match_operand:TF 1 "fp_zero_operand" ""))]
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"TARGET_VIS"
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"#"
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[(set_attr "type" "fpmove")
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(set_attr "length" "2")])
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(define_split
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[(set (match_operand:TF 0 "register_operand" "")
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(match_operand:TF 1 "const_double_operand" ""))]
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"TARGET_VIS && reload_completed
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&& fp_zero_operand (operands[1])"
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(match_operand:TF 1 "fp_zero_operand" ""))]
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"TARGET_VIS && reload_completed"
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[(set (subreg:DF (match_dup 0) 0) (match_dup 1))
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(set (subreg:DF (match_dup 0) 8) (match_dup 1))]
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"
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(define_insn "*clear_tfp"
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[(set (match_operand:TF 0 "memory_operand" "=m")
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(match_operand:TF 1 "const_double_operand" ""))]
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"! TARGET_LIVE_G0
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&& TARGET_V9
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&& fp_zero_operand (operands[1])"
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(match_operand:TF 1 "fp_zero_operand" ""))]
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"! TARGET_LIVE_G0 && TARGET_V9"
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"#"
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[(set_attr "type" "fpmove")
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(set_attr "length" "2")])
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(define_split
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[(set (match_operand:TF 0 "memory_operand" "=m")
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(match_operand:TF 1 "const_double_operand" ""))]
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"! TARGET_LIVE_G0
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&& TARGET_V9 && reload_completed
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&& fp_zero_operand (operands[1])"
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(match_operand:TF 1 "fp_zero_operand" ""))]
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"! TARGET_LIVE_G0 && TARGET_V9 && reload_completed"
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[(set (subreg:DF (match_dup 0) 0) (match_dup 1))
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(set (subreg:DF (match_dup 0) 8) (match_dup 1))]
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"
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if (GET_CODE (operands[0]) == REG
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&& CONSTANT_P (operands[1]))
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{
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if (TARGET_VIS
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& fp_zero_operand (operands[1]))
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if (TARGET_VIS && fp_zero_operand (operands[1], TFmode))
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goto movtf_is_ok;
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/* emit_group_store will send such bogosity to us when it is
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