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mips.md (mips_get_fcsr, [...]): Use SI machine mode for unspec_volatile operand. 

* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
        machine mode for unspec_volatile operand.

        * gcc.target/mips/get-fcsr-3.c: New test.

From-SVN: r274863
This commit is contained in:
Mihailo Stojanovic 2019-08-23 19:04:56 +00:00 committed by Jeff Law
parent 0448240b88
commit 7d35d2bf5a
4 changed files with 20 additions and 2 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2019-08-23 Mihailo Stojanovic <mistojanovic@wavecomp.com>
* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
machine mode for unspec_volatile operand.
2019-08-23 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/doc/invoke.texi (mneon-for-64bits): Deprecate option.

4
gcc/config/mips/mips.md
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@ -7588,7 +7588,7 @@
;; __builtin_mips_get_fcsr: move the FCSR into operand 0.
(define_expand "mips_get_fcsr"
[(set (match_operand:SI 0 "register_operand")
(unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
(unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
"TARGET_HARD_FLOAT_ABI"
{
if (TARGET_MIPS16)
@ -7600,7 +7600,7 @@
(define_insn "*mips_get_fcsr"
[(set (match_operand:SI 0 "register_operand" "=d")
(unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
(unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
"TARGET_HARD_FLOAT"
"cfc1\t%0,$31")

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2019-08-23 Mihailo Stojanovic <mistojanovic@wavecomp.com>
* gcc.target/mips/get-fcsr-3.c: New test.
2019-08-23 Martin Sebor <msebor@redhat.com>
* gcc.dg/Warray-bounds-36.c: Make functions static to avoid failures

9
gcc/testsuite/gcc.target/mips/get-fcsr-3.c Normal file
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@ -0,0 +1,9 @@
/* { dg-options "-mabi=64 -mhard-float" } */
NOMIPS16 unsigned int
foo (void)
{
return __builtin_mips_get_fcsr () & 0x1;
}
/* { dg-final { scan-assembler "cfc1" } } */