re PR target/60264 (ARM ICE in dwarf2out_frame_debug_adjust_cfa, at dwarf2cfi.c:1090)
2014-03-12 Christian Bruel <christian.bruel@st.com> PR target/60264 * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Emit a REG_CFA_DEF_CFA note. (arm_expand_epilogue_apcs_frame): call arm_add_cfa_adjust_cfa_note. (arm_unwind_emit): Allow REG_CFA_DEF_CFA. From-SVN: r208511
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@ -1,3 +1,11 @@
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2014-03-12 Christian Bruel <christian.bruel@st.com>
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PR target/60264
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* config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Emit a REG_CFA_DEF_CFA
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note.
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(arm_expand_epilogue_apcs_frame): call arm_add_cfa_adjust_cfa_note.
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(arm_unwind_emit): Allow REG_CFA_DEF_CFA.
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2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com>
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PR tree-optimization/60454
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@ -19914,8 +19914,15 @@ arm_emit_vfp_multi_reg_pop (int first_reg, int num_regs, rtx base_reg)
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par = emit_insn (par);
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REG_NOTES (par) = dwarf;
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arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs,
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base_reg, base_reg);
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/* Make sure cfa doesn't leave with IP_REGNUM to allow unwinding fron FP. */
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if (TARGET_VFP && REGNO (base_reg) == IP_REGNUM)
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{
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RTX_FRAME_RELATED_P (par) = 1;
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add_reg_note (par, REG_CFA_DEF_CFA, hard_frame_pointer_rtx);
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}
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else
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arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs,
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base_reg, base_reg);
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}
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/* Generate and emit a pattern that will be recognized as LDRD pattern. If even
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@ -27108,15 +27115,19 @@ arm_expand_epilogue_apcs_frame (bool really_return)
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if (TARGET_HARD_FLOAT && TARGET_VFP)
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{
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int start_reg;
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rtx ip_rtx = gen_rtx_REG (SImode, IP_REGNUM);
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/* The offset is from IP_REGNUM. */
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int saved_size = arm_get_vfp_saved_size ();
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if (saved_size > 0)
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{
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rtx insn;
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floats_from_frame += saved_size;
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emit_insn (gen_addsi3 (gen_rtx_REG (SImode, IP_REGNUM),
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hard_frame_pointer_rtx,
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GEN_INT (-floats_from_frame)));
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insn = emit_insn (gen_addsi3 (ip_rtx,
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hard_frame_pointer_rtx,
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GEN_INT (-floats_from_frame)));
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arm_add_cfa_adjust_cfa_note (insn, -floats_from_frame,
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ip_rtx, hard_frame_pointer_rtx);
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}
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/* Generate VFP register multi-pop. */
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@ -27189,11 +27200,15 @@ arm_expand_epilogue_apcs_frame (bool really_return)
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num_regs = bit_count (saved_regs_mask);
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if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca)
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{
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rtx insn;
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emit_insn (gen_blockage ());
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/* Unwind the stack to just below the saved registers. */
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emit_insn (gen_addsi3 (stack_pointer_rtx,
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hard_frame_pointer_rtx,
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GEN_INT (- 4 * num_regs)));
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insn = emit_insn (gen_addsi3 (stack_pointer_rtx,
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hard_frame_pointer_rtx,
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GEN_INT (- 4 * num_regs)));
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arm_add_cfa_adjust_cfa_note (insn, - 4 * num_regs,
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stack_pointer_rtx, hard_frame_pointer_rtx);
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}
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arm_emit_multi_reg_pop (saved_regs_mask);
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@ -28985,11 +29000,11 @@ arm_unwind_emit (FILE * asm_out_file, rtx insn)
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emit unwind information for it because these are used either for
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pretend arguments or notes to adjust sp and restore registers from
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stack. */
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case REG_CFA_DEF_CFA:
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case REG_CFA_ADJUST_CFA:
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case REG_CFA_RESTORE:
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return;
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case REG_CFA_DEF_CFA:
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case REG_CFA_EXPRESSION:
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case REG_CFA_OFFSET:
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/* ??? Only handling here what we actually emit. */
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@ -1,3 +1,8 @@
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2014-03-12 Christian Bruel <christian.bruel@st.com>
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PR target/60264
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* gcc.target/arm/pr60264.c
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2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com>
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PR tree-optimization/60454
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12
gcc/testsuite/gcc.target/arm/pr60264.c
Normal file
12
gcc/testsuite/gcc.target/arm/pr60264.c
Normal file
@ -0,0 +1,12 @@
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/* { dg-do compile } */
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/* { dg-options "-mapcs -g" } */
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double bar(void);
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int foo(void)
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{
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int i = bar() + bar();
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return i;
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}
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