re PR target/70321 (STV generates less optimized code)
PR target/70321 * config/i386/i386.md (*anddi3_doubleword, *<code>di3_doubleword): Optimize TARGET_STV splitters, if high or low word of last argument is 0 or -1. From-SVN: r234416
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@ -1,3 +1,10 @@
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2016-03-23 Jakub Jelinek <jakub@redhat.com>
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PR target/70321
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* config/i386/i386.md (*anddi3_doubleword, *<code>di3_doubleword):
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Optimize TARGET_STV splitters, if high or low word of last argument
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is 0 or -1.
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2016-03-22 Jeff Law <law@redhat.com>
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PR target/70232
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@ -8141,16 +8141,31 @@
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(match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
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(match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm")))
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(clobber (reg:CC FLAGS_REG))]
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"!TARGET_64BIT && TARGET_STV && TARGET_SSE2 && ix86_binary_operator_ok (AND, DImode, operands)"
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"!TARGET_64BIT && TARGET_STV && TARGET_SSE2
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&& ix86_binary_operator_ok (AND, DImode, operands)"
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0)
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(and:SI (match_dup 1) (match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])
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(parallel [(set (match_dup 3)
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(and:SI (match_dup 4) (match_dup 5)))
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(clobber (reg:CC FLAGS_REG))])]
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"split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);")
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[(const_int 0)]
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{
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split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
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if (operands[2] == const0_rtx)
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{
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operands[1] = const0_rtx;
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ix86_expand_move (SImode, &operands[0]);
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}
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else if (operands[2] != constm1_rtx)
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emit_insn (gen_andsi3 (operands[0], operands[1], operands[2]));
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else if (operands[5] == constm1_rtx)
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emit_note (NOTE_INSN_DELETED);
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if (operands[5] == const0_rtx)
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{
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operands[4] = const0_rtx;
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ix86_expand_move (SImode, &operands[3]);
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}
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else if (operands[5] != constm1_rtx)
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emit_insn (gen_andsi3 (operands[3], operands[4], operands[5]));
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DONE;
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})
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(define_insn "*andsi_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r,Ya,!k")
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@ -8665,16 +8680,41 @@
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(match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
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(match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm")))
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(clobber (reg:CC FLAGS_REG))]
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"!TARGET_64BIT && TARGET_STV && TARGET_SSE2 && ix86_binary_operator_ok (<CODE>, DImode, operands)"
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"!TARGET_64BIT && TARGET_STV && TARGET_SSE2
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&& ix86_binary_operator_ok (<CODE>, DImode, operands)"
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0)
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(any_or:SI (match_dup 1) (match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])
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(parallel [(set (match_dup 3)
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(any_or:SI (match_dup 4) (match_dup 5)))
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(clobber (reg:CC FLAGS_REG))])]
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"split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);")
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[(const_int 0)]
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{
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split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
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if (operands[2] == constm1_rtx)
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{
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if (<CODE> == IOR)
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{
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operands[1] = constm1_rtx;
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ix86_expand_move (SImode, &operands[0]);
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}
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else
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ix86_expand_unary_operator (NOT, SImode, &operands[0]);
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}
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else if (operands[2] != const0_rtx)
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ix86_expand_binary_operator (<CODE>, SImode, &operands[0]);
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else if (operands[5] == const0_rtx)
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emit_note (NOTE_INSN_DELETED);
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if (operands[5] == constm1_rtx)
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{
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if (<CODE> == IOR)
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{
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operands[4] = constm1_rtx;
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ix86_expand_move (SImode, &operands[3]);
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}
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else
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ix86_expand_unary_operator (NOT, SImode, &operands[3]);
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}
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else if (operands[5] != const0_rtx)
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ix86_expand_binary_operator (<CODE>, SImode, &operands[3]);
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DONE;
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})
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(define_insn_and_split "*andndi3_doubleword"
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[(set (match_operand:DI 0 "register_operand" "=r,r")
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