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From Joern Rennecke:

Browse Source 
* sh.h (CPP_SPEC, TARGET_SWITCHES): Add m4-nofpu.
	* sh.md (udivsi3, divsi3): Don't use libcalls that use the FPU
	unless TARGET_SH3E is set.
	* t-sh (MULTILIB_MATCHES): Add m2=m4-nofpu.

	* sh.md (ashlsi3_d, ashlsi3_k): Remove, replace with
	(ashlsi3_std): New pattern.
	(ashlsi3 expander): Use it for TARGET_SH3.
	* sh.c (gen_ashift): Use it instead of ashlsi3_k.

From-SVN: r35411
This commit is contained in:
Bernd Schmidt 2000-08-01 18:45:53 +00:00 committed by Bernd Schmidt
parent 967add5195
commit 7e2fda6e4a
5 changed files with 47 additions and 23 deletions
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13
gcc/ChangeLog
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@ -1,3 +1,16 @@
2000-08-01 Bernd Schmidt <bernds@cygnus.co.uk>
From Joern Rennecke:
* sh.h (CPP_SPEC, TARGET_SWITCHES): Add m4-nofpu.
* sh.md (udivsi3, divsi3): Don't use libcalls that use the FPU
unless TARGET_SH3E is set.
* t-sh (MULTILIB_MATCHES): Add m2=m4-nofpu.
* sh.md (ashlsi3_d, ashlsi3_k): Remove, replace with
(ashlsi3_std): New pattern.
(ashlsi3 expander): Use it for TARGET_SH3.
* sh.c (gen_ashift): Use it instead of ashlsi3_k.
Tue Aug 1 12:34:21 MET DST 2000 Jan Hubicka <jh@suse.cz>
* loop.c (canonicalize_condition): Use destination, not source to

2
gcc/config/sh/sh.c
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@ -1039,7 +1039,7 @@ gen_ashift (type, n, reg)
emit_insn (gen_lshrsi3_k (reg, reg, GEN_INT (n)));
break;
case ASHIFT:
emit_insn (gen_ashlsi3_k (reg, reg, GEN_INT (n)));
emit_insn (gen_ashlsi3_std (reg, reg, GEN_INT (n)));
break;
}
}

6
gcc/config/sh/sh.h
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@ -46,8 +46,9 @@ extern int code_for_indirect_jump_scratch;
%{m3e:-D__SH3E__} \
%{m4-single-only:-D__SH4_SINGLE_ONLY__} \
%{m4-single:-D__SH4_SINGLE__} \
%{m4-nofpu:-D__sh3__} \
%{m4:-D__SH4__} \
%{!m1:%{!m2:%{!m3:%{!m3e:%{!m4:%{!m4-single:%{!m4-single-only:-D__sh1__}}}}}}} \
%{!m1:%{!m2:%{!m3:%{!m3e:%{!m4:%{!m4-single:%{!m4-single-only:%{!m4-nofpu:-D__sh1__}}}}}}}} \
%{mnomacsave:-D__NOMACSAVE__} \
%{mhitachi:-D__HITACHI__}"
@ -182,8 +183,9 @@ extern int target_flags;
{"2", SH2_BIT}, \
{"3", SH3_BIT|SH2_BIT}, \
{"3e", SH3E_BIT|SH3_BIT|SH2_BIT|FPU_SINGLE_BIT}, \
{"4-single-only", SH3E_BIT|SH3_BIT|SH2_BIT|SH3E_BIT|HARD_SH4_BIT|FPU_SINGLE_BIT}, \
{"4-single-only", SH3E_BIT|SH3_BIT|SH2_BIT|HARD_SH4_BIT|FPU_SINGLE_BIT}, \
{"4-single", SH4_BIT|SH3E_BIT|SH3_BIT|SH2_BIT|HARD_SH4_BIT|FPU_SINGLE_BIT},\
{"4-nofpu", SH3_BIT|SH2_BIT|HARD_SH4_BIT},\
{"4", SH4_BIT|SH3E_BIT|SH3_BIT|SH2_BIT|HARD_SH4_BIT}, \
{"b", -LITTLE_ENDIAN_BIT}, \
{"bigtable", BIGTABLE_BIT}, \

47
gcc/config/sh/sh.md
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@ -955,7 +955,7 @@
operands[3] = gen_reg_rtx(SImode);
/* Emit the move of the address to a pseudo outside of the libcall. */
if (TARGET_HARD_SH4)
if (TARGET_HARD_SH4 && TARGET_SH3E)
{
emit_move_insn (operands[3],
gen_rtx_SYMBOL_REF (SImode, \"__udivsi3_i4\"));
@ -1041,7 +1041,7 @@
operands[3] = gen_reg_rtx(SImode);
/* Emit the move of the address to a pseudo outside of the libcall. */
if (TARGET_HARD_SH4)
if (TARGET_HARD_SH4 && TARGET_SH3E)
{
emit_move_insn (operands[3],
gen_rtx_SYMBOL_REF (SImode, \"__sdivsi3_i4\"));
@ -1525,23 +1525,32 @@
;;
;; shift left
(define_insn "ashlsi3_d"
[(set (match_operand:SI 0 "arith_reg_operand" "=r")
(ashift:SI (match_operand:SI 1 "arith_reg_operand" "0")
(match_operand:SI 2 "arith_reg_operand" "r")))]
"TARGET_SH3"
"shld %2,%0"
[(set_attr "type" "dyn_shift")])
;; This pattern is used by init_expmed for computing the costs of shift
;; insns.
(define_insn "ashlsi3_k"
[(set (match_operand:SI 0 "arith_reg_operand" "=r,r")
(ashift:SI (match_operand:SI 1 "arith_reg_operand" "0,0")
(match_operand:SI 2 "const_int_operand" "M,K")))]
"CONST_OK_FOR_K (INTVAL (operands[2]))"
(define_insn_and_split "ashlsi3_std"
[(set (match_operand:SI 0 "arith_reg_operand" "=r,r,r,r")
(ashift:SI (match_operand:SI 1 "arith_reg_operand" "0,0,0,0")
(match_operand:SI 2 "nonmemory_operand" "r,M,K,?ri")))
(clobber (match_scratch:SI 3 "=X,X,X,&r"))]
"TARGET_SH3
|| (GET_CODE (operands[2]) == CONST_INT
&& CONST_OK_FOR_K (INTVAL (operands[2])))"
"@
add %0,%0
shll%O2 %0"
[(set_attr "type" "arith")])
shld %2,%0
add %0,%0
shll%O2 %0
#"
"TARGET_SH3
&& GET_CODE (operands[2]) == CONST_INT
&& ! CONST_OK_FOR_K (INTVAL (operands[2]))"
[(set (match_dup 3) (match_dup 2))
(parallel
[(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 3)))
(clobber (match_dup 4))])]
"operands[4] = gen_rtx_SCRATCH (SImode);"
[(set_attr "length" "*,*,*,4")
(set_attr "type" "dyn_shift,arith,arith,arith")])
(define_insn "ashlhi3_k"
[(set (match_operand:HI 0 "arith_reg_operand" "=r,r")
@ -1594,9 +1603,9 @@
if (GET_CODE (operands[2]) == CONST_INT
&& sh_dynamicalize_shift_p (operands[2]))
operands[2] = force_reg (SImode, operands[2]);
if (TARGET_SH3 && arith_reg_operand (operands[2], GET_MODE (operands[2])))
if (TARGET_SH3)
{
emit_insn (gen_ashlsi3_d (operands[0], operands[1], operands[2]));
emit_insn (gen_ashlsi3_std (operands[0], operands[1], operands[2]));
DONE;
}
if (! immediate_operand (operands[2], GET_MODE (operands[2])))

2
gcc/config/sh/t-sh
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@ -23,7 +23,7 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
MULTILIB_OPTIONS= ml m2/m3e/m4-single-only/m4-single/m4
MULTILIB_DIRNAMES=
MULTILIB_MATCHES = m2=m3
MULTILIB_MATCHES = m2=m3 m2=m4-nofpu
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib