re PR target/11420 ([x86_64] gcc generates invalid asm code when "-O -fPIC" is used (suffix or operands invalid for `movabs'))
PR c/11420 * config/i386/i386.c (ix86_check_movabs): New function. * config/i386/i386-protos.h (ix86_check_movabs): New prototype. * config/i386/i386.md (movabs[shqd]i_1_rex64): Kill broken alternative. (movabs[shqd]i_[12]_rex64): Add ix86_check_movabs check to conditions. * gcc.dg/20030708-1.c: New test. From-SVN: r69092
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@ -1,3 +1,11 @@
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2003-07-08 Jakub Jelinek <jakub@redhat.com>
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PR c/11420
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* config/i386/i386.c (ix86_check_movabs): New function.
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* config/i386/i386-protos.h (ix86_check_movabs): New prototype.
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* config/i386/i386.md (movabs[shqd]i_1_rex64): Kill broken alternative.
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(movabs[shqd]i_[12]_rex64): Add ix86_check_movabs check to conditions.
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2003-07-08 Chris Demetriou <cgd@broadcom.com>
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* Makefile.in (install-po): Cope with empty CATALOGS.
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@ -149,6 +149,7 @@ extern void ix86_split_ashldi (rtx *, rtx);
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extern void ix86_split_ashrdi (rtx *, rtx);
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extern void ix86_split_lshrdi (rtx *, rtx);
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extern rtx ix86_find_base_term (rtx);
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extern int ix86_check_movabs (rtx, int);
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extern rtx assign_386_stack_local (enum machine_mode, int);
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extern int ix86_attr_length_immediate_default (rtx, int);
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@ -3288,6 +3288,27 @@ x86_64_movabs_operand (rtx op, enum machine_mode mode)
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return 0;
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}
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/* Return nonzero if OPNUM's MEM should be matched
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in movabs* patterns. */
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int
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ix86_check_movabs (rtx insn, int opnum)
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{
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rtx set, mem;
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set = PATTERN (insn);
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if (GET_CODE (set) == PARALLEL)
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set = XVECEXP (set, 0, 0);
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if (GET_CODE (set) != SET)
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abort ();
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mem = XEXP (set, opnum);
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while (GET_CODE (mem) == SUBREG)
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mem = SUBREG_REG (mem);
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if (GET_CODE (mem) != MEM)
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abort ();
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return (volatile_ok || !MEM_VOLATILE_P (mem));
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}
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/* Return nonzero if OP is nonmemory operand representable on x86_64. */
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int
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@ -1262,24 +1262,23 @@
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;; We fake an second form of instruction to force reload to load address
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;; into register when rax is not available
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(define_insn "*movabssi_1_rex64"
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[(set (mem:SI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
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(match_operand:SI 1 "nonmemory_operand" "a,er,i"))]
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"TARGET_64BIT"
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[(set (mem:SI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
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(match_operand:SI 1 "nonmemory_operand" "a,er"))]
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"TARGET_64BIT && ix86_check_movabs (insn, 0)"
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"@
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movabs{l}\t{%1, %P0|%P0, %1}
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mov{l}\t{%1, %a0|%a0, %1}
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movabs{l}\t{%1, %a0|%a0, %1}"
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mov{l}\t{%1, %a0|%a0, %1}"
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[(set_attr "type" "imov")
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(set_attr "modrm" "0,*,*")
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(set_attr "length_address" "8,0,0")
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(set_attr "length_immediate" "0,*,*")
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(set_attr "modrm" "0,*")
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(set_attr "length_address" "8,0")
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(set_attr "length_immediate" "0,*")
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(set_attr "memory" "store")
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(set_attr "mode" "SI")])
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(define_insn "*movabssi_2_rex64"
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[(set (match_operand:SI 0 "register_operand" "=a,r")
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(mem:SI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
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"TARGET_64BIT"
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"TARGET_64BIT && ix86_check_movabs (insn, 1)"
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"@
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movabs{l}\t{%P1, %0|%0, %P1}
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mov{l}\t{%a1, %0|%0, %a1}"
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@ -1382,24 +1381,23 @@
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;; We fake an second form of instruction to force reload to load address
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;; into register when rax is not available
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(define_insn "*movabshi_1_rex64"
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[(set (mem:HI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
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(match_operand:HI 1 "nonmemory_operand" "a,er,i"))]
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"TARGET_64BIT"
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[(set (mem:HI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
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(match_operand:HI 1 "nonmemory_operand" "a,er"))]
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"TARGET_64BIT && ix86_check_movabs (insn, 0)"
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"@
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movabs{w}\t{%1, %P0|%P0, %1}
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mov{w}\t{%1, %a0|%a0, %1}
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movabs{w}\t{%1, %a0|%a0, %1}"
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mov{w}\t{%1, %a0|%a0, %1}"
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[(set_attr "type" "imov")
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(set_attr "modrm" "0,*,*")
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(set_attr "length_address" "8,0,0")
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(set_attr "length_immediate" "0,*,*")
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(set_attr "modrm" "0,*")
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(set_attr "length_address" "8,0")
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(set_attr "length_immediate" "0,*")
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(set_attr "memory" "store")
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(set_attr "mode" "HI")])
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(define_insn "*movabshi_2_rex64"
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[(set (match_operand:HI 0 "register_operand" "=a,r")
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(mem:HI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
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"TARGET_64BIT"
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"TARGET_64BIT && ix86_check_movabs (insn, 1)"
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"@
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movabs{w}\t{%P1, %0|%0, %P1}
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mov{w}\t{%a1, %0|%0, %a1}"
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@ -1701,24 +1699,23 @@
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;; We fake an second form of instruction to force reload to load address
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;; into register when rax is not available
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(define_insn "*movabsqi_1_rex64"
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[(set (mem:QI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
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(match_operand:QI 1 "nonmemory_operand" "a,er,i"))]
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"TARGET_64BIT"
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[(set (mem:QI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
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(match_operand:QI 1 "nonmemory_operand" "a,er"))]
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"TARGET_64BIT && ix86_check_movabs (insn, 0)"
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"@
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movabs{b}\t{%1, %P0|%P0, %1}
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mov{b}\t{%1, %a0|%a0, %1}
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movabs{b}\t{%1, %a0|%a0, %1}"
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mov{b}\t{%1, %a0|%a0, %1}"
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[(set_attr "type" "imov")
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(set_attr "modrm" "0,*,*")
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(set_attr "length_address" "8,0,0")
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(set_attr "length_immediate" "0,*,*")
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(set_attr "modrm" "0,*")
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(set_attr "length_address" "8,0")
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(set_attr "length_immediate" "0,*")
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(set_attr "memory" "store")
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(set_attr "mode" "QI")])
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(define_insn "*movabsqi_2_rex64"
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[(set (match_operand:QI 0 "register_operand" "=a,r")
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(mem:QI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
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"TARGET_64BIT"
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"TARGET_64BIT && ix86_check_movabs (insn, 1)"
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"@
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movabs{b}\t{%P1, %0|%0, %P1}
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mov{b}\t{%a1, %0|%0, %a1}"
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@ -2080,24 +2077,23 @@
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;; We fake an second form of instruction to force reload to load address
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;; into register when rax is not available
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(define_insn "*movabsdi_1_rex64"
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[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
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(match_operand:DI 1 "nonmemory_operand" "a,er,i"))]
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"TARGET_64BIT"
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[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
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(match_operand:DI 1 "nonmemory_operand" "a,er"))]
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"TARGET_64BIT && ix86_check_movabs (insn, 0)"
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"@
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movabs{q}\t{%1, %P0|%P0, %1}
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mov{q}\t{%1, %a0|%a0, %1}
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movabs{q}\t{%1, %a0|%a0, %1}"
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mov{q}\t{%1, %a0|%a0, %1}"
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[(set_attr "type" "imov")
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(set_attr "modrm" "0,*,*")
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(set_attr "length_address" "8,0,0")
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(set_attr "length_immediate" "0,*,*")
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(set_attr "modrm" "0,*")
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(set_attr "length_address" "8,0")
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(set_attr "length_immediate" "0,*")
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(set_attr "memory" "store")
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(set_attr "mode" "DI")])
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(define_insn "*movabsdi_2_rex64"
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[(set (match_operand:DI 0 "register_operand" "=a,r")
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(mem:DI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
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"TARGET_64BIT"
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"TARGET_64BIT && ix86_check_movabs (insn, 1)"
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"@
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movabs{q}\t{%P1, %0|%0, %P1}
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mov{q}\t{%a1, %0|%0, %a1}"
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@ -1,3 +1,8 @@
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2003-07-08 Jakub Jelinek <jakub@redhat.com>
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PR c/11420
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* gcc.dg/20030708-1.c: New test.
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2003-07-08 Richard Sandiford <rsandifo@redhat.com>
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* gcc.dg/compat/sdata-section.h: New file.
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gcc/testsuite/gcc.dg/20030708-1.c
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14
gcc/testsuite/gcc.dg/20030708-1.c
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/* PR c/11420 */
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/* { dg-do link } */
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/* { dg-options "-O2 -fpic" } */
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void (* volatile fn) (void);
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static void foo (void)
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{
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}
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int main (void)
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{
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fn = foo;
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return 0;
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}
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