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aarch64-simd-builtins.def (bswap): Use CF2 rather than CF10 so 2 is appended on the code.

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2014-12-05  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather
        than CF10 so 2 is appended on the code.
        * config/aarch64/aarch64-simd.md (bswap<mode>): Rename to ...
        (bswap<mode>2): This so it matches for the optabs.

From-SVN: r218435
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Andrew Pinski 2014-12-05 19:44:47 +00:00 committed by Andrew Pinski
parent 63edbb04b2
commit 7eb2bd5718
3 changed files with 10 additions and 3 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2014-12-05 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather
than CF10 so 2 is appended on the code.
* config/aarch64/aarch64-simd.md (bswap<mode>): Rename to ...
(bswap<mode>2): This so it matches for the optabs.
2014-12-05 Thomas Preud'homme <thomas.preudhomme@arm.com>
* regrename.c (find_best_rename_reg): Rename to ...

2
gcc/config/aarch64/aarch64-simd-builtins.def
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@ -317,7 +317,7 @@
VAR1 (UNOP, floatunsv4si, 2, v4sf)
VAR1 (UNOP, floatunsv2di, 2, v2df)
VAR5 (UNOPU, bswap, 10, v4hi, v8hi, v2si, v4si, v2di)
VAR5 (UNOPU, bswap, 2, v4hi, v8hi, v2si, v4si, v2di)
BUILTIN_VB (UNOP, rbit, 0)

4
gcc/config/aarch64/aarch64-simd.md
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@ -287,7 +287,7 @@
[(set_attr "type" "neon_mul_<Vetype><q>")]
)
(define_insn "bswap<mode>"
(define_insn "bswap<mode>2"
[(set (match_operand:VDQHSD 0 "register_operand" "=w")
(bswap:VDQHSD (match_operand:VDQHSD 1 "register_operand" "w")))]
"TARGET_SIMD"
@ -309,7 +309,7 @@
(ctz:VS (match_operand:VS 1 "register_operand")))]
"TARGET_SIMD"
{
emit_insn (gen_bswap<mode> (operands[0], operands[1]));
emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
<MODE>mode, 0);
emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));