arm-cores.def (arm1156t2-s, [...]): Use v6t2 tuning.
gcc/ * arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 tuning. (cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4) (cortex-m3, cortex-m1, cortex-m0): Use cortex tuning. * config/arm/arm-protos.h (tune_params): Add prefer_constant_pool field. * config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune) (arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune) (arm_fa726te_tune): Add prefer_constant_pool setting. (arm_v6t2_tune, arm_cortex_tune): New. * config/arm/arm.h (TARGET_USE_MOVT): Make dependent on prefer_constant_pool setting. From-SVN: r174577
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@ -1,3 +1,17 @@
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2011-06-02 Julian Brown <julian@codesourcery.com>
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* arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 tuning.
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(cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4)
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(cortex-m3, cortex-m1, cortex-m0): Use cortex tuning.
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* config/arm/arm-protos.h (tune_params): Add prefer_constant_pool
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field.
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* config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune)
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(arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune)
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(arm_fa726te_tune): Add prefer_constant_pool setting.
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(arm_v6t2_tune, arm_cortex_tune): New.
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* config/arm/arm.h (TARGET_USE_MOVT): Make dependent on
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prefer_constant_pool setting.
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2011-06-02 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (standard_sse_constant_p) <case 1>:
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@ -122,16 +122,16 @@ ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e)
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ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e)
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ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, 9e)
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ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, 9e)
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ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, 9e)
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ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2)
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ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2)
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ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex)
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ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex)
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ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9)
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ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, 9e)
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ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e)
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ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e)
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ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, 9e)
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ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, 9e)
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ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e)
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ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e)
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ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e)
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ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
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ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex)
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ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex)
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ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
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ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex)
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ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex)
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ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, cortex)
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ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, cortex)
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@ -224,6 +224,7 @@ struct tune_params
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int num_prefetch_slots;
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int l1_cache_size;
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int l1_cache_line_size;
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bool prefer_constant_pool;
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};
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extern const struct tune_params *current_tune;
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@ -856,48 +856,73 @@ const struct tune_params arm_slowmul_tune =
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{
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arm_slowmul_rtx_costs,
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NULL,
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3,
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ARM_PREFETCH_NOT_BENEFICIAL
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3, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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true /* Prefer constant pool. */
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};
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const struct tune_params arm_fastmul_tune =
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{
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arm_fastmul_rtx_costs,
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NULL,
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1,
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ARM_PREFETCH_NOT_BENEFICIAL
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1, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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true /* Prefer constant pool. */
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};
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const struct tune_params arm_xscale_tune =
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{
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arm_xscale_rtx_costs,
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xscale_sched_adjust_cost,
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2,
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ARM_PREFETCH_NOT_BENEFICIAL
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2, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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true /* Prefer constant pool. */
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};
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const struct tune_params arm_9e_tune =
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{
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arm_9e_rtx_costs,
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NULL,
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1,
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ARM_PREFETCH_NOT_BENEFICIAL
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1, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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true /* Prefer constant pool. */
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};
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const struct tune_params arm_v6t2_tune =
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{
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arm_9e_rtx_costs,
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NULL,
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1, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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false /* Prefer constant pool. */
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};
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/* Generic Cortex tuning. Use more specific tunings if appropriate. */
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const struct tune_params arm_cortex_tune =
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{
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arm_9e_rtx_costs,
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NULL,
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1, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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false /* Prefer constant pool. */
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};
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const struct tune_params arm_cortex_a9_tune =
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{
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arm_9e_rtx_costs,
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cortex_a9_sched_adjust_cost,
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1,
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ARM_PREFETCH_BENEFICIAL(4,32,32)
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1, /* Constant limit. */
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ARM_PREFETCH_BENEFICIAL(4,32,32),
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false /* Prefer constant pool. */
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};
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const struct tune_params arm_fa726te_tune =
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{
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arm_9e_rtx_costs,
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fa726te_sched_adjust_cost,
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1,
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ARM_PREFETCH_NOT_BENEFICIAL
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1, /* Constant limit. */
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ARM_PREFETCH_NOT_BENEFICIAL,
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true /* Prefer constant pool. */
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};
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@ -271,7 +271,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
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(TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em))
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/* Should MOVW/MOVT be used in preference to a constant pool. */
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#define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size)
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#define TARGET_USE_MOVT \
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(arm_arch_thumb2 && !optimize_size && !current_tune->prefer_constant_pool)
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/* We could use unified syntax for arm mode, but for now we just use it
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for Thumb-2. */
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