configure.ac: Add --enable-secureplt.
* configure.ac: Add --enable-secureplt. (HAVE_AS_REL16): Test for R_PPC_REL16 relocs. * config.in: Regenerate. * configure: Regenerate. * config.gcc (powerpc64-*-linux*, powerpc-*-linux*): Add rs6000/secureplt.h to tm_file when enable_secureplt. * doc/invoke.texi (msecure-plt, mbss-plt): Document. * doc/install.texi: Document --enable-targets and --enable-secureplt. Correct xrefs to "Using the GNU Compiler Collection (GCC)". * config/rs6000/secureplt.h: New file. * config/rs6000/sysv4.h (TARGET_SECURE_PLT): Define. (SUBTARGET_OVERRIDE_OPTIONS): Error if -msecure-plt given without assembler support. (CC1_SECURE_PLT_DEFAULT_SPEC): Define. (CC1_SPEC): Delete duplicate mno-sdata. Invoke cc1_secure_plt_default. (SUBTARGET_EXTRA_SPECS): Add cc1_secure_plt_default. * config/rs6000/sysv4.opt (msecure-plt, bss-plt): Add options. * config/rs6000/rs6000.h (TARGET_SECURE_PLT): Define. * config/rs6000/rs6000.c (rs6000_emit_load_toc_table): Handle TARGET_SECURE_PLT got register load sequence. (rs6000_emit_prologue): Call rs6000_emit_load_toc_table when TARGET_SECURE_PLT. (rs6000_elf_declare_function_name): Don't emit toc address offset word when TARGET_SECURE_PLT. * config/rs6000/rs6000.md (elf_high, elf_low): Move past load_toc_*. (load_toc_v4_PIC_1) Enable for TARGET_SECURE_PLT. (load_toc_v4_PIC_3b, load_toc_v4_PIC_3c): New insns. (call, call_value): Mark pic_offset_table_rtx used for sysv pic and TARGET_SECURE_PLT. (call_nonlocal_sysv, call_value_nonlocal_sysv, sibcall_nonlocal_sysv, sibcall_value_nonlocal_sysv): Add 32768 offset when TARGET_SECURE_PLT and -fPIC. * config/rs6000/tramp.asm (trampoline_initial): Use "bcl 20,31". (__trampoline_setup): Likewise. Init r30 before plt call. From-SVN: r100415
This commit is contained in:
Alan Modra
Alan Modra
parent
d2348bd591
commit
7f970b7092
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@ -1,3 +1,40 @@
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2005-06-01 Alan Modra <amodra@bigpond.net.au>
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* configure.ac: Add --enable-secureplt.
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(HAVE_AS_REL16): Test for R_PPC_REL16 relocs.
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* config.in: Regenerate.
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* configure: Regenerate.
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* config.gcc (powerpc64-*-linux*, powerpc-*-linux*): Add
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rs6000/secureplt.h to tm_file when enable_secureplt.
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* doc/invoke.texi (msecure-plt, mbss-plt): Document.
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* doc/install.texi: Document --enable-targets and --enable-secureplt.
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Correct xrefs to "Using the GNU Compiler Collection (GCC)".
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* config/rs6000/secureplt.h: New file.
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* config/rs6000/sysv4.h (TARGET_SECURE_PLT): Define.
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(SUBTARGET_OVERRIDE_OPTIONS): Error if -msecure-plt given without
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assembler support.
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(CC1_SECURE_PLT_DEFAULT_SPEC): Define.
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(CC1_SPEC): Delete duplicate mno-sdata. Invoke cc1_secure_plt_default.
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(SUBTARGET_EXTRA_SPECS): Add cc1_secure_plt_default.
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* config/rs6000/sysv4.opt (msecure-plt, bss-plt): Add options.
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* config/rs6000/rs6000.h (TARGET_SECURE_PLT): Define.
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* config/rs6000/rs6000.c (rs6000_emit_load_toc_table): Handle
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TARGET_SECURE_PLT got register load sequence.
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(rs6000_emit_prologue): Call rs6000_emit_load_toc_table when
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TARGET_SECURE_PLT.
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(rs6000_elf_declare_function_name): Don't emit toc address offset
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word when TARGET_SECURE_PLT.
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* config/rs6000/rs6000.md (elf_high, elf_low): Move past load_toc_*.
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(load_toc_v4_PIC_1) Enable for TARGET_SECURE_PLT.
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(load_toc_v4_PIC_3b, load_toc_v4_PIC_3c): New insns.
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(call, call_value): Mark pic_offset_table_rtx used for sysv pic and
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TARGET_SECURE_PLT.
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(call_nonlocal_sysv, call_value_nonlocal_sysv, sibcall_nonlocal_sysv,
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sibcall_value_nonlocal_sysv): Add 32768 offset when TARGET_SECURE_PLT
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and -fPIC.
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* config/rs6000/tramp.asm (trampoline_initial): Use "bcl 20,31".
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(__trampoline_setup): Likewise. Init r30 before plt call.
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2005-05-31 DJ Delorie <dj@redhat.com>
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* expr.c (convert_move): When a partial_int requires multiple
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@ -1581,6 +1581,9 @@ powerpc64-*-linux*)
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test x$with_cpu != x || cpu_is_64bit=yes
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test x$cpu_is_64bit != xyes || tm_file="${tm_file} rs6000/default64.h"
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tm_file="rs6000/biarch64.h ${tm_file} rs6000/linux64.h"
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if test x${enable_secureplt} = xyes; then
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tm_file="rs6000/secureplt.h ${tm_file}"
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fi
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extra_options="${extra_options} rs6000/sysv4.opt rs6000/linux64.opt"
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tmake_file="rs6000/t-fprules ${tmake_file} rs6000/t-ppccomm rs6000/t-linux64"
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;;
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@ -1690,6 +1693,9 @@ powerpc-*-linux*)
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tm_file="${tm_file} rs6000/linux.h"
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;;
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esac
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if test x${enable_secureplt} = xyes; then
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tm_file="rs6000/secureplt.h ${tm_file}"
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fi
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;;
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powerpc-*-gnu-gnualtivec*)
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tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h rs6000/gnu.h"
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@ -227,6 +227,12 @@
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#endif
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/* Define if your assembler supports R_PPC_REL16 relocs. */
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#ifndef USED_FOR_TARGET
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#undef HAVE_AS_REL16
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#endif
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/* Define if your assembler supports -relax option. */
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#ifndef USED_FOR_TARGET
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#undef HAVE_AS_RELAX_OPTION
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@ -12572,15 +12572,49 @@ rs6000_emit_load_toc_table (int fromprolog)
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rtx dest, insn;
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dest = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);
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if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 1)
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if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic)
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{
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rtx temp = (fromprolog
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? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
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: gen_reg_rtx (Pmode));
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insn = emit_insn (gen_load_toc_v4_pic_si (temp));
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char buf[30];
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rtx lab, tmp1, tmp2, got, tempLR;
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ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
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lab = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
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if (flag_pic == 2)
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got = gen_rtx_SYMBOL_REF (Pmode, toc_label_name);
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else
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got = rs6000_got_sym ();
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tmp1 = tmp2 = dest;
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if (!fromprolog)
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{
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tmp1 = gen_reg_rtx (Pmode);
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tmp2 = gen_reg_rtx (Pmode);
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}
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tempLR = (fromprolog
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? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
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: gen_reg_rtx (Pmode));
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insn = emit_insn (gen_load_toc_v4_PIC_1 (tempLR, lab));
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if (fromprolog)
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rs6000_maybe_dead (insn);
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insn = emit_move_insn (dest, temp);
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insn = emit_move_insn (tmp1, tempLR);
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if (fromprolog)
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rs6000_maybe_dead (insn);
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insn = emit_insn (gen_load_toc_v4_PIC_3b (tmp2, tmp1, got, lab));
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if (fromprolog)
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rs6000_maybe_dead (insn);
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insn = emit_insn (gen_load_toc_v4_PIC_3c (dest, tmp2, got, lab));
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if (fromprolog)
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rs6000_maybe_dead (insn);
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}
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else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 1)
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{
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rtx tempLR = (fromprolog
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? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
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: gen_reg_rtx (Pmode));
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insn = emit_insn (gen_load_toc_v4_pic_si (tempLR));
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if (fromprolog)
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rs6000_maybe_dead (insn);
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insn = emit_move_insn (dest, tempLR);
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if (fromprolog)
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rs6000_maybe_dead (insn);
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}
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@ -13674,7 +13708,8 @@ rs6000_emit_prologue (void)
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/* If we are using RS6000_PIC_OFFSET_TABLE_REGNUM, we need to set it up. */
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if ((TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
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|| (DEFAULT_ABI == ABI_V4 && flag_pic == 1
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|| (DEFAULT_ABI == ABI_V4
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&& (flag_pic == 1 || (flag_pic && TARGET_SECURE_PLT))
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&& regs_ever_live[RS6000_PIC_OFFSET_TABLE_REGNUM]))
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{
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/* If emit_load_toc_table will use the link register, we need to save
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@ -17204,6 +17239,7 @@ rs6000_elf_declare_function_name (FILE *file, const char *name, tree decl)
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}
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if (TARGET_RELOCATABLE
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&& !TARGET_SECURE_PLT
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&& (get_pool_size () != 0 || current_function_profile)
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&& uses_TOC ())
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{
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@ -144,6 +144,10 @@
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#define TARGET_POPCNTB 0
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#endif
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#ifndef TARGET_SECURE_PLT
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#define TARGET_SECURE_PLT 0
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#endif
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#define TARGET_32BIT (! TARGET_64BIT)
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/* Emit a dtp-relative reference to a TLS variable. */
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@ -7360,26 +7360,6 @@
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;; Now define ways of moving data around.
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;; Elf specific ways of loading addresses for non-PIC code.
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;; The output of this could be r0, but we make a very strong
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;; preference for a base register because it will usually
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;; be needed there.
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(define_insn "elf_high"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
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(high:SI (match_operand 1 "" "")))]
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"TARGET_ELF && ! TARGET_64BIT"
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"{liu|lis} %0,%1@ha")
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(define_insn "elf_low"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,!*r")
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(match_operand 2 "" "")))]
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"TARGET_ELF && ! TARGET_64BIT"
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"@
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{cal|la} %0,%2@l(%1)
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{ai|addic} %0,%1,%K2")
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;; Set up a register with a value from the GOT table
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(define_expand "movsi_got"
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@ -9810,7 +9790,8 @@
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[(set (match_operand:SI 0 "register_operand" "=l")
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(match_operand:SI 1 "immediate_operand" "s"))
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(use (unspec [(match_dup 1)] UNSPEC_TOC))]
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"TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"
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"TARGET_ELF && DEFAULT_ABI != ABI_AIX
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&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"
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"bcl 20,31,%1\\n%1:"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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@ -9833,6 +9814,22 @@
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"{l|lwz} %0,%2-%3(%1)"
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[(set_attr "type" "load")])
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(define_insn "load_toc_v4_PIC_3b"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=b")
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(plus:SI (match_operand:SI 1 "gpc_reg_operand" "r")
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(high:SI
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(minus:SI (match_operand:SI 2 "symbol_ref_operand" "s")
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(match_operand:SI 3 "symbol_ref_operand" "s")))))]
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"TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic"
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"{cau|addis} %0,%1,%2-%3@ha")
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(define_insn "load_toc_v4_PIC_3c"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
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||||
(minus:SI (match_operand:SI 2 "symbol_ref_operand" "s")
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(match_operand:SI 3 "symbol_ref_operand" "s"))))]
|
||||
"TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic"
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||||
"{cal|addi} %0,%1,%2-%3@l")
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;; If the TOC is shared over a translation unit, as happens with all
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;; the kinds of PIC that we support, we need to restore the TOC
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|
@ -9867,6 +9864,25 @@
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rs6000_emit_load_toc_table (FALSE);
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DONE;
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}")
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|
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;; Elf specific ways of loading addresses for non-PIC code.
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||||
;; The output of this could be r0, but we make a very strong
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;; preference for a base register because it will usually
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;; be needed there.
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||||
(define_insn "elf_high"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
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(high:SI (match_operand 1 "" "")))]
|
||||
"TARGET_ELF && ! TARGET_64BIT"
|
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"{liu|lis} %0,%1@ha")
|
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|
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(define_insn "elf_low"
|
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,!*r")
|
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(match_operand 2 "" "")))]
|
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"TARGET_ELF && ! TARGET_64BIT"
|
||||
"@
|
||||
{cal|la} %0,%2@l(%1)
|
||||
{ai|addic} %0,%1,%K2")
|
||||
|
||||
;; A function pointer under AIX is a pointer to a data area whose first word
|
||||
;; contains the actual address of the function, whose second word contains a
|
||||
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|
@ -9983,6 +9999,25 @@
|
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|
||||
operands[0] = XEXP (operands[0], 0);
|
||||
|
||||
if (DEFAULT_ABI == ABI_V4 && TARGET_SECURE_PLT
|
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&& flag_pic
|
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&& GET_CODE (operands[0]) == SYMBOL_REF
|
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&& !SYMBOL_REF_LOCAL_P (operands[0]))
|
||||
{
|
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rtx call;
|
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rtvec tmp;
|
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|
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tmp = gen_rtvec (3,
|
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gen_rtx_CALL (VOIDmode,
|
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gen_rtx_MEM (SImode, operands[0]),
|
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operands[1]),
|
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gen_rtx_USE (VOIDmode, operands[2]),
|
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gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)));
|
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call = emit_call_insn (gen_rtx_PARALLEL (VOIDmode, tmp));
|
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use_reg (&CALL_INSN_FUNCTION_USAGE (call), pic_offset_table_rtx);
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DONE;
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}
|
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|
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if (GET_CODE (operands[0]) != SYMBOL_REF
|
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|| (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[0]))
|
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|| (DEFAULT_ABI != ABI_DARWIN && (INTVAL (operands[2]) & CALL_LONG) != 0))
|
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|
|
@ -10034,6 +10069,28 @@
|
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|
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operands[1] = XEXP (operands[1], 0);
|
||||
|
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if (DEFAULT_ABI == ABI_V4 && TARGET_SECURE_PLT
|
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&& flag_pic
|
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&& GET_CODE (operands[1]) == SYMBOL_REF
|
||||
&& !SYMBOL_REF_LOCAL_P (operands[1]))
|
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{
|
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rtx call;
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rtvec tmp;
|
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|
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tmp = gen_rtvec (3,
|
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gen_rtx_SET (VOIDmode,
|
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operands[0],
|
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gen_rtx_CALL (VOIDmode,
|
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gen_rtx_MEM (SImode,
|
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operands[1]),
|
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operands[2])),
|
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gen_rtx_USE (VOIDmode, operands[3]),
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gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)));
|
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call = emit_call_insn (gen_rtx_PARALLEL (VOIDmode, tmp));
|
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use_reg (&CALL_INSN_FUNCTION_USAGE (call), pic_offset_table_rtx);
|
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DONE;
|
||||
}
|
||||
|
||||
if (GET_CODE (operands[1]) != SYMBOL_REF
|
||||
|| (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[1]))
|
||||
|| (DEFAULT_ABI != ABI_DARWIN && (INTVAL (operands[3]) & CALL_LONG) != 0))
|
||||
|
|
@ -10307,7 +10364,18 @@
|
|||
#if TARGET_MACHO
|
||||
return output_call(insn, operands, 0, 2);
|
||||
#else
|
||||
return (DEFAULT_ABI == ABI_V4 && flag_pic) ? "bl %z0@plt" : "bl %z0";
|
||||
if (DEFAULT_ABI == ABI_V4 && flag_pic)
|
||||
{
|
||||
if (TARGET_SECURE_PLT && flag_pic == 2)
|
||||
/* The magic 32768 offset here and in the other sysv call insns
|
||||
corresponds to the offset of r30 in .got2, as given by LCTOC1.
|
||||
See sysv4.h:toc_section. */
|
||||
return "bl %z0+32768@plt";
|
||||
else
|
||||
return "bl %z0@plt";
|
||||
}
|
||||
else
|
||||
return "bl %z0";
|
||||
#endif
|
||||
}
|
||||
[(set_attr "type" "branch,branch")
|
||||
|
|
@ -10352,7 +10420,15 @@
|
|||
#if TARGET_MACHO
|
||||
return output_call(insn, operands, 1, 3);
|
||||
#else
|
||||
return (DEFAULT_ABI == ABI_V4 && flag_pic) ? "bl %z1@plt" : "bl %z1";
|
||||
if (DEFAULT_ABI == ABI_V4 && flag_pic)
|
||||
{
|
||||
if (TARGET_SECURE_PLT && flag_pic == 2)
|
||||
return "bl %z1+32768@plt";
|
||||
else
|
||||
return "bl %z1@plt";
|
||||
}
|
||||
else
|
||||
return "bl %z1";
|
||||
#endif
|
||||
}
|
||||
[(set_attr "type" "branch,branch")
|
||||
|
|
@ -10567,7 +10643,15 @@
|
|||
else if (INTVAL (operands[2]) & CALL_V4_CLEAR_FP_ARGS)
|
||||
output_asm_insn (\"creqv 6,6,6\", operands);
|
||||
|
||||
return (DEFAULT_ABI == ABI_V4 && flag_pic) ? \"b %z0@plt\" : \"b %z0\";
|
||||
if (DEFAULT_ABI == ABI_V4 && flag_pic)
|
||||
{
|
||||
if (TARGET_SECURE_PLT && flag_pic == 2)
|
||||
return \"b %z0+32768@plt\";
|
||||
else
|
||||
return \"b %z0@plt\";
|
||||
}
|
||||
else
|
||||
return \"b %z0\";
|
||||
}"
|
||||
[(set_attr "type" "branch,branch")
|
||||
(set_attr "length" "4,8")])
|
||||
|
|
@ -10613,7 +10697,15 @@
|
|||
else if (INTVAL (operands[2]) & CALL_V4_CLEAR_FP_ARGS)
|
||||
output_asm_insn (\"creqv 6,6,6\", operands);
|
||||
|
||||
return (DEFAULT_ABI == ABI_V4 && flag_pic) ? \"b %z1@plt\" : \"b %z1\";
|
||||
if (DEFAULT_ABI == ABI_V4 && flag_pic)
|
||||
{
|
||||
if (TARGET_SECURE_PLT && flag_pic == 2)
|
||||
return \"b %z1+32768@plt\";
|
||||
else
|
||||
return \"b %z1@plt\";
|
||||
}
|
||||
else
|
||||
return \"b %z1\";
|
||||
}"
|
||||
[(set_attr "type" "branch,branch")
|
||||
(set_attr "length" "4,8")])
|
||||
|
|
|
|||
|
|
@ -0,0 +1,21 @@
|
|||
/* Default to -msecure-plt.
|
||||
Copyright (C) 2005 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2, or (at your option)
|
||||
any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING. If not, write to
|
||||
the Free Software Foundation, 59 Temple Place - Suite 330,
|
||||
Boston, MA 02111-1307, USA. */
|
||||
|
||||
#define CC1_SECURE_PLT_DEFAULT_SPEC "-msecure-plt"
|
||||
|
|
@ -59,6 +59,11 @@ extern enum rs6000_sdata_type rs6000_sdata;
|
|||
#define TARGET_NO_TOC (! TARGET_TOC)
|
||||
#define TARGET_NO_EABI (! TARGET_EABI)
|
||||
|
||||
#ifdef HAVE_AS_REL16
|
||||
#undef TARGET_SECURE_PLT
|
||||
#define TARGET_SECURE_PLT secure_plt
|
||||
#endif
|
||||
|
||||
extern const char *rs6000_abi_name;
|
||||
extern const char *rs6000_sdata_name;
|
||||
extern const char *rs6000_tls_size_string; /* For -mtls-size= */
|
||||
|
|
@ -205,6 +210,11 @@ do { \
|
|||
error ("-mcall-aixdesc must be big endian"); \
|
||||
} \
|
||||
\
|
||||
if (TARGET_SECURE_PLT != secure_plt) \
|
||||
{ \
|
||||
error ("-msecure-plt not supported by your assembler"); \
|
||||
} \
|
||||
\
|
||||
/* Treat -fPIC the same as -mrelocatable. */ \
|
||||
if (flag_pic > 1 && DEFAULT_ABI != ABI_AIX) \
|
||||
target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC; \
|
||||
|
|
@ -750,6 +760,10 @@ extern int fixuplabelno;
|
|||
|
||||
#define CC1_ENDIAN_DEFAULT_SPEC "%(cc1_endian_big)"
|
||||
|
||||
#ifndef CC1_SECURE_PLT_DEFAULT_SPEC
|
||||
#define CC1_SECURE_PLT_DEFAULT_SPEC ""
|
||||
#endif
|
||||
|
||||
/* Pass -G xxx to the compiler and set correct endian mode. */
|
||||
#define CC1_SPEC "%{G*} \
|
||||
%{mlittle|mlittle-endian: %(cc1_endian_little); \
|
||||
|
|
@ -762,7 +776,6 @@ extern int fixuplabelno;
|
|||
mcall-gnu : -mbig %(cc1_endian_big); \
|
||||
mcall-i960-old : -mlittle %(cc1_endian_little); \
|
||||
: %(cc1_endian_default)} \
|
||||
%{mno-sdata: -msdata=none } \
|
||||
%{meabi: %{!mcall-*: -mcall-sysv }} \
|
||||
%{!meabi: %{!mno-eabi: \
|
||||
%{mrelocatable: -meabi } \
|
||||
|
|
@ -774,6 +787,7 @@ extern int fixuplabelno;
|
|||
%{mcall-openbsd: -mno-eabi }}} \
|
||||
%{msdata: -msdata=default} \
|
||||
%{mno-sdata: -msdata=none} \
|
||||
%{!mbss-plt: %{!msecure-plt: %(cc1_secure_plt_default)}} \
|
||||
%{profile: -p}"
|
||||
|
||||
/* Don't put -Y P,<path> for cross compilers. */
|
||||
|
|
@ -1214,6 +1228,7 @@ ncrtn.o%s"
|
|||
{ "cc1_endian_big", CC1_ENDIAN_BIG_SPEC }, \
|
||||
{ "cc1_endian_little", CC1_ENDIAN_LITTLE_SPEC }, \
|
||||
{ "cc1_endian_default", CC1_ENDIAN_DEFAULT_SPEC }, \
|
||||
{ "cc1_secure_plt_default", CC1_SECURE_PLT_DEFAULT_SPEC }, \
|
||||
{ "cpp_os_ads", CPP_OS_ADS_SPEC }, \
|
||||
{ "cpp_os_yellowknife", CPP_OS_YELLOWKNIFE_SPEC }, \
|
||||
{ "cpp_os_mvme", CPP_OS_MVME_SPEC }, \
|
||||
|
|
|
|||
|
|
@ -139,3 +139,11 @@ Generate 32-bit code
|
|||
mnewlib
|
||||
Target RejectNegative
|
||||
no description yet
|
||||
|
||||
msecure-plt
|
||||
Target Report RejectNegative Var(secure_plt, 1)
|
||||
Generate code to use a non-exec PLT and GOT
|
||||
|
||||
mbss-plt
|
||||
Target Report RejectNegative Var(secure_plt, 0)
|
||||
Generate code for old exec BSS PLT
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
.align 2
|
||||
trampoline_initial:
|
||||
mflr r0
|
||||
bl 1f
|
||||
bcl 20,31,1f
|
||||
.Lfunc = .-trampoline_initial
|
||||
.long 0 /* will be replaced with function address */
|
||||
.Lchain = .-trampoline_initial
|
||||
|
|
@ -67,7 +67,7 @@ trampoline_size = .-trampoline_initial
|
|||
|
||||
FUNC_START(__trampoline_setup)
|
||||
mflr r0 /* save return address */
|
||||
bl .LCF0 /* load up __trampoline_initial into r7 */
|
||||
bcl 20,31,.LCF0 /* load up __trampoline_initial into r7 */
|
||||
.LCF0:
|
||||
mflr r11
|
||||
addi r7,r11,trampoline_initial-4-.LCF0 /* trampoline address -4 */
|
||||
|
|
@ -105,6 +105,12 @@ FUNC_START(__trampoline_setup)
|
|||
blr
|
||||
|
||||
.Labort:
|
||||
#if defined SHARED && defined HAVE_AS_REL16
|
||||
bcl 20,31,1f
|
||||
1: mflr r30
|
||||
addis r30,r30,_GLOBAL_OFFSET_TABLE_-1b@ha
|
||||
addi r30,r30,_GLOBAL_OFFSET_TABLE_-1b@l
|
||||
#endif
|
||||
bl JUMP_TARGET(abort)
|
||||
FUNC_END(__trampoline_setup)
|
||||
|
||||
|
|
|
|||
|
|
@ -891,6 +891,7 @@ Optional Features:
|
|||
--enable-initfini-array use .init_array/.fini_array sections
|
||||
--enable-sjlj-exceptions
|
||||
arrange to use setjmp/longjmp exception handling
|
||||
--enable-secureplt enable -msecure-plt by default for PowerPC
|
||||
--disable-win32-registry
|
||||
disable lookup of installation paths in the
|
||||
Registry on Windows hosts
|
||||
|
|
@ -7402,7 +7403,7 @@ if test "${gcc_cv_prog_makeinfo_modern+set}" = set; then
|
|||
else
|
||||
ac_prog_version=`$MAKEINFO --version 2>&1 |
|
||||
sed -n 's/^.*GNU texinfo.* \([0-9][0-9.]*\).*$/\1/p'`
|
||||
echo "configure:7405: version of makeinfo is $ac_prog_version" >&5
|
||||
echo "configure:7406: version of makeinfo is $ac_prog_version" >&5
|
||||
case $ac_prog_version in
|
||||
'') gcc_cv_prog_makeinfo_modern=no;;
|
||||
4.[2-9]*)
|
||||
|
|
@ -12361,6 +12362,12 @@ case "$LIBINTL" in *$LIBICONV*)
|
|||
LIBICONV= ;;
|
||||
esac
|
||||
|
||||
# Check whether --enable-secureplt or --disable-secureplt was given.
|
||||
if test "${enable_secureplt+set}" = set; then
|
||||
enableval="$enable_secureplt"
|
||||
|
||||
fi;
|
||||
|
||||
# Windows32 Registry support for specifying GCC installation paths.
|
||||
# Check whether --enable-win32-registry or --disable-win32-registry was given.
|
||||
if test "${enable_win32_registry+set}" = set; then
|
||||
|
|
@ -14729,6 +14736,55 @@ _ACEOF
|
|||
|
||||
fi
|
||||
|
||||
case $target in
|
||||
*-*-aix*) conftest_s=' .csect .text[PR]
|
||||
LCF..0:
|
||||
addis 11,30,_GLOBAL_OFFSET_TABLE_-LCF..0@ha';;
|
||||
*-*-darwin*)
|
||||
conftest_s=' .text
|
||||
LCF0:
|
||||
addis r11,r30,_GLOBAL_OFFSET_TABLE_-LCF0@ha';;
|
||||
*) conftest_s=' .text
|
||||
.LCF0:
|
||||
addis 11,30,_GLOBAL_OFFSET_TABLE_-.LCF0@ha';;
|
||||
esac
|
||||
|
||||
echo "$as_me:$LINENO: checking assembler for rel16 relocs" >&5
|
||||
echo $ECHO_N "checking assembler for rel16 relocs... $ECHO_C" >&6
|
||||
if test "${gcc_cv_as_powerpc_rel16+set}" = set; then
|
||||
echo $ECHO_N "(cached) $ECHO_C" >&6
|
||||
else
|
||||
gcc_cv_as_powerpc_rel16=no
|
||||
if test $in_tree_gas = yes; then
|
||||
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 17 \) \* 1000 + 0`
|
||||
then gcc_cv_as_powerpc_rel16=yes
|
||||
fi
|
||||
elif test x$gcc_cv_as != x; then
|
||||
echo "$conftest_s" > conftest.s
|
||||
if { ac_try='$gcc_cv_as -a32 -o conftest.o conftest.s >&5'
|
||||
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
|
||||
(eval $ac_try) 2>&5
|
||||
ac_status=$?
|
||||
echo "$as_me:$LINENO: \$? = $ac_status" >&5
|
||||
(exit $ac_status); }; }
|
||||
then
|
||||
gcc_cv_as_powerpc_rel16=yes
|
||||
else
|
||||
echo "configure: failed program was" >&5
|
||||
cat conftest.s >&5
|
||||
fi
|
||||
rm -f conftest.o conftest.s
|
||||
fi
|
||||
fi
|
||||
echo "$as_me:$LINENO: result: $gcc_cv_as_powerpc_rel16" >&5
|
||||
echo "${ECHO_T}$gcc_cv_as_powerpc_rel16" >&6
|
||||
if test $gcc_cv_as_powerpc_rel16 = yes; then
|
||||
|
||||
cat >>confdefs.h <<\_ACEOF
|
||||
#define HAVE_AS_REL16 1
|
||||
_ACEOF
|
||||
|
||||
fi
|
||||
;;
|
||||
|
||||
mips*-*-*)
|
||||
|
|
|
|||
|
|
@ -1441,6 +1441,10 @@ case "$LIBINTL" in *$LIBICONV*)
|
|||
LIBICONV= ;;
|
||||
esac
|
||||
|
||||
AC_ARG_ENABLE(secureplt,
|
||||
[ --enable-secureplt enable -msecure-plt by default for PowerPC],
|
||||
[], [])
|
||||
|
||||
# Windows32 Registry support for specifying GCC installation paths.
|
||||
AC_ARG_ENABLE(win32-registry,
|
||||
[ --disable-win32-registry
|
||||
|
|
@ -2822,6 +2826,24 @@ foo: nop
|
|||
[AC_DEFINE(HAVE_AS_POPCNTB, 1,
|
||||
[Define if your assembler supports popcntb field.])])
|
||||
|
||||
case $target in
|
||||
*-*-aix*) conftest_s=' .csect .text[[PR]]
|
||||
LCF..0:
|
||||
addis 11,30,_GLOBAL_OFFSET_TABLE_-LCF..0@ha';;
|
||||
*-*-darwin*)
|
||||
conftest_s=' .text
|
||||
LCF0:
|
||||
addis r11,r30,_GLOBAL_OFFSET_TABLE_-LCF0@ha';;
|
||||
*) conftest_s=' .text
|
||||
.LCF0:
|
||||
addis 11,30,_GLOBAL_OFFSET_TABLE_-.LCF0@ha';;
|
||||
esac
|
||||
|
||||
gcc_GAS_CHECK_FEATURE([rel16 relocs],
|
||||
gcc_cv_as_powerpc_rel16, [2,17,0], -a32,
|
||||
[$conftest_s],,
|
||||
[AC_DEFINE(HAVE_AS_REL16, 1,
|
||||
[Define if your assembler supports R_PPC_REL16 relocs.])])
|
||||
;;
|
||||
|
||||
mips*-*-*)
|
||||
|
|
|
|||
|
|
@ -1072,6 +1072,27 @@ do a @samp{make -C gcc gnatlib_and_tools}.
|
|||
Specify that the compiler should
|
||||
use DWARF 2 debugging information as the default.
|
||||
|
||||
@item --enable-targets=all
|
||||
@itemx --enable-targets=@var{target_list}
|
||||
Some GCC targets, e.g.@: powerpc64-linux, build bi-arch compilers.
|
||||
These are compilers that are able to generate either 64-bit or 32-bit
|
||||
code. Typicially, the corresponding 32-bit target, e.g.@:
|
||||
powerpc-linux for powerpc64-linux, only generates 32-bit code. This
|
||||
option enables the 32-bit target to be a bi-arch compiler, which is
|
||||
useful when you want a bi-arch compiler that defaults to 32-bit, and
|
||||
you are building a bi-arch or multi-arch binutils in a combined tree.
|
||||
Currently, this option only affects powerpc-linux.
|
||||
|
||||
@item --enable-secureplt
|
||||
This option enables @option{-msecure-plt} by default for powerpc-linux.
|
||||
@ifnothtml
|
||||
@xref{RS/6000 and PowerPC Options,, RS/6000 and PowerPC Options, gcc,
|
||||
Using the GNU Compiler Collection (GCC)},
|
||||
@end ifnothtml
|
||||
@ifhtml
|
||||
See ``RS/6000 and PowerPC Options'' in the main manual
|
||||
@end ifhtml
|
||||
|
||||
@item --enable-win32-registry
|
||||
@itemx --enable-win32-registry=@var{key}
|
||||
@itemx --disable-win32-registry
|
||||
|
|
@ -2465,7 +2486,7 @@ ARM-family processors. These targets support the AOUT file format:
|
|||
ATMEL AVR-family micro controllers. These are used in embedded
|
||||
applications. There are no standard Unix configurations.
|
||||
@ifnothtml
|
||||
@xref{AVR Options,, AVR Options, gcc, Using and Porting the GNU Compiler
|
||||
@xref{AVR Options,, AVR Options, gcc, Using the GNU Compiler
|
||||
Collection (GCC)},
|
||||
@end ifnothtml
|
||||
@ifhtml
|
||||
|
|
@ -2503,8 +2524,8 @@ indicates that you should upgrade to a newer version of the binutils.
|
|||
|
||||
The Blackfin processor, an Analog Devices DSP.
|
||||
@ifnothtml
|
||||
@xref{Blackfin Options,, Blackfin Options, gcc, Using and Porting the GNU
|
||||
Compiler Collection (GCC)},
|
||||
@xref{Blackfin Options,, Blackfin Options, gcc, Using the GNU Compiler
|
||||
Collection (GCC)},
|
||||
@end ifnothtml
|
||||
@ifhtml
|
||||
See ``Blackfin Options'' in the main manual
|
||||
|
|
@ -2522,8 +2543,8 @@ Texas Instruments TMS320C3x and TMS320C4x Floating Point Digital Signal
|
|||
Processors. These are used in embedded applications. There are no
|
||||
standard Unix configurations.
|
||||
@ifnothtml
|
||||
@xref{TMS320C3x/C4x Options,, TMS320C3x/C4x Options, gcc, Using and
|
||||
Porting the GNU Compiler Collection (GCC)},
|
||||
@xref{TMS320C3x/C4x Options,, TMS320C3x/C4x Options, gcc, Using the
|
||||
GNU Compiler Collection (GCC)},
|
||||
@end ifnothtml
|
||||
@ifhtml
|
||||
See ``TMS320C3x/C4x Options'' in the main manual
|
||||
|
|
@ -2552,7 +2573,7 @@ CRIS is the CPU architecture in Axis Communications ETRAX system-on-a-chip
|
|||
series. These are used in embedded applications.
|
||||
|
||||
@ifnothtml
|
||||
@xref{CRIS Options,, CRIS Options, gcc, Using and Porting the GNU Compiler
|
||||
@xref{CRIS Options,, CRIS Options, gcc, Using the GNU Compiler
|
||||
Collection (GCC)},
|
||||
@end ifnothtml
|
||||
@ifhtml
|
||||
|
|
|
|||
|
|
@ -636,7 +636,7 @@ See RS/6000 and PowerPC Options.
|
|||
-minsert-sched-nops=@var{scheme} @gol
|
||||
-mcall-sysv -mcall-netbsd @gol
|
||||
-maix-struct-return -msvr4-struct-return @gol
|
||||
-mabi=@var{abi-type} @gol
|
||||
-mabi=@var{abi-type} -msecure-plt -mbss-plt @gol
|
||||
-misel -mno-isel @gol
|
||||
-misel=yes -misel=no @gol
|
||||
-mspe -mno-spe @gol
|
||||
|
|
@ -10733,6 +10733,18 @@ ABI@.
|
|||
@opindex mabi=no-spe
|
||||
Disable Booke SPE ABI extensions for the current ABI@.
|
||||
|
||||
@item -msecure-plt
|
||||
@opindex msecure-plt
|
||||
Generate code that allows ld and ld.so to build executables and shared
|
||||
libraries with non-exec .plt and .got sections. This is a PowerPC
|
||||
32-bit SYSV ABI option.
|
||||
|
||||
@item -mbss-plt
|
||||
@opindex mbss-plt
|
||||
Generate code that uses a BSS .plt section that ld.so fills in, and
|
||||
requires .plt and .got sections that are both writable and executable.
|
||||
This is a PowerPC 32-bit SYSV ABI option.
|
||||
|
||||
@item -misel
|
||||
@itemx -mno-isel
|
||||
@opindex misel
|
||||
|
|
|
|||
Loading…
Reference in New Issue