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Enable target specific builtins and macros when using the target attribute or pragma on rs6000

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From-SVN: r181809
This commit is contained in:
Michael Meissner 2011-11-29 17:33:05 +00:00 committed by Michael Meissner
parent 8f5c9d6659
commit 7fa14a0130
10 changed files with 2647 additions and 2478 deletions
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80
gcc/ChangeLog
View File

@ -1,3 +1,83 @@
2011-11-29 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtins.def: Completely rewrite builtin
handling to centralize more of the builtins in this file. Change
some builtin enumerations to be more consistant. Use a new mask
to hold the current builtins, including SPE and PAIRED builtins
which no longer are set via target_flags masks. Add
-mdebug=builtin debug support. For power machines, define all
Altivec and VSX buitins when the compiler starts, but don't allow
the use of a builtin unless the appropriate switch is used, or
#pragma GCC target is used to change the options. If the user
uses #pragma GCC target, update the appropriate hardware macros.
* common/config/rs6000/rs6000-common.c (rs6000_handle_option):
Ditto.
* config/rs6000/rs6000.opt (rs6000_builtin_mask): Ditto.
* config/rs6000/rs6000-c.c (rs6000_macro_to_expand): Ditto.
(rs6000_define_or_undefine_macro): Ditto.
(rs6000_target_modify_macros): Ditto.
(rs6000_cpu_cpp_builtins): Ditto.
(altivec_overloaded_builtins): Ditto.
(altivec_build_resolved_builtin): Ditto.
* config/rs6000/rs6000.c (rs6000_target_modify_macros_ptr):
Ditto.
(rs6000_builtin_info): Ditto.
(def_builtin): Ditto.
(enable_mask_for_builtins): Ditto.
(DEBUG_FMT_X): Ditto.
(rs6000_debug_reg_global): Ditto.
(rs6000_builtin_mask_calculate): Ditto.
(rs6000_option_override_internal): Ditto.
(rs6000_builtin_conversion): Ditto.
(rs6000_builtin_vectorized_function): Ditto.
(bdesc_3arg): Ditto.
(bdesc_dst): Ditto.
(bdesc_2arg): Ditto.
(builtin_description_predicates): Ditto.
(bdesc_altivec_preds): Ditto.
(bdesc_spe_predicates): Ditto.
(bdesc_spe_evsel): Ditto.
(bdesc_paired_preds): Ditto.
(bdesc_abs): Ditto.
(bdesc_1arg): Ditto.
(rs6000_overloaded_builtin_p): Ditto.
(rs6000_expand_unop_builtin): Ditto.
(bdesc_2arg_spe): Ditto.
(spe_expand_builtin): Ditto.
(rs6000_invalid_builtin): Ditto.
(rs6000_expand_builtin): Ditto.
(rs6000_init_builtins): Ditto.
(spe_init_builtins): Ditto.
(paired_init_builtins): Ditto.
(altivec_init_builtins): Ditto.
(builtin_function_type): Ditto.
(rs6000_common_init_builtins): Ditto.
(rs6000_builtin_reciprocal): Ditto.
(rs6000_builtin_mask_names): Ditto.
(rs6000_pragma_target_parse): Ditto.
(rs6000_function_specific_print): Ditto.
* config/rs6000/rs6000.h (MASK_DEBUG_BUILTIN): Ditto.
(MASK_DEBUG_ALL): Ditto.
(TARGET_DEBUG_BUILTIN): Ditto.
(TARGET_EXTRA_BUILTINS): Ditto.
(REGISTER_TARGET_PRAGMAS): Ditto.
(enum rs6000_btc): Ditto.
(RS6000_BTC_*): Ditto.
(RS6000_BTM_*): Ditto.
(enum rs6000_builtins): Ditto.
* config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_p):
Ditto.
(rs6000_target_modify_macros): Ditto.
(rs6000_target_modify_macros_ptr): Ditto.
* config/rs6000/vector.md (unsfloat<VEC_int><mode>2): Use the
standard name for converting vector unsigned values to floating
point. Delete the TARGET_VECTORIZE_BUILTIN_CONVERSION hook, which
is handled by machine independent code.
* config/rs6000/rs6000.c (TARGET_VECTORIZE_BUILTIN_CONVERSION):
Ditto.
(rs6000_builtin_conversion): Ditto.
2011-11-29 Dodji Seketeli <dodji@redhat.com>
* tree-diagnostic (struct loc_t): Rename into struct loc_map_pair.

2
gcc/common/config/rs6000/rs6000-common.c
View File

@ -202,6 +202,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
mask = MASK_DEBUG_COST;
else if (! strcmp (q, "target"))
mask = MASK_DEBUG_TARGET;
else if (! strcmp (q, "builtin"))
mask = MASK_DEBUG_BUILTIN;
else
error_at (loc, "unknown -mdebug-%s switch", q);

2362
gcc/config/rs6000/rs6000-builtin.def
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File diff suppressed because it is too large Load Diff

298
gcc/config/rs6000/rs6000-c.c
View File

@ -159,6 +159,11 @@ rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token *tok)
cpp_hashnode *expand_this = tok->val.node.node;
cpp_hashnode *ident;
/* If the current machine does not have altivec, don't look for the
keywords. */
if (!TARGET_ALTIVEC)
return NULL;
ident = altivec_categorize_keyword (tok);
if (ident != expand_this)
@ -260,40 +265,107 @@ rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token *tok)
return expand_this;
}
/* Define or undefine a single macro. */
static void
rs6000_define_or_undefine_macro (bool define_p, const char *name)
{
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
fprintf (stderr, "#%s %s\n", (define_p) ? "define" : "undef", name);
if (define_p)
cpp_define (parse_in, name);
else
cpp_undef (parse_in, name);
}
/* Define or undefine macros based on the current target. If the user does
#pragma GCC target, we need to adjust the macros dynamically. Note, some of
the options needed for builtins have been moved to separate variables, so
have both the target flags and the builtin flags as arguments. */
void
rs6000_target_modify_macros (bool define_p, int flags, unsigned bu_mask)
{
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
fprintf (stderr, "rs6000_target_modify_macros (%s, 0x%x, 0x%x)\n",
(define_p) ? "define" : "undef",
(unsigned) flags, bu_mask);
/* target_flags based options. */
if ((flags & MASK_POWER2) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR2");
else if ((flags & MASK_POWER) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR");
if ((flags & MASK_POWERPC) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC");
if ((flags & MASK_PPC_GPOPT) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCSQ");
if ((flags & MASK_PPC_GFXOPT) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCGR");
if ((flags & MASK_POWERPC64) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64");
if ((flags & MASK_MFCRF) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR4");
if ((flags & MASK_POPCNTB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
if ((flags & MASK_FPRND) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
if ((flags & MASK_CMPB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
if ((flags & MASK_MFPGPR) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X");
if ((flags & MASK_POPCNTD) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
if ((flags & MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & MASK_RECIP_PRECISION) != 0)
rs6000_define_or_undefine_macro (define_p, "__RECIP_PRECISION__");
if ((flags & MASK_ALTIVEC) != 0)
{
const char *vec_str = (define_p) ? "__VEC__=10206" : "__VEC__";
rs6000_define_or_undefine_macro (define_p, "__ALTIVEC__");
rs6000_define_or_undefine_macro (define_p, vec_str);
/* Define this when supporting context-sensitive keywords. */
if (!flag_iso)
rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__");
}
if ((flags & MASK_VSX) != 0)
rs6000_define_or_undefine_macro (define_p, "__VSX__");
/* options from the builtin masks. */
if ((bu_mask & RS6000_BTM_SPE) != 0)
rs6000_define_or_undefine_macro (define_p, "__SPE__");
if ((bu_mask & RS6000_BTM_PAIRED) != 0)
rs6000_define_or_undefine_macro (define_p, "__PAIRED__");
if ((bu_mask & RS6000_BTM_CELL) != 0)
rs6000_define_or_undefine_macro (define_p, "__PPU__");
}
void
rs6000_cpu_cpp_builtins (cpp_reader *pfile)
{
if (TARGET_POWER2)
builtin_define ("_ARCH_PWR2");
else if (TARGET_POWER)
builtin_define ("_ARCH_PWR");
if (TARGET_POWERPC)
builtin_define ("_ARCH_PPC");
if (TARGET_PPC_GPOPT)
builtin_define ("_ARCH_PPCSQ");
if (TARGET_PPC_GFXOPT)
builtin_define ("_ARCH_PPCGR");
if (TARGET_POWERPC64)
builtin_define ("_ARCH_PPC64");
if (TARGET_MFCRF)
builtin_define ("_ARCH_PWR4");
if (TARGET_POPCNTB)
builtin_define ("_ARCH_PWR5");
if (TARGET_FPRND)
builtin_define ("_ARCH_PWR5X");
if (TARGET_CMPB)
builtin_define ("_ARCH_PWR6");
if (TARGET_MFPGPR)
builtin_define ("_ARCH_PWR6X");
/* Define all of the common macros. */
rs6000_target_modify_macros (true, target_flags,
rs6000_builtin_mask_calculate ());
/* _ARCH_COM does not fit in the framework of target_modify_macros, so handle
it specially. */
if (! TARGET_POWER && ! TARGET_POWER2 && ! TARGET_POWERPC)
builtin_define ("_ARCH_COM");
if (TARGET_POPCNTD)
builtin_define ("_ARCH_PWR7");
if (TARGET_ALTIVEC)
{
builtin_define ("__ALTIVEC__");
builtin_define ("__VEC__=10206");
if (TARGET_FRE)
builtin_define ("__RECIP__");
if (TARGET_FRES)
builtin_define ("__RECIPF__");
if (TARGET_FRSQRTE)
builtin_define ("__RSQRTE__");
if (TARGET_FRSQRTES)
builtin_define ("__RSQRTEF__");
if (TARGET_EXTRA_BUILTINS)
{
/* Define the AltiVec syntactic elements. */
builtin_define ("__vector=__attribute__((altivec(vector__)))");
builtin_define ("__pixel=__attribute__((altivec(pixel__))) unsigned short");
@ -301,9 +373,6 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
if (!flag_iso)
{
/* Define this when supporting context-sensitive keywords. */
builtin_define ("__APPLE_ALTIVEC__");
builtin_define ("vector=vector");
builtin_define ("pixel=pixel");
builtin_define ("bool=bool");
@ -314,14 +383,6 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
cpp_get_callbacks (pfile)->macro_to_expand = rs6000_macro_to_expand;
}
}
if (rs6000_cpu == PROCESSOR_CELL)
builtin_define ("__PPU__");
if (TARGET_SPE)
builtin_define ("__SPE__");
if (TARGET_PAIRED_FLOAT)
builtin_define ("__PAIRED__");
if (TARGET_SOFT_FLOAT)
builtin_define ("_SOFT_FLOAT");
if ((!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
||(TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_DOUBLE_FLOAT))
builtin_define ("_SOFT_DOUBLE");
@ -331,10 +392,9 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
/* Used by libstdc++. */
if (TARGET_NO_LWSYNC)
builtin_define ("__NO_LWSYNC__");
if (TARGET_VSX)
{
builtin_define ("__VSX__");
if (TARGET_EXTRA_BUILTINS)
{
/* For the VSX builtin functions identical to Altivec functions, just map
the altivec builtin into the vsx version (the altivec functions
generate VSX code if -mvsx). */
@ -365,16 +425,6 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__builtin_vsx_xvnmsubasp=__builtin_vsx_xvnmsubsp");
builtin_define ("__builtin_vsx_xvnmsubmsp=__builtin_vsx_xvnmsubsp");
}
if (RS6000_RECIP_HAVE_RE_P (DFmode))
builtin_define ("__RECIP__");
if (RS6000_RECIP_HAVE_RE_P (SFmode))
builtin_define ("__RECIPF__");
if (RS6000_RECIP_HAVE_RSQRTE_P (DFmode))
builtin_define ("__RSQRTE__");
if (RS6000_RECIP_HAVE_RSQRTE_P (SFmode))
builtin_define ("__RSQRTEF__");
if (TARGET_RECIP_PRECISION)
builtin_define ("__RECIP_PRECISION__");
/* Tell users they can use __builtin_bswap{16,64}. */
builtin_define ("__HAVE_BSWAP__");
@ -516,7 +566,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
{ ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_VEC_RSQRT_V2DF,
{ ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF,
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
@ -3198,140 +3248,140 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
~RS6000_BTI_pixel_V8HI },
/* Predicates. */
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
{ ALTIVEC_BUILTIN_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
{ ALTIVEC_BUILTIN_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
{ ALTIVEC_BUILTIN_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P,
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
/* cmpge is the same as cmpgt for all cases except floating point.
There is further code to deal with this special case in
altivec_build_resolved_builtin. */
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
{ ALTIVEC_BUILTIN_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
{ ALTIVEC_BUILTIN_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P,
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P,
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
{ (enum rs6000_builtins) 0, (enum rs6000_builtins) 0, 0, 0, 0, 0 }
@ -3402,7 +3452,7 @@ altivec_build_resolved_builtin (tree *args, int n,
condition (LT vs. EQ, which is recognizable by bit 1 of the first
argument) is reversed. Patch the arguments here before building
the resolved CALL_EXPR. */
if (desc->code == ALTIVEC_BUILTIN_VCMPGE_P
if (desc->code == ALTIVEC_BUILTIN_VEC_VCMPGE_P
&& desc->overloaded_code != ALTIVEC_BUILTIN_VCMPGEFP_P)
{
tree t;
@ -3448,18 +3498,20 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
{
VEC(tree,gc) *arglist = (VEC(tree,gc) *) passed_arglist;
unsigned int nargs = VEC_length (tree, arglist);
unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
enum rs6000_builtins fcode
= (enum rs6000_builtins)DECL_FUNCTION_CODE (fndecl);
tree fnargs = TYPE_ARG_TYPES (TREE_TYPE (fndecl));
tree types[3], args[3];
const struct altivec_builtin_types *desc;
unsigned int n;
if ((fcode < ALTIVEC_BUILTIN_OVERLOADED_FIRST
|| fcode > ALTIVEC_BUILTIN_OVERLOADED_LAST)
&& (fcode < VSX_BUILTIN_OVERLOADED_FIRST
|| fcode > VSX_BUILTIN_OVERLOADED_LAST))
if (!rs6000_overloaded_builtin_p (fcode))
return NULL_TREE;
if (TARGET_DEBUG_BUILTIN)
fprintf (stderr, "altivec_resolve_overloaded_builtin, code = %4d, %s\n",
(int)fcode, IDENTIFIER_POINTER (DECL_NAME (fndecl)));
/* For now treat vec_splats and vec_promote as the same. */
if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS
|| fcode == ALTIVEC_BUILTIN_VEC_PROMOTE)

4
gcc/config/rs6000/rs6000-protos.h
View File

@ -170,6 +170,8 @@ extern const char * output_isel (rtx *);
extern void rs6000_call_indirect_aix (rtx, rtx, rtx);
extern void rs6000_aix_asm_output_dwarf_table_ref (char *);
extern void get_ppc476_thunk_name (char name[32]);
extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins);
extern unsigned rs6000_builtin_mask_calculate (void);
/* Declare functions in rs6000-c.c */
@ -178,6 +180,8 @@ extern void rs6000_cpu_cpp_builtins (struct cpp_reader *);
#ifdef TREE_CODE
extern bool rs6000_pragma_target_parse (tree, tree);
#endif
extern void rs6000_target_modify_macros (bool, int, unsigned);
extern void (*rs6000_target_modify_macros_ptr) (bool, int, unsigned);
#if TARGET_MACHO
char *output_call (rtx, rtx *, int, int);

2243
gcc/config/rs6000/rs6000.c
View File

File diff suppressed because it is too large Load Diff

125
gcc/config/rs6000/rs6000.h
View File

@ -373,12 +373,14 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define MASK_DEBUG_ADDR 0x08 /* debug memory addressing */
#define MASK_DEBUG_COST 0x10 /* debug rtx codes */
#define MASK_DEBUG_TARGET 0x20 /* debug target attribute/pragma */
#define MASK_DEBUG_BUILTIN 0x40 /* debug builtins */
#define MASK_DEBUG_ALL (MASK_DEBUG_STACK \
| MASK_DEBUG_ARG \
| MASK_DEBUG_REG \
| MASK_DEBUG_ADDR \
| MASK_DEBUG_COST \
| MASK_DEBUG_TARGET)
| MASK_DEBUG_TARGET \
| MASK_DEBUG_BUILTIN)
#define TARGET_DEBUG_STACK (rs6000_debug & MASK_DEBUG_STACK)
#define TARGET_DEBUG_ARG (rs6000_debug & MASK_DEBUG_ARG)
@ -386,6 +388,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define TARGET_DEBUG_ADDR (rs6000_debug & MASK_DEBUG_ADDR)
#define TARGET_DEBUG_COST (rs6000_debug & MASK_DEBUG_COST)
#define TARGET_DEBUG_TARGET (rs6000_debug & MASK_DEBUG_TARGET)
#define TARGET_DEBUG_BUILTIN (rs6000_debug & MASK_DEBUG_BUILTIN)
extern enum rs6000_vector rs6000_vector_unit[];
@ -480,6 +483,24 @@ extern int rs6000_vector_align[];
#define TARGET_FCTIDUZ TARGET_POPCNTD
#define TARGET_FCTIWUZ TARGET_POPCNTD
/* For power systems, we want to enable Altivec and VSX builtins even if the
user did not use -maltivec or -mvsx to allow the builtins to be used inside
of #pragma GCC target or the target attribute to change the code level for a
given system. The SPE and Paired builtins are only enabled if you configure
the compiler for those builtins, and those machines don't support altivec or
VSX. */
#define TARGET_EXTRA_BUILTINS (!TARGET_SPE && !TARGET_PAIRED_FLOAT \
&& ((TARGET_POWERPC64 \
|| TARGET_PPC_GPOPT /* 970 */ \
|| TARGET_POPCNTB /* ISA 2.02 */ \
|| TARGET_CMPB /* ISA 2.05 */ \
|| TARGET_POPCNTD /* ISA 2.06 */ \
|| TARGET_ALTIVEC \
|| TARGET_VSX)))
/* E500 processors only support plain "sync", not lwsync. */
#define TARGET_NO_LWSYNC TARGET_E500
@ -531,6 +552,7 @@ extern unsigned char rs6000_recip_bits[];
c_register_pragma (0, "longcall", rs6000_pragma_longcall); \
targetm.target_option.pragma_parse = rs6000_pragma_target_parse; \
targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; \
rs6000_target_modify_macros_ptr = rs6000_target_modify_macros; \
} while (0)
/* Target #defines. */
@ -2271,24 +2293,83 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
/* General flags. */
extern int frame_pointer_needed;
/* Classification of the builtin functions to properly set the declaration tree
flags. */
enum rs6000_btc
{
RS6000_BTC_MISC, /* assume builtin can do anything */
RS6000_BTC_CONST, /* builtin is a 'const' function. */
RS6000_BTC_PURE, /* builtin is a 'pure' function. */
RS6000_BTC_FP_PURE /* builtin is 'pure' if rounding math. */
};
/* Classification of the builtin functions as to which switches enable the
builtin, and what attributes it should have. We used to use the target
flags macros, but we've run out of bits, so we now map the options into new
settings used here. */
/* Builtin attributes. */
#define RS6000_BTC_SPECIAL 0x00000000 /* Special function. */
#define RS6000_BTC_UNARY 0x00000001 /* normal unary function. */
#define RS6000_BTC_BINARY 0x00000002 /* normal binary function. */
#define RS6000_BTC_TERNARY 0x00000003 /* normal ternary function. */
#define RS6000_BTC_PREDICATE 0x00000004 /* predicate function. */
#define RS6000_BTC_ABS 0x00000005 /* Altivec/VSX ABS function. */
#define RS6000_BTC_EVSEL 0x00000006 /* SPE EVSEL function. */
#define RS6000_BTC_DST 0x00000007 /* Altivec DST function. */
#define RS6000_BTC_TYPE_MASK 0x0000000f /* Mask to isolate types */
#define RS6000_BTC_MISC 0x00000000 /* No special attributes. */
#define RS6000_BTC_CONST 0x00000100 /* uses no global state. */
#define RS6000_BTC_PURE 0x00000200 /* reads global state/mem. */
#define RS6000_BTC_FP 0x00000400 /* depends on rounding mode. */
#define RS6000_BTC_ATTR_MASK 0x00000700 /* Mask of the attributes. */
/* Miscellaneous information. */
#define RS6000_BTC_OVERLOADED 0x4000000 /* function is overloaded. */
/* Convenience macros to document the instruction type. */
#define RS6000_BTC_MEM RS6000_BTC_MISC /* load/store touches memory */
#define RS6000_BTC_SAT RS6000_BTC_MISC /* VMX saturate sets VSCR register */
#define RS6000_BTC_MEM RS6000_BTC_MISC /* load/store touches mem. */
#define RS6000_BTC_SAT RS6000_BTC_MISC /* saturate sets VSCR. */
#undef RS6000_BUILTIN
#undef RS6000_BUILTIN_EQUATE
#define RS6000_BUILTIN(NAME, TYPE) NAME,
#define RS6000_BUILTIN_EQUATE(NAME, VALUE) NAME = VALUE,
/* Builtin targets. For now, we reuse the masks for those options that are in
target flags, and pick two random bits for SPE and paired which aren't in
target_flags. */
#define RS6000_BTM_ALTIVEC MASK_ALTIVEC /* VMX/altivec vectors. */
#define RS6000_BTM_VSX MASK_VSX /* VSX (vector/scalar). */
#define RS6000_BTM_SPE MASK_STRING /* E500 */
#define RS6000_BTM_PAIRED MASK_MULHW /* 750CL paired insns. */
#define RS6000_BTM_FRE MASK_POPCNTB /* FRE instruction. */
#define RS6000_BTM_FRES MASK_PPC_GFXOPT /* FRES instruction. */
#define RS6000_BTM_FRSQRTE MASK_PPC_GFXOPT /* FRSQRTE instruction. */
#define RS6000_BTM_FRSQRTES MASK_POPCNTB /* FRSQRTES instruction. */
#define RS6000_BTM_POPCNTD MASK_POPCNTD /* Target supports ISA 2.06. */
#define RS6000_BTM_POWERPC MASK_POWERPC /* Target is powerpc. */
#define RS6000_BTM_CELL MASK_FPRND /* Target is cell powerpc. */
#define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \
| RS6000_BTM_VSX \
| RS6000_BTM_FRE \
| RS6000_BTM_FRES \
| RS6000_BTM_FRSQRTE \
| RS6000_BTM_FRSQRTES \
| RS6000_BTM_POPCNTD \
| RS6000_BTM_POWERPC \
| RS6000_BTM_CELL)
/* Define builtin enum index. */
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
#undef RS6000_BUILTIN_A
#undef RS6000_BUILTIN_D
#undef RS6000_BUILTIN_E
#undef RS6000_BUILTIN_P
#undef RS6000_BUILTIN_Q
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
enum rs6000_builtins
{
@ -2297,8 +2378,16 @@ enum rs6000_builtins
RS6000_BUILTIN_COUNT
};
#undef RS6000_BUILTIN
#undef RS6000_BUILTIN_EQUATE
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
#undef RS6000_BUILTIN_A
#undef RS6000_BUILTIN_D
#undef RS6000_BUILTIN_E
#undef RS6000_BUILTIN_P
#undef RS6000_BUILTIN_Q
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
enum rs6000_builtin_type_index
{

4
gcc/config/rs6000/rs6000.opt
View File

@ -79,6 +79,10 @@ enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL
TargetVariable
unsigned int rs6000_recip_control
;; Mask of what builtin functions are allowed
TargetVariable
unsigned int rs6000_builtin_mask
;; Debug flags
TargetVariable
unsigned int rs6000_debug

2
gcc/config/rs6000/vector.md
View File

@ -677,7 +677,7 @@
}
}")
(define_expand "unsigned_float<VEC_int><mode>2"
(define_expand "floatuns<VEC_int><mode>2"
[(set (match_operand:VEC_F 0 "vfloat_operand" "")
(unsigned_float:VEC_F (match_operand:<VEC_INT> 1 "vint_operand" "")))]
"VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

5
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,8 @@
2011-11-29 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/ppc-target-4.c: New file to test target
specific functions enabling target specific builtins.
2011-11-29 Yufeng Zhang <yufeng.zhang@arm.com>
Use complex floating-point constant in CDBL.