s390.md ("TDSI","DP"): New mode macros.
2005-10-04 Adrian Straetling <straetling@de.ibm.com> * config/s390/s390.md ("TDSI","DP"): New mode macros. ("TE","tg"): New mode attributes. ("sync_compare_and_swap<mode>"): Replace with a define_expand. ("sync_compare_and_swap<mode>_cc"): Replace GPR with TDSI. ("*sync_compare_and_swap<mode>_cc"): Replace with one pattern for dword_mode and one for GPRmode. From-SVN: r104952
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2005-10-04 Adrian Straetling <straetling@de.ibm.com>
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* config/s390/s390.md ("TDSI","DP"): New mode macros.
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("TE","tg"): New mode attributes.
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("sync_compare_and_swap<mode>"): Replace with a define_expand.
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("sync_compare_and_swap<mode>_cc"): Replace GPR with TDSI.
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("*sync_compare_and_swap<mode>_cc"): Replace with one pattern for
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dword_mode and one for GPRmode.
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2005-10-04 Ian Lance Taylor <ian@airs.com>
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PR preprocessor/13726
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@ -278,6 +278,10 @@
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;; same template.
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(define_mode_macro FPR [DF SF])
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;; These mode macros allow 31-bit and 64-bit TDSI patterns to be generated
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;; from the same template.
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(define_mode_macro TDSI [(TI "TARGET_64BIT") DI SI])
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;; These mode macros allow 31-bit and 64-bit GPR patterns to be generated
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;; from the same template.
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(define_mode_macro GPR [(DI "TARGET_64BIT") SI])
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@ -285,6 +289,7 @@
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;; This mode macro allows :P to be used for patterns that operate on
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;; pointer-sized quantities. Exactly one of the two alternatives will match.
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(define_mode_macro DP [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")])
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(define_mode_macro P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
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;; This mode macro allows the QI and HI patterns to be defined from
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@ -327,10 +332,18 @@
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;; in "RRE" for DImode and "RR" for SImode.
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(define_mode_attr E [(DI "E") (SI "")])
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;; This attribute handles differences in the instruction 'type' and will result
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;; in "RSE" for TImode and "RS" for DImode.
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(define_mode_attr TE [(TI "E") (DI "")])
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;; In GPR templates, a string like "lc<g>r" will expand to "lcgr" in DImode
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;; and "lcr" in SImode.
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(define_mode_attr g [(DI "g") (SI "")])
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;; In DP templates, a string like "cds<g>" will expand to "cdsg" in TImode
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;; and "cds" in DImode.
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(define_mode_attr tg [(TI "g") (DI "")])
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;; In GPR templates, a string like "c<gf>dbr" will expand to "cgdbr" in DImode
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;; and "cfdbr" in SImode.
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(define_mode_attr gf [(DI "g") (SI "f")])
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@ -7130,42 +7143,58 @@
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; compare and swap patterns.
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;
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(define_insn "sync_compare_and_swap<mode>"
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[(set (match_operand:GPR 0 "register_operand" "=r")
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(match_operand:GPR 1 "memory_operand" "+Q"))
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(set (match_dup 1)
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(unspec_volatile:GPR
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[(match_dup 1)
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(match_operand:GPR 2 "register_operand" "0")
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(match_operand:GPR 3 "register_operand" "r")]
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UNSPECV_CAS))
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(clobber (reg:CC CC_REGNUM))]
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""
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"cs<g>\t%0,%3,%S1"
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[(set_attr "op_type" "RS<E>")
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(set_attr "type" "sem")])
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(define_expand "sync_compare_and_swap<mode>"
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[(parallel
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[(set (match_operand:TDSI 0 "register_operand" "")
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(match_operand:TDSI 1 "memory_operand" ""))
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(set (match_dup 1)
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(unspec_volatile:TDSI
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[(match_dup 1)
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(match_operand:TDSI 2 "register_operand" "")
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(match_operand:TDSI 3 "register_operand" "")]
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UNSPECV_CAS))
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(set (reg:CCZ1 CC_REGNUM)
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(compare:CCZ1 (match_dup 1) (match_dup 2)))])]
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"")
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(define_expand "sync_compare_and_swap_cc<mode>"
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[(parallel
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[(set (match_operand:GPR 0 "register_operand" "")
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(match_operand:GPR 1 "memory_operand" ""))
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[(set (match_operand:TDSI 0 "register_operand" "")
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(match_operand:TDSI 1 "memory_operand" ""))
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(set (match_dup 1)
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(unspec_volatile:GPR
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(unspec_volatile:TDSI
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[(match_dup 1)
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(match_operand:GPR 2 "register_operand" "")
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(match_operand:GPR 3 "register_operand" "")]
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(match_operand:TDSI 2 "register_operand" "")
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(match_operand:TDSI 3 "register_operand" "")]
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UNSPECV_CAS))
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(set (match_dup 4)
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(compare:CCZ1 (match_dup 1) (match_dup 2)))])]
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""
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{
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/* Emulate compare. */
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operands[4] = gen_rtx_REG (CCZ1mode, CC_REGNUM);
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s390_compare_op0 = operands[1];
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s390_compare_op1 = operands[2];
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s390_compare_emitted = operands[4];
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})
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(define_insn "*sync_compare_and_swap_cc<mode>"
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(define_insn "*sync_compare_and_swap<mode>"
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[(set (match_operand:DP 0 "register_operand" "=r")
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(match_operand:DP 1 "memory_operand" "+Q"))
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(set (match_dup 1)
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(unspec_volatile:DP
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[(match_dup 1)
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(match_operand:DP 2 "register_operand" "0")
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(match_operand:DP 3 "register_operand" "r")]
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UNSPECV_CAS))
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(set (reg:CCZ1 CC_REGNUM)
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(compare:CCZ1 (match_dup 1) (match_dup 2)))]
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""
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"cds<tg>\t%0,%3,%S1"
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[(set_attr "op_type" "RS<TE>")
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(set_attr "type" "sem")])
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(define_insn "*sync_compare_and_swap<mode>"
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[(set (match_operand:GPR 0 "register_operand" "=r")
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(match_operand:GPR 1 "memory_operand" "+Q"))
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(set (match_dup 1)
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