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[PR73350][PR80862] Improve subst for RC-capable insns.

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PR target/73350,80862
gcc/
	* config/i386/subst.md (round): Fix round pattern.
	* config/i386/i386.c (ix86_erase_embedded_rounding):
	Fix erasing rounding for the fixed pattern.

gcc/testsuite/
	* gcc.target/i386/pr73350.c: New test.

From-SVN: r249009
This commit is contained in:
Julia Koval 2017-06-08 13:24:50 +02:00 committed by Kirill Yukhin
parent 1972030cf1
commit 8055904e9e
5 changed files with 74 additions and 32 deletions
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7
gcc/ChangeLog
View File

@ -1,3 +1,10 @@
2017-08-08 Julia Koval <julia.koval@intel.com>
PR target/73350,80862
* config/i386/subst.md (round): Fix round pattern.
* config/i386/i386.c (ix86_erase_embedded_rounding):
Fix erasing rounding for the fixed pattern.
2017-06-08 Jan Hubicka <hubicka@ucw.cz>
* cfgbuild.c (find_many_sub_basic_blocks): Fix thinko.

64
gcc/config/i386/i386.c
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@ -36460,38 +36460,48 @@ ix86_erase_embedded_rounding (rtx pat)
if (GET_CODE (pat) == INSN)
pat = PATTERN (pat);
gcc_assert (GET_CODE (pat) == PARALLEL);
if (GET_CODE (pat) == PARALLEL)
{
if (XVECLEN (pat, 0) == 2)
{
rtx p0 = XVECEXP (pat, 0, 0);
rtx p1 = XVECEXP (pat, 0, 1);
gcc_assert (GET_CODE (p0) == SET
&& GET_CODE (p1) == UNSPEC
&& XINT (p1, 1) == UNSPEC_EMBEDDED_ROUNDING);
return p0;
}
else
{
rtx *res = XALLOCAVEC (rtx, XVECLEN (pat, 0));
int i = 0;
int j = 0;
if (XVECLEN (pat, 0) == 2)
{
rtx p0 = XVECEXP (pat, 0, 0);
rtx p1 = XVECEXP (pat, 0, 1);
for (; i < XVECLEN (pat, 0); ++i)
{
rtx elem = XVECEXP (pat, 0, i);
if (GET_CODE (elem) != UNSPEC
|| XINT (elem, 1) != UNSPEC_EMBEDDED_ROUNDING)
res[j++] = elem;
}
gcc_assert (GET_CODE (p0) == SET
&& GET_CODE (p1) == UNSPEC
&& XINT (p1, 1) == UNSPEC_EMBEDDED_ROUNDING);
/* No more than 1 occurence was removed. */
gcc_assert (j >= XVECLEN (pat, 0) - 1);
return p0;
return gen_rtx_PARALLEL (GET_MODE (pat), gen_rtvec_v (j, res));
}
}
else
{
rtx *res = XALLOCAVEC (rtx, XVECLEN (pat, 0));
int i = 0;
int j = 0;
for (; i < XVECLEN (pat, 0); ++i)
{
rtx elem = XVECEXP (pat, 0, i);
if (GET_CODE (elem) != UNSPEC
|| XINT (elem, 1) != UNSPEC_EMBEDDED_ROUNDING)
res [j++] = elem;
}
/* No more than 1 occurence was removed. */
gcc_assert (j >= XVECLEN (pat, 0) - 1);
return gen_rtx_PARALLEL (GET_MODE (pat), gen_rtvec_v (j, res));
}
{
gcc_assert (GET_CODE (pat) == SET);
rtx src = SET_SRC (pat);
gcc_assert (XVECLEN (src, 0) == 2);
rtx p0 = XVECEXP (src, 0, 0);
gcc_assert (GET_CODE (src) == UNSPEC
&& XINT (src, 1) == UNSPEC_EMBEDDED_ROUNDING);
rtx res = gen_rtx_SET (SET_DEST (pat), p0);
return res;
}
}
/* Subroutine of ix86_expand_round_builtin to take care of comi insns

11
gcc/config/i386/subst.md
View File

@ -137,12 +137,13 @@
(define_subst "round"
[(set (match_operand:SUBST_A 0)
(match_operand:SUBST_A 1))]
(match_operand:SUBST_A 1))]
"TARGET_AVX512F"
[(parallel[
(set (match_dup 0)
(match_dup 1))
(unspec [(match_operand:SI 2 "const_4_or_8_to_11_operand")] UNSPEC_EMBEDDED_ROUNDING)])])
[(set (match_dup 0)
(unspec:SUBST_A [(match_dup 1)
(match_operand:SI 2 "const_4_or_8_to_11_operand")]
UNSPEC_EMBEDDED_ROUNDING))
])
(define_subst_attr "round_saeonly_name" "round_saeonly" "" "_round")
(define_subst_attr "round_saeonly_mask_operand2" "mask" "%r2" "%r4")

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2017-08-08 Julia Koval <julia.koval@intel.com>
PR target/73350,80862
* gcc.target/i386/pr73350.c: New test.
2017-06-08 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/builtin-fpclassify.c: New codegen test.

19
gcc/testsuite/gcc.target/i386/pr73350.c Normal file
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@ -0,0 +1,19 @@
/* { dg-do run } */
/* { dg-options "-O2 -mavx512f" } */
/* { dg-require-effective-target avx512f } */
#include <math.h>
#define AVX512F
#include "avx512f-helper.h"
void
TEST (void)
{
__m512 a = _mm512_set1_ps ((float) M_PI);
__m512 b = _mm512_set1_ps ((float) 1.f);
__m512 result1 = _mm512_add_round_ps (a, b, (_MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC));
__m512 result2 = _mm512_add_round_ps (a, b, (_MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC));
if (result1[0] == result2[0])
abort ();
}