re PR target/70821 (x86_64: __atomic_fetch_add/sub() uses XADD rather than DECL in some cases)
PR target/70821 * config/i386/sync.md (define_peephole2 *atomic_fetch_add_cmp<mode>): Add new peephole2 where the first insn is *mov<mode>_or instead of *mov<mode>_internal. * gcc.target/i386/pr70821.c: New test. From-SVN: r235586
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2016-04-28 Jakub Jelinek <jakub@redhat.com>
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PR target/70821
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* config/i386/sync.md (define_peephole2 *atomic_fetch_add_cmp<mode>):
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Add new peephole2 where the first insn is *mov<mode>_or instead of
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*mov<mode>_internal.
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2016-04-28 Segher Boesssenkool <segher@kernel.crashing.org>
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* tracer.c (bb_seen): Make static.
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@ -467,6 +467,36 @@
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(plus:SWI (match_dup 1)
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(match_dup 2)))])])
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;; Likewise, but for the -Os special case of *mov<mode>_or.
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(define_peephole2
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[(parallel [(set (match_operand:SWI 0 "register_operand")
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(match_operand:SWI 2 "constm1_operand"))
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(clobber (reg:CC FLAGS_REG))])
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(parallel [(set (match_dup 0)
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(unspec_volatile:SWI
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[(match_operand:SWI 1 "memory_operand")
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(match_operand:SI 4 "const_int_operand")]
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UNSPECV_XCHG))
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(set (match_dup 1)
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(plus:SWI (match_dup 1)
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(match_dup 0)))
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(clobber (reg:CC FLAGS_REG))])
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(set (reg:CCZ FLAGS_REG)
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(compare:CCZ (match_dup 0)
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(match_operand:SWI 3 "const_int_operand")))]
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"peep2_reg_dead_p (3, operands[0])
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&& (unsigned HOST_WIDE_INT) INTVAL (operands[2])
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== -(unsigned HOST_WIDE_INT) INTVAL (operands[3])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])"
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[(parallel [(set (reg:CCZ FLAGS_REG)
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(compare:CCZ
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(unspec_volatile:SWI [(match_dup 1) (match_dup 4)]
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UNSPECV_XCHG)
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(match_dup 3)))
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(set (match_dup 1)
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(plus:SWI (match_dup 1)
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(match_dup 2)))])])
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(define_insn "*atomic_fetch_add_cmp<mode>"
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[(set (reg:CCZ FLAGS_REG)
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(compare:CCZ
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@ -1,3 +1,8 @@
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2016-04-28 Jakub Jelinek <jakub@redhat.com>
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PR target/70821
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* gcc.target/i386/pr70821.c: New test.
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2016-04-28 Bill Seurer <seurer@linux.vnet.ibm.com>
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* gcc.target/powerpc/vec-adde.c: New test.
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gcc/testsuite/gcc.target/i386/pr70821.c
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gcc/testsuite/gcc.target/i386/pr70821.c
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/* PR target/70821 */
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/* { dg-do compile } */
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/* { dg-options "-Os" } */
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/* { dg-additional-options "-march=i686" { target ia32 } } */
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void bar (void);
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void
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foo (int *p)
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{
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if (__atomic_sub_fetch (p, 1, __ATOMIC_SEQ_CST))
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bar ();
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}
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/* { dg-final { scan-assembler "lock;? dec" } } */
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/* { dg-final { scan-assembler-not "lock;? xadd" } } */
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