[ARC] Remove non standard funcions calls.
Replace all custom "library" calls with compiler known patterns. gcc/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.md (mulsi3): Remove call to mulsi_600_lib. (mulsi3_600_lib): Remove pattern. (umulsi3_highpart_600_lib_le): Likewise. (umulsi3_highpart): Remove call to umulsi3_highpart_600_lib_le. (umulsidi3): Remove call to umulsidi3_600_lib. (umulsidi3_600_lib): Remove pattern. (peephole2): Remove peephole using the above deprecated patterns. testsuite/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * gcc.target/arc/mulsi3_highpart-2.c: Update test. libgcc/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/arc/lib1funcs.S (_muldi3): New function. * config/arc/t-arc (LIB1ASMFUNCS): Add _muldi3. From-SVN: r265672
This commit is contained in:
parent
fad03406eb
commit
8180cde0fb
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@ -1,3 +1,13 @@
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2018-10-31 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/arc.md (mulsi3): Remove call to mulsi_600_lib.
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(mulsi3_600_lib): Remove pattern.
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(umulsi3_highpart_600_lib_le): Likewise.
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(umulsi3_highpart): Remove call to umulsi3_highpart_600_lib_le.
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(umulsidi3): Remove call to umulsidi3_600_lib.
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(umulsidi3_600_lib): Remove pattern.
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(peephole2): Remove peephole using the above deprecated patterns.
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2018-10-31 Thomas Preud'homme <thomas.preudhomme@linaro.org>
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PR target/87374
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@ -2076,44 +2076,21 @@ archs4x, archs4xd, archs4xd_slow"
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;; SI <- SI * SI
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(define_expand "mulsi3"
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[(set (match_operand:SI 0 "nonimmediate_operand" "")
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[(set (match_operand:SI 0 "register_operand" "")
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(mult:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "nonmemory_operand" "")))]
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""
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"TARGET_ANY_MPY"
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{
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if (TARGET_MPY)
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if (TARGET_MUL64_SET)
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{
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if (!register_operand (operands[0], SImode))
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{
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rtx result = gen_reg_rtx (SImode);
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emit_insn (gen_mulsi3 (result, operands[1], operands[2]));
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emit_move_insn (operands[0], result);
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DONE;
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}
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}
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else if (TARGET_MUL64_SET)
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{
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rtx tmp = gen_reg_rtx (SImode);
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emit_insn (gen_mulsi64 (tmp, operands[1], operands[2]));
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emit_move_insn (operands[0], tmp);
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emit_insn (gen_mulsi64 (operands[0], operands[1], operands[2]));
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DONE;
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}
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else if (TARGET_MULMAC_32BY16_SET)
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{
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rtx tmp = gen_reg_rtx (SImode);
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emit_insn (gen_mulsi32x16 (tmp, operands[1], operands[2]));
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emit_move_insn (operands[0], tmp);
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emit_insn (gen_mulsi32x16 (operands[0], operands[1], operands[2]));
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DONE;
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}
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else
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{
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emit_move_insn (gen_rtx_REG (SImode, R0_REG), operands[1]);
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emit_move_insn (gen_rtx_REG (SImode, R1_REG), operands[2]);
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emit_insn (gen_mulsi3_600_lib ());
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emit_move_insn (operands[0], gen_rtx_REG (SImode, R0_REG));
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DONE;
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}
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})
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(define_insn_and_split "mulsi32x16"
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@ -2229,27 +2206,6 @@ archs4x, archs4xd, archs4xd_slow"
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(set_attr "predicable" "yes,yes,no,yes")
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(set_attr "cond" "canuse,canuse,canuse_limm,canuse")])
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; If we compile without an mul option enabled, but link with libraries
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; for a mul option, we'll see clobbers of multiplier output registers.
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; There is also an implementation using norm that clobbers the loop registers.
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(define_insn "mulsi3_600_lib"
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[(set (reg:SI R0_REG)
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(mult:SI (reg:SI R0_REG) (reg:SI R1_REG)))
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(clobber (reg:SI RETURN_ADDR_REGNUM))
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(clobber (reg:SI R1_REG))
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(clobber (reg:SI R2_REG))
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(clobber (reg:SI R3_REG))
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(clobber (reg:DI MUL64_OUT_REG))
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(clobber (reg:SI LP_COUNT))
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(clobber (reg:SI LP_START))
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(clobber (reg:SI LP_END))
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(clobber (reg:CC CC_REG))]
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"!TARGET_ANY_MPY
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&& SFUNC_CHECK_PREDICABLE"
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"*return arc_output_libcall (\"__mulsi3\");"
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[(set_attr "is_sfunc" "yes")
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(set_attr "predicable" "yes")])
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(define_insn_and_split "mulsidi_600"
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[(set (match_operand:DI 0 "register_operand" "=c, c,c, c")
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(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%Rcq#q, c,c, c"))
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@ -2504,48 +2460,6 @@ archs4x, archs4xd, archs4xd_slow"
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(set_attr "predicable" "yes,no,yes,no")
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(set_attr "cond" "canuse,nocond,canuse,nocond")])
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; Implementations include additional labels for umulsidi3, so we got all
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; the same clobbers - plus one for the result low part. */
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(define_insn "umulsi3_highpart_600_lib_le"
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[(set (reg:SI R1_REG)
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(truncate:SI
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(lshiftrt:DI
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(mult:DI (zero_extend:DI (reg:SI R0_REG))
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(zero_extend:DI (reg:SI R1_REG)))
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(const_int 32))))
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(clobber (reg:SI RETURN_ADDR_REGNUM))
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(clobber (reg:SI R0_REG))
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(clobber (reg:DI R2_REG))
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(clobber (reg:SI R12_REG))
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(clobber (reg:DI MUL64_OUT_REG))
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(clobber (reg:CC CC_REG))]
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"!TARGET_BIG_ENDIAN
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&& !TARGET_ANY_MPY
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&& SFUNC_CHECK_PREDICABLE"
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"*return arc_output_libcall (\"__umulsi3_highpart\");"
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[(set_attr "is_sfunc" "yes")
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(set_attr "predicable" "yes")])
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(define_insn "umulsi3_highpart_600_lib_be"
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[(set (reg:SI R0_REG)
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(truncate:SI
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(lshiftrt:DI
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(mult:DI (zero_extend:DI (reg:SI R0_REG))
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(zero_extend:DI (reg:SI R1_REG)))
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(const_int 32))))
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(clobber (reg:SI RETURN_ADDR_REGNUM))
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(clobber (reg:SI R1_REG))
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(clobber (reg:DI R2_REG))
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(clobber (reg:SI R12_REG))
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(clobber (reg:DI MUL64_OUT_REG))
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(clobber (reg:CC CC_REG))]
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"TARGET_BIG_ENDIAN
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&& !TARGET_ANY_MPY
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&& SFUNC_CHECK_PREDICABLE"
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"*return arc_output_libcall (\"__umulsi3_highpart\");"
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[(set_attr "is_sfunc" "yes")
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(set_attr "predicable" "yes")])
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;; (zero_extend:DI (const_int)) leads to internal errors in combine, so we
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;; need a separate pattern for immediates
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;; ??? This is fine for combine, but not for reload.
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@ -2572,23 +2486,11 @@ archs4x, archs4xd, archs4xd_slow"
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(zero_extend:DI (match_operand:SI 1 "register_operand" ""))
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(zero_extend:DI (match_operand:SI 2 "nonmemory_operand" "")))
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(const_int 32))))]
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"!TARGET_MUL64_SET && !TARGET_MULMAC_32BY16_SET"
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"TARGET_MPY"
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"
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{
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rtx target = operands[0];
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if (!TARGET_MPY)
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{
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emit_move_insn (gen_rtx_REG (SImode, 0), operands[1]);
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emit_move_insn (gen_rtx_REG (SImode, 1), operands[2]);
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if (TARGET_BIG_ENDIAN)
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emit_insn (gen_umulsi3_highpart_600_lib_be ());
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else
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emit_insn (gen_umulsi3_highpart_600_lib_le ());
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emit_move_insn (target, gen_rtx_REG (SImode, 0));
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DONE;
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}
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if (!register_operand (target, SImode))
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target = gen_reg_rtx (SImode);
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[(set (match_operand:DI 0 "register_operand" "")
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(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" ""))
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(zero_extend:DI (match_operand:SI 2 "nonmemory_operand" ""))))]
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""
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"TARGET_ANY_MPY"
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{
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if (TARGET_PLUS_MACD)
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{
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DONE;
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}
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else
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{
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emit_move_insn (gen_rtx_REG (SImode, R0_REG), operands[1]);
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emit_move_insn (gen_rtx_REG (SImode, R1_REG), operands[2]);
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emit_insn (gen_umulsidi3_600_lib ());
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emit_move_insn (operands[0], gen_rtx_REG (DImode, R0_REG));
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DONE;
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{
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gcc_unreachable ();
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}
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})
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(zero_extend:DI (match_operand:SI 2 "extend_operand" "cL"))))]
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"TARGET_MPY && !TARGET_PLUS_MACD"
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"#"
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"reload_completed"
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"TARGET_MPY && !TARGET_PLUS_MACD && reload_completed"
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[(const_int 0)]
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{
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int hi = !TARGET_BIG_ENDIAN;
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@ -2743,42 +2641,6 @@ archs4x, archs4xd, archs4xd_slow"
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[(set_attr "type" "umulti")
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(set_attr "length" "8")])
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(define_insn "umulsidi3_600_lib"
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[(set (reg:DI R0_REG)
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(mult:DI (zero_extend:DI (reg:SI R0_REG))
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(zero_extend:DI (reg:SI R1_REG))))
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(clobber (reg:SI RETURN_ADDR_REGNUM))
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(clobber (reg:DI R2_REG))
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(clobber (reg:SI R12_REG))
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(clobber (reg:DI MUL64_OUT_REG))
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(clobber (reg:CC CC_REG))]
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"!TARGET_ANY_MPY
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&& SFUNC_CHECK_PREDICABLE"
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"*return arc_output_libcall (\"__umulsidi3\");"
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[(set_attr "is_sfunc" "yes")
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(set_attr "predicable" "yes")])
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(define_peephole2
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[(parallel
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[(set (reg:DI R0_REG)
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(mult:DI (zero_extend:DI (reg:SI R0_REG))
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(zero_extend:DI (reg:SI R1_REG))))
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(clobber (reg:SI RETURN_ADDR_REGNUM))
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(clobber (reg:DI R2_REG))
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(clobber (reg:SI R12_REG))
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(clobber (reg:DI MUL64_OUT_REG))
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(clobber (reg:CC CC_REG))])]
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"!TARGET_ANY_MPY
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&& peep2_regno_dead_p (1, TARGET_BIG_ENDIAN ? R1_REG : R0_REG)"
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[(pc)]
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{
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if (TARGET_BIG_ENDIAN)
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emit_insn (gen_umulsi3_highpart_600_lib_be ());
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else
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emit_insn (gen_umulsi3_highpart_600_lib_le ());
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DONE;
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})
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(define_expand "addsi3"
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[(set (match_operand:SI 0 "dest_reg_operand" "")
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(plus:SI (match_operand:SI 1 "register_operand" "")
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@ -1,3 +1,7 @@
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2018-10-31 Claudiu Zissulescu <claziss@synopsys.com>
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* gcc.target/arc/mulsi3_highpart-2.c: Update test.
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2018-10-31 Martin Liska <mliska@suse.cz>
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* c-c++-common/ubsan/pr63839.c: Update to new sanitizer message.
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@ -1,7 +1,7 @@
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/* { dg-do run } */
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/* { dg-skip-if "ARC700 always has mpy option on" { arc700 } } */
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/* { dg-skip-if "ARC600 doesn't have mpy instruction" { arc6xx } } */
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/* { dg-options "-O2 -mmpy-option=0 -w" } */
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/* { dg-options "-O2 -mmpy-option=0 -w -save-temps" } */
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#include <stdlib.h>
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@ -28,5 +28,4 @@ main (void)
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}
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/* { dg-final { scan-assembler-not "mpyhu\[ \t\]" } } */
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/* { dg-final { scan-assembler-not "@__muldi3" } } */
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/* { dg-final { scan-assembler "@__umulsi3_highpart" } } */
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/* { dg-final { scan-assembler "@__muldi3" } } */
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@ -1,3 +1,8 @@
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2018-10-31 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/lib1funcs.S (_muldi3): New function.
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* config/arc/t-arc (LIB1ASMFUNCS): Add _muldi3.
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2018-10-30 Rasmus Villemoes <rv@rasmusvillemoes.dk>
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* config/gthr-vxworks.h (__gthread_mutex_destroy): Call semDelete.
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@ -232,6 +232,60 @@ SYM(__umulsi3_highpart):
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#endif
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#endif /* L_umulsidi3 */
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#ifdef L_muldi3
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.section .text
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.align 4
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.global SYM(__muldi3)
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SYM(__muldi3):
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#ifdef __LITTLE_ENDIAN__
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push_s blink
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mov_s r4,r3 ;4
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mov_s r5,r2 ;4
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mov_s r9,r0 ;4
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mov_s r8,r1 ;4
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bl.d @__umulsidi3
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mov_s r1,r2 ;4
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mov_s r6,r0 ;4
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mov_s r7,r1 ;4
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mov_s r0,r9 ;4
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bl.d @__mulsi3
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mov_s r1,r4 ;4
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mov_s r4,r0 ;4
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mov_s r1,r8 ;4
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bl.d @__mulsi3
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mov_s r0,r5 ;4
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pop_s blink
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add_s r0,r0,r4 ;2
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add r1,r0,r7
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j_s.d [blink]
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mov_s r0,r6 ;4
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#else
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push_s blink
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mov_s r5,r3
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mov_s r9,r2
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mov_s r4,r1
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mov_s r8,r0
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mov_s r0,r1
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bl.d @__umulsidi3
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mov_s r1,r3
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mov_s r7,r0
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mov_s r6,r1
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mov_s r0,r4
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bl.d @__mulsi3
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mov_s r1,r9
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mov_s r4,r0
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mov_s r1,r8
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bl.d @__mulsi3
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mov_s r0,r5
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pop_s blink
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add_s r0,r0,r4
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add_s r0,r0,r7
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j_s.d [blink]
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mov_s r1,r6
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#endif /* __LITTLE_ENDIAN__ */
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ENDFUNC(__muldi3)
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#endif /* L_muldi3 */
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#ifdef L_umulsi3_highpart
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#include "ieee-754/arc-ieee-754.h"
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/* For use without a barrel shifter, and for ARC700 / ARC_MUL64, the
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@ -21,7 +21,7 @@
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CROSS_LIBGCC1 = libgcc1-asm.a
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LIB1ASMSRC = arc/lib1funcs.S
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LIB1ASMFUNCS = _mulsi3 _umulsidi3 _umulsi3_highpart \
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LIB1ASMFUNCS = _mulsi3 _umulsidi3 _umulsi3_highpart _muldi3 \
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_udivsi3 _divsi3 _umodsi3 _modsi3 \
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_divmod_tools _clzsi2 \
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_millicodethunk_st _millicodethunk_ld _millicodethunk_ret \
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