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re PR target/86348 (ICE: in curr_insn_transform, at lra-constraints.c:3919: unable to generate reloads for: vec_extractv4si_0_zext_sse4) 

PR target/86348
	* config/i386/sse.md (*vec_extractv4si_0_zext_sse4): Use
	alternative 0 in preferred_for_speed attribute.

testsuite/ChangeLog:

	PR target/86348
	* gcc.target/i386/pr86348.c: New test.

From-SVN: r262228
This commit is contained in:
Uros Bizjak 2018-06-28 21:02:02 +02:00 committed by Uros Bizjak
parent 9cd1665b99
commit 81c8283fb6
4 changed files with 24 additions and 1 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2018-06-28 Uros Bizjak <ubizjak@gmail.com>
PR target/86348
* config/i386/sse.md (*vec_extractv4si_0_zext_sse4): Use
alternative 0 in preferred_for_speed attribute.
2018-06-28 Paul Koning <ni1d@arrl.net>
* config/pdp11/pdp11-protos.h (pdp11_shift_length): New function.

2
gcc/config/i386/sse.md
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@ -13715,7 +13715,7 @@
"#"
[(set_attr "isa" "x64,*,avx512f")
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "1")
(cond [(eq_attr "alternative" "0")
(symbol_ref "TARGET_INTER_UNIT_MOVES_FROM_VEC")
]
(symbol_ref "true")))])

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2018-06-28 Uros Bizjak <ubizjak@gmail.com>
PR target/86348
* gcc.target/i386/pr86348.c: New test.
2018-06-28 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/f16_mov_immediate_3.c: Fix testcase.

12
gcc/testsuite/gcc.target/i386/pr86348.c Normal file
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/* { dg-do compile { target { ia32 } } } */
/* { dg-options "-O -mtune=athlon -msse4" } */
int i;
unsigned __attribute__ ((__vector_size__ (16))) v;
void
foo (void)
{
v *= i;
i = i > -(long long) v[0];
}