arm.md (enum unspec): Delete UNSPEC_SIN and UNSPEC_COS.
* arm.md (enum unspec): Delete UNSPEC_SIN and UNSPEC_COS. (attr type): Remove fmul, ffmul, farith, ffarith, float_em f_fpa_load, f_fpa_store, f_mem_r, r_mem_f. (attr write_conflict, attr core_cycles): Update. * arm-generic.md (r_mem_f_wbuf): Delete reservation. From-SVN: r188778
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@ -1,3 +1,11 @@
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2012-06-19 Richard Earnshaw <rearnsha@arm.com>
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* arm.md (enum unspec): Delete UNSPEC_SIN and UNSPEC_COS.
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(attr type): Remove fmul, ffmul, farith, ffarith, float_em
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f_fpa_load, f_fpa_store, f_mem_r, r_mem_f.
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(attr write_conflict, attr core_cycles): Update.
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* arm-generic.md (r_mem_f_wbuf): Delete reservation.
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2012-06-19 Richard Guenther <rguenther@suse.de>
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* tree-vrp.c (intersect_ranges): Handle more cases.
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@ -38,20 +38,12 @@
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;
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; The write_blockage unit models (partially), the fact that reads will stall
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; until the write buffer empties.
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; The f_mem_r and r_mem_f could also block, but they are to the stack,
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; so we don't model them here
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(define_cpu_unit "write_blockage" "arm")
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;; Core
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;
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(define_cpu_unit "core" "arm")
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(define_insn_reservation "r_mem_f_wbuf" 5
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(and (eq_attr "generic_sched" "yes")
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(and (eq_attr "model_wbuf" "yes")
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(eq_attr "type" "r_mem_f")))
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"core+write_buf*3")
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(define_insn_reservation "store_wbuf" 5
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(and (eq_attr "generic_sched" "yes")
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(and (eq_attr "model_wbuf" "yes")
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@ -65,12 +65,6 @@
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;; Unspec enumerators for iwmmxt2 are defined in iwmmxt2.md
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(define_c_enum "unspec" [
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UNSPEC_SIN ; `sin' operation (MODE_FLOAT):
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; operand 0 is the result,
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; operand 1 the parameter.
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UNPSEC_COS ; `cos' operation (MODE_FLOAT):
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; operand 0 is the result,
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; operand 1 the parameter.
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UNSPEC_PUSH_MULT ; `push multiple' operation:
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; operand 0 is the first register,
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; subsequent registers are in parallel (use ...)
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@ -321,21 +315,11 @@
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; float a floating point arithmetic operation (subject to expansion)
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; fdivd DFmode floating point division
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; fdivs SFmode floating point division
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; fmul Floating point multiply
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; ffmul Fast floating point multiply
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; farith Floating point arithmetic (4 cycle)
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; ffarith Fast floating point arithmetic (2 cycle)
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; float_em a floating point arithmetic operation that is normally emulated
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; even on a machine with an fpa.
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; f_fpa_load a floating point load from memory. Only for the FPA.
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; f_fpa_store a floating point store to memory. Only for the FPA.
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; f_load[sd] A single/double load from memory. Used for VFP unit.
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; f_store[sd] A single/double store to memory. Used for VFP unit.
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; f_flag a transfer of co-processor flags to the CPSR
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; f_mem_r a transfer of a floating point register to a real reg via mem
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; r_mem_f the reverse of f_mem_r
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; f_2_r fast transfer float to arm (no memory needed)
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; r_2_f fast transfer arm to float
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; f_2_r transfer float to core (no memory needed)
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; r_2_f transfer core to float
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; f_cvt convert floating<->integral
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; branch a branch
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; call a subroutine call
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@ -351,18 +335,59 @@
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;
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(define_attr "type"
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"alu,alu_shift,alu_shift_reg,mult,block,float,fdivx,fdivd,fdivs,fmul,fmuls,fmuld,fmacs,fmacd,ffmul,farith,ffarith,f_flag,float_em,f_fpa_load,f_fpa_store,f_loads,f_loadd,f_stores,f_stored,f_mem_r,r_mem_f,f_2_r,r_2_f,f_cvt,branch,call,load_byte,load1,load2,load3,load4,store1,store2,store3,store4,fconsts,fconstd,fadds,faddd,ffariths,ffarithd,fcmps,fcmpd,fcpys"
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(if_then_else
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(eq_attr "insn" "smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals")
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(const_string "mult")
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(const_string "alu")))
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"alu,\
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alu_shift,\
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alu_shift_reg,\
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mult,\
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block,\
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float,\
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fdivd,\
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fdivs,\
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fmuls,\
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fmuld,\
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fmacs,\
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fmacd,\
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f_flag,\
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f_loads,\
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f_loadd,\
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f_stores,\
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f_stored,\
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f_2_r,\
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r_2_f,\
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f_cvt,\
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branch,\
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call,\
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load_byte,\
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load1,\
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load2,\
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load3,\
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load4,\
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store1,\
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store2,\
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store3,\
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store4,\
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fconsts,\
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fconstd,\
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fadds,\
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faddd,\
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ffariths,\
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ffarithd,\
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fcmps,\
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fcmpd,\
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fcpys"
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(if_then_else
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(eq_attr "insn" "smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,\
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umull,umulls,umlal,umlals,smull,smulls,smlal,smlals")
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(const_string "mult")
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(const_string "alu")))
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; Is this an (integer side) multiply with a 64-bit result?
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(define_attr "mul64" "no,yes"
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(if_then_else
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(eq_attr "insn" "smlalxy,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals")
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(const_string "yes")
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(const_string "no")))
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(if_then_else
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(eq_attr "insn"
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"smlalxy,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals")
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(const_string "yes")
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(const_string "no")))
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; wtype for WMMX insn scheduling purposes.
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(define_attr "wtype"
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; to stall the processor. Used with model_wbuf above.
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(define_attr "write_conflict" "no,yes"
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(if_then_else (eq_attr "type"
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"block,float_em,f_fpa_load,f_fpa_store,f_mem_r,r_mem_f,call,load1")
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"block,call,load1")
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(const_string "yes")
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(const_string "no")))
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; than one on the main cpu execution unit.
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(define_attr "core_cycles" "single,multi"
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(if_then_else (eq_attr "type"
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"alu,alu_shift,float,fdivx,fdivd,fdivs,fmul,ffmul,farith,ffarith")
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"alu,alu_shift,float,fdivd,fdivs")
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(const_string "single")
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(const_string "multi")))
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