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re PR target/24772 (Lots of ICEs in vrsave_operation_1 while running the testsuite on powerpc)

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PR target/24772
        * config/rs6000/predicates.md (vrsave_operation): SET_SRC is a VEC.

        * config/rs6000/rs6000.md (btruncsf2, ceilsf2, floorsf2,
        roundsf2): Remove "s" from mnemonic.

From-SVN: r107085
This commit is contained in:
David Edelsohn 2005-11-16 15:59:27 +00:00 committed by David Edelsohn
parent 0d88914b25
commit 833126adaf
3 changed files with 15 additions and 8 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2005-11-16 David Edelsohn <edelsohn@gnu.org>
PR target/24772
* config/rs6000/predicates.md (vrsave_operation): SET_SRC is a VEC.
* config/rs6000/rs6000.md (btruncsf2, ceilsf2, floorsf2,
roundsf2): Remove "s" from mnemonic.
2005-11-16 Bernd Schmidt <bernd.schmidt@analog.com>
* config/bfin/crti.s (__init, __fini): Use appropriate prologue if

5
gcc/config/rs6000/predicates.md
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@ -1038,10 +1038,9 @@
return 0;
dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
src_regno = REGNO (XVECEXP (SET_SRC (XVECEXP (op, 0, 0)), 0, 1));
if (dest_regno != VRSAVE_REGNO
&& src_regno != VRSAVE_REGNO)
if (dest_regno != VRSAVE_REGNO || src_regno != VRSAVE_REGNO)
return 0;
for (i = 1; i < count; i++)

10
gcc/config/rs6000/rs6000.md
View File

@ -5332,7 +5332,7 @@
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIZ))]
"TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS"
"frizs %0,%1"
"friz %0,%1"
[(set_attr "type" "fp")])
(define_insn "ceildf2"
@ -5343,10 +5343,10 @@
[(set_attr "type" "fp")])
(define_insn "ceilsf2"
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIP))]
"TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS"
"frips %0,%1"
"frip %0,%1"
[(set_attr "type" "fp")])
(define_insn "floordf2"
@ -5360,7 +5360,7 @@
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIM))]
"TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS"
"frims %0,%1"
"frim %0,%1"
[(set_attr "type" "fp")])
(define_insn "rounddf2"
@ -5374,7 +5374,7 @@
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIN))]
"TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS"
"frins %0,%1"
"frin %0,%1"
[(set_attr "type" "fp")])
; An UNSPEC is used so we don't have to support SImode in FP registers.