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Properly set the latency of atomic ops to the approximate latency of a remote memory operation. 

Properly set the latency of atomic ops to the approximate latency of a
remote memory operation.
	Backport from mainline
	2012-08-27  Walter Lee  <walt@tilera.com>

	* config/tilegx/sync.md (atomic_compare_and_swap_bare<mode>,
	atomic_exchange_bare<mode>,
	atomic_fetch_<fetchop_name>_bare<mode>): Set type to X1_remote.
	* config/tilegx/tilegx-generic.md (X1_remote): New
	insn_reservation.
	* config/tilegx/tilegx.md (type): Add X1_remove.
	(insn_cmpexch<four_if_si>, insn_exch<four_if_si>,
	insn_fetchadd<four_if_si>, insn_fetchaddgez<four_if_si>,
	insn_fetchand<four_if_si>, insn_fetchor<four_if_si>): Set type to
	X1_remote.

From-SVN: r190723
This commit is contained in:
Walter Lee 2012-08-27 17:39:19 +00:00 committed by Walter Lee
parent a544c05de0
commit 833569721a
4 changed files with 30 additions and 10 deletions
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16
gcc/ChangeLog
View File

@ -1,3 +1,19 @@
2012-08-27 Walter Lee <walt@tilera.com>
Backport from mainline
2012-08-27 Walter Lee <walt@tilera.com>
* config/tilegx/sync.md (atomic_compare_and_swap_bare<mode>,
atomic_exchange_bare<mode>,
atomic_fetch_<fetchop_name>_bare<mode>): Set type to X1_remote.
* config/tilegx/tilegx-generic.md (X1_remote): New
insn_reservation.
* config/tilegx/tilegx.md (type): Add X1_remove.
(insn_cmpexch<four_if_si>, insn_exch<four_if_si>,
insn_fetchadd<four_if_si>, insn_fetchaddgez<four_if_si>,
insn_fetchand<four_if_si>, insn_fetchor<four_if_si>): Set type to
X1_remote.
2012-08-25 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/54088

6
gcc/config/tilegx/sync.md
View File

@ -72,7 +72,7 @@
UNSPEC_CMPXCHG))]
""
"cmpexch<four_if_si>\t%0, %1, %r2"
[(set_attr "type" "X1_L2")])
[(set_attr "type" "X1_remote")])
(define_expand "atomic_exchange<mode>"
@ -101,7 +101,7 @@
UNSPEC_XCHG))]
""
"exch<four_if_si>\t%0, %1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_expand "atomic_fetch_<fetchop_name><mode>"
@ -137,7 +137,7 @@
UNSPEC_ATOMIC))]
""
"fetch<fetchop_name><four_if_si>\t%0, %1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_expand "atomic_fetch_sub<mode>"

4
gcc/config/tilegx/tilegx-generic.md
View File

@ -51,6 +51,10 @@
(eq_attr "type" "X1_L2")
"X1")
(define_insn_reservation "X1_remote" 50
(eq_attr "type" "X1_remote")
"X1")
(define_insn_reservation "X1_miss" 80
(eq_attr "type" "X1_miss")
"X1")

14
gcc/config/tilegx/tilegx.md
View File

@ -250,7 +250,7 @@
;; Define an insn type attribute. This defines what pipes things can go in.
(define_attr "type"
"X0,X0_2cycle,X1,X1_branch,X1_2cycle,X1_L2,X1_miss,X01,Y0,Y0_2cycle,Y1,Y2,Y2_2cycle,Y2_L2,Y2_miss,Y01,cannot_bundle,cannot_bundle_3cycle,cannot_bundle_4cycle,nothing"
"X0,X0_2cycle,X1,X1_branch,X1_2cycle,X1_L2,X1_remote,X1_miss,X01,Y0,Y0_2cycle,Y1,Y2,Y2_2cycle,Y2_L2,Y2_miss,Y01,cannot_bundle,cannot_bundle_3cycle,cannot_bundle_4cycle,nothing"
(const_string "Y01"))
(define_attr "length" ""
@ -2679,7 +2679,7 @@
UNSPEC_INSN_CMPEXCH))]
""
"cmpexch<four_if_si>\t%0, %r1, %r2"
[(set_attr "type" "X1_L2")])
[(set_attr "type" "X1_remote")])
(define_insn "insn_cmul"
[(set (match_operand:DI 0 "register_operand" "=r")
@ -2817,7 +2817,7 @@
UNSPEC_INSN_EXCH))]
""
"exch<four_if_si>\t%0, %r1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_insn "insn_fdouble_add_flags"
[(set (match_operand:DI 0 "register_operand" "=r")
@ -2903,7 +2903,7 @@
(match_operand:I48MODE 2 "reg_or_0_operand" "rO")))]
""
"fetchadd<four_if_si>\t%0, %r1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_insn "insn_fetchaddgez<four_if_si>"
[(set (match_operand:I48MODE 0 "register_operand" "=r")
@ -2916,7 +2916,7 @@
UNSPEC_INSN_FETCHADDGEZ))]
""
"fetchaddgez<four_if_si>\t%0, %r1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_insn "insn_fetchand<four_if_si>"
[(set (match_operand:I48MODE 0 "register_operand" "=r")
@ -2928,7 +2928,7 @@
(match_operand:I48MODE 2 "reg_or_0_operand" "rO")))]
""
"fetchand<four_if_si>\t%0, %r1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_insn "insn_fetchor<four_if_si>"
[(set (match_operand:I48MODE 0 "register_operand" "=r")
@ -2940,7 +2940,7 @@
(match_operand:I48MODE 2 "reg_or_0_operand" "rO")))]
""
"fetchor<four_if_si>\t%0, %r1, %r2"
[(set_attr "type" "X1_2cycle")])
[(set_attr "type" "X1_remote")])
(define_insn "insn_finv"
[(unspec_volatile:VOID [(match_operand 0 "pointer_operand" "rO")]