PR target/35013, 27192
2009-12-24 Andy Hutchinson <hutchinsonandy@gcc.gnu.org> PR target/35013, 27192 * config/avr/avr.c (print_operand_address): Print correct program memory address. Add warning for large device offset addresses. (avr_assemble_integer): Ditto. (print_operand): Add warnings for incorrect addressing. (out_movqi_r_mr): Tag assembler with new address codes. (out_movhi_r_mr): Ditto. (out_movsi_r_mr): Ditto. (out_movqi_mr_r): Ditto. (out_movhi_mr_r): Ditto. (out_movsi_mr_r): Ditto. * config/avr/predicates.md (text_segment_operand): New predicate. * config/avr/avr.md (jump): Tag assembler with new address codes. (call_insn): Ditto. (call_value_insn): Ditto. (*tablejump_lib): Ditto. (*cbi): Ditto. (*sbi): Ditto. (indirect_jump): New define_expand. (jcindirect_jump): New pattern for constant expression jump. (njcindirect_jump): Renamed old indirect_jump. From-SVN: r155459
This commit is contained in:
Andy Hutchinson
parent
a1b418cb9f
commit
846428f11f
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@ -1,3 +1,28 @@
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2009-12-24 Andy Hutchinson <hutchinsonandy@gcc.gnu.org>
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PR target/35013, 27192
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* config/avr/avr.c (print_operand_address): Print correct program
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memory address.
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Add warning for large device offset addresses.
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(avr_assemble_integer): Ditto.
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(print_operand): Add warnings for incorrect addressing.
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(out_movqi_r_mr): Tag assembler with new address codes.
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(out_movhi_r_mr): Ditto.
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(out_movsi_r_mr): Ditto.
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(out_movqi_mr_r): Ditto.
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(out_movhi_mr_r): Ditto.
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(out_movsi_mr_r): Ditto.
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* config/avr/predicates.md (text_segment_operand): New predicate.
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* config/avr/avr.md (jump): Tag assembler with new address codes.
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(call_insn): Ditto.
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(call_value_insn): Ditto.
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(*tablejump_lib): Ditto.
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(*cbi): Ditto.
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(*sbi): Ditto.
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(indirect_jump): New define_expand.
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(jcindirect_jump): New pattern for constant expression jump.
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(njcindirect_jump): Renamed old indirect_jump.
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2009-12-24 Steven Bosscher <steven@gcc.gnu.org>
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* store-motion.c (build_store_vectors): Clear regs_set_in_block at
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@ -1176,12 +1176,33 @@ print_operand_address (FILE *file, rtx addr)
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default:
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if (CONSTANT_ADDRESS_P (addr)
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&& ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
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|| GET_CODE (addr) == LABEL_REF))
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&& text_segment_operand (addr, VOIDmode))
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{
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fprintf (file, "gs(");
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output_addr_const (file,addr);
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fprintf (file ,")");
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rtx x = XEXP (addr,0);
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if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x,1)) == CONST_INT)
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{
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/* Assembler gs() will implant word address. Make offset
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a byte offset inside gs() for assembler. This is
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needed because the more logical (constant+gs(sym)) is not
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accepted by gas. For 128K and lower devices this is ok. For
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large devices it will create a Trampoline to offset from symbol
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which may not be what the user really wanted. */
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fprintf (file, "gs(");
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output_addr_const (file, XEXP (x,0));
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fprintf (file,"+" HOST_WIDE_INT_PRINT_DEC ")", 2 * INTVAL (XEXP (x,1)));
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if (AVR_3_BYTE_PC)
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if (warning ( 0, "Pointer offset from symbol maybe incorrect."))
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{
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output_addr_const (stderr, addr);
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fprintf(stderr,"\n");
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}
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}
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else
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{
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fprintf (file, "gs(");
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output_addr_const (file, addr);
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fprintf (file, ")");
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}
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}
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else
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output_addr_const (file, addr);
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@ -1221,12 +1242,18 @@ print_operand (FILE *file, rtx x, int code)
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else if (GET_CODE (x) == MEM)
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{
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rtx addr = XEXP (x,0);
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if (CONSTANT_P (addr) && abcd)
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if (code == 'm')
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{
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fputc ('(', file);
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output_address (addr);
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fprintf (file, ")+%d", abcd);
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if (!CONSTANT_P (addr))
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fatal_insn ("bad address, not a constant):", addr);
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/* Assembler template with m-code is data - not progmem section */
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if (text_segment_operand (addr, VOIDmode))
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if (warning ( 0, "accessing data memory with program memory address"))
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{
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output_addr_const (stderr, addr);
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fprintf(stderr,"\n");
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}
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output_addr_const (file, addr);
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}
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else if (code == 'o')
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{
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@ -1257,6 +1284,18 @@ print_operand (FILE *file, rtx x, int code)
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else
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print_operand_address (file, addr);
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}
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else if (code == 'x')
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{
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/* Constant progmem address - like used in jmp or call */
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if (0 == text_segment_operand (x, VOIDmode))
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if (warning ( 0, "accessing program memory with data memory address"))
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{
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output_addr_const (stderr, x);
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fprintf(stderr,"\n");
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}
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/* Use normal symbol for direct address no linker trampoline needed */
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output_addr_const (file, x);
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}
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else if (GET_CODE (x) == CONST_DOUBLE)
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{
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long val;
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@ -1874,10 +1913,10 @@ out_movqi_r_mr (rtx insn, rtx op[], int *l)
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if (optimize > 0 && io_address_operand (x, QImode))
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{
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*l = 1;
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return AS2 (in,%0,%1-0x20);
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return AS2 (in,%0,%m1-0x20);
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}
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*l = 2;
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return AS2 (lds,%0,%1);
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return AS2 (lds,%0,%m1);
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}
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/* memory access by reg+disp */
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else if (GET_CODE (x) == PLUS
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@ -2062,12 +2101,12 @@ out_movhi_r_mr (rtx insn, rtx op[], int *l)
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if (optimize > 0 && io_address_operand (base, HImode))
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{
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*l = 2;
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return (AS2 (in,%A0,%A1-0x20) CR_TAB
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AS2 (in,%B0,%B1-0x20));
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return (AS2 (in,%A0,%m1-0x20) CR_TAB
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AS2 (in,%B0,%m1+1-0x20));
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}
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*l = 4;
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return (AS2 (lds,%A0,%A1) CR_TAB
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AS2 (lds,%B0,%B1));
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return (AS2 (lds,%A0,%m1) CR_TAB
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AS2 (lds,%B0,%m1+1));
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}
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fatal_insn ("unknown move insn:",insn);
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@ -2226,10 +2265,10 @@ out_movsi_r_mr (rtx insn, rtx op[], int *l)
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AS2 (ld,%C0,%1) CR_TAB
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AS2 (ld,%D0,%1));
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else if (CONSTANT_ADDRESS_P (base))
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return *l=8, (AS2 (lds,%A0,%A1) CR_TAB
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AS2 (lds,%B0,%B1) CR_TAB
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AS2 (lds,%C0,%C1) CR_TAB
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AS2 (lds,%D0,%D1));
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return *l=8, (AS2 (lds,%A0,%m1) CR_TAB
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AS2 (lds,%B0,%m1+1) CR_TAB
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AS2 (lds,%C0,%m1+2) CR_TAB
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AS2 (lds,%D0,%m1+3));
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fatal_insn ("unknown move insn:",insn);
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return "";
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@ -2249,10 +2288,10 @@ out_movsi_mr_r (rtx insn, rtx op[], int *l)
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l = &tmp;
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if (CONSTANT_ADDRESS_P (base))
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return *l=8,(AS2 (sts,%A0,%A1) CR_TAB
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AS2 (sts,%B0,%B1) CR_TAB
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AS2 (sts,%C0,%C1) CR_TAB
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AS2 (sts,%D0,%D1));
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return *l=8,(AS2 (sts,%m0,%A1) CR_TAB
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AS2 (sts,%m0+1,%B1) CR_TAB
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AS2 (sts,%m0+2,%C1) CR_TAB
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AS2 (sts,%m0+3,%D1));
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if (reg_base > 0) /* (r) */
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{
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if (reg_base == REG_X) /* (R26) */
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@ -2562,10 +2601,10 @@ out_movqi_mr_r (rtx insn, rtx op[], int *l)
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if (optimize > 0 && io_address_operand (x, QImode))
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{
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*l = 1;
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return AS2 (out,%0-0x20,%1);
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return AS2 (out,%m0-0x20,%1);
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}
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*l = 2;
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return AS2 (sts,%0,%1);
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return AS2 (sts,%m0,%1);
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}
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/* memory access by reg+disp */
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else if (GET_CODE (x) == PLUS
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@ -2641,11 +2680,11 @@ out_movhi_mr_r (rtx insn, rtx op[], int *l)
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if (optimize > 0 && io_address_operand (base, HImode))
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{
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*l = 2;
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return (AS2 (out,%B0-0x20,%B1) CR_TAB
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AS2 (out,%A0-0x20,%A1));
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return (AS2 (out,%m0+1-0x20,%B1) CR_TAB
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AS2 (out,%m0-0x20,%A1));
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}
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return *l = 4, (AS2 (sts,%B0,%B1) CR_TAB
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AS2 (sts,%A0,%A1));
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return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
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AS2 (sts,%m0,%A1));
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}
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if (reg_base > 0)
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{
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@ -4502,8 +4541,7 @@ static bool
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avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
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{
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if (size == POINTER_SIZE / BITS_PER_UNIT && aligned_p
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&& ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
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|| GET_CODE (x) == LABEL_REF))
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&& text_segment_operand (x, VOIDmode) )
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{
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fputs ("\t.word\tgs(", asm_out_file);
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output_addr_const (asm_out_file, x);
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@ -5944,13 +5982,13 @@ avr_out_sbxx_branch (rtx insn, rtx operands[])
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if (INTVAL (operands[1]) < 0x40)
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{
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if (comp == EQ)
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output_asm_insn (AS2 (sbis,%1-0x20,%2), operands);
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output_asm_insn (AS2 (sbis,%m1-0x20,%2), operands);
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else
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output_asm_insn (AS2 (sbic,%1-0x20,%2), operands);
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output_asm_insn (AS2 (sbic,%m1-0x20,%2), operands);
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}
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else
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{
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output_asm_insn (AS2 (in,__tmp_reg__,%1-0x20), operands);
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output_asm_insn (AS2 (in,__tmp_reg__,%m1-0x20), operands);
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if (comp == EQ)
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output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
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else
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@ -5979,9 +6017,9 @@ avr_out_sbxx_branch (rtx insn, rtx operands[])
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if (long_jump)
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return (AS1 (rjmp,.+4) CR_TAB
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AS1 (jmp,%3));
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AS1 (jmp,%x3));
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if (!reverse)
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return AS1 (rjmp,%3);
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return AS1 (rjmp,%x3);
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return "";
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}
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@ -28,9 +28,11 @@
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;; D Add 3.
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;; j Branch condition.
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;; k Reverse branch condition.
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;;..m..Constant Direct Data memory address.
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;; o Displacement for (mem (plus (reg) (const_int))) operands.
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;; p POST_INC or PRE_DEC address as a pointer (X, Y, Z)
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;; r POST_INC or PRE_DEC address as a register (r26, r28, r30)
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;;..x..Constant Direct Program memory address.
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;; ~ Output 'r' if not AVR_HAVE_JMP_CALL.
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;; ! Output 'e' if AVR_HAVE_EIJMP_EICALL.
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@ -2732,8 +2734,8 @@
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""
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"*{
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if (AVR_HAVE_JMP_CALL && get_attr_length (insn) != 1)
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return AS1 (jmp,%0);
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return AS1 (rjmp,%0);
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return AS1 (jmp,%x0);
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return AS1 (rjmp,%x0);
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}"
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[(set (attr "length")
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(if_then_else (match_operand 0 "symbol_ref_operand" "")
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@ -2785,7 +2787,7 @@
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\"%!icall\");
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}
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else if (which_alternative==2)
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return AS1(%~call,%c0);
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return AS1(%~call,%x0);
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return (AS2 (ldi,r30,lo8(%0)) CR_TAB
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AS2 (ldi,r31,hi8(%0)) CR_TAB
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\"%!icall\");
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@ -2822,7 +2824,7 @@
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\"%!icall\");
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}
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else if (which_alternative==2)
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return AS1(%~call,%c1);
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return AS1(%~call,%x1);
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return (AS2 (ldi, r30, lo8(%1)) CR_TAB
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AS2 (ldi, r31, hi8(%1)) CR_TAB
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\"%!icall\");
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@ -2846,7 +2848,27 @@
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(set_attr "length" "1")])
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; indirect jump
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(define_insn "indirect_jump"
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(define_expand "indirect_jump"
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[(set (pc) (match_operand:HI 0 "nonmemory_operand" ""))]
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""
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" if ((!AVR_HAVE_JMP_CALL) && !register_operand(operand0, HImode))
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{
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operands[0] = copy_to_mode_reg(HImode, operand0);
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}"
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)
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; indirect jump
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(define_insn "*jcindirect_jump"
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[(set (pc) (match_operand:HI 0 "immediate_operand" "i"))]
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""
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"@
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%~jmp %x0"
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[(set_attr "length" "2")
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(set_attr "cc" "none")])
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;;
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(define_insn "*njcindirect_jump"
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[(set (pc) (match_operand:HI 0 "register_operand" "!z,*r"))]
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"!AVR_HAVE_EIJMP_EICALL"
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"@
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@ -2884,7 +2906,7 @@
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(use (label_ref (match_operand 1 "" "")))
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(clobber (match_dup 0))]
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"AVR_HAVE_JMP_CALL && TARGET_CALL_PROLOGUES"
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"jmp __tablejump2__"
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"%~jmp __tablejump2__"
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[(set_attr "length" "2")
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(set_attr "cc" "clobber")])
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@ -2967,7 +2989,7 @@
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"(optimize > 0)"
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{
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operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
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return AS2 (cbi,%0-0x20,%2);
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return AS2 (cbi,%m0-0x20,%2);
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}
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[(set_attr "length" "1")
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(set_attr "cc" "none")])
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@ -2979,7 +3001,7 @@
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"(optimize > 0)"
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{
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operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
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return AS2 (sbi,%0-0x20,%2);
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return AS2 (sbi,%m0-0x20,%2);
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}
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[(set_attr "length" "1")
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(set_attr "cc" "none")])
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@ -71,6 +71,29 @@
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(define_predicate "symbol_ref_operand"
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(match_code "symbol_ref"))
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;; Return true if OP is a text segment reference.
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;; This is needed for program memory address expressions.
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(define_predicate "text_segment_operand"
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(match_code "code_label,label_ref,symbol_ref,plus,const")
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{
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switch (GET_CODE (op))
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{
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case CODE_LABEL:
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return true;
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case LABEL_REF :
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return true;
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case SYMBOL_REF :
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return SYMBOL_REF_FUNCTION_P (op);
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case PLUS :
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/* Assume canonical format of symbol + constant.
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Fall through. */
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case CONST :
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return text_segment_operand (XEXP (op, 0), VOIDmode);
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default :
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return false;
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}
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})
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;; Return true if OP is a constant that contains only one 1 in its
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;; binary representation.
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(define_predicate "single_one_operand"
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