re PR target/24036 ([e500] ICE in subreg_offset_representable_p, at rtlanal.c:3143)
2006-12-01 Joseph Myers <joseph@codesourcery.com> David Edelsohn <edelsohn@gnu.org> PR target/24036 * doc/tm.texi (HARD_REGNO_NREGS_HAS_PADDING, HARD_REGNO_NREGS_WITH_PADDING): Document new target macros. * defaults.h (HARD_REGNO_NREGS_HAS_PADDING, HARD_REGNO_NREGS_WITH_PADDING): Define. * config/i386/i386.h (HARD_REGNO_NREGS_HAS_PADDING, HARD_REGNO_NREGS_WITH_PADDING): Define. * rtlanal.c (subreg_regno_offset, subreg_offset_representable_p): Use new macros to detect modes with holes; do not look at integer units. (subreg_offset_representable_p): Check for and disallow cases where the modes use different numbers of bits from registers. * config/rs6000/rs6000.c (rs6000_emit_move): Handle TFmode constant for soft-float. (rs6000_hard_regno_nregs): Use UNITS_PER_FP_WORD for e500 GPRs containing doubles. (rs6000_split_multireg_move): Use DFmode reg_mode for TFmode moves in E500 double case. * config/rs6000/rs6000.md (movtf): Allow soft-float. (movtf_softfloat): New. Co-Authored-By: David Edelsohn <edelsohn@gnu.org> From-SVN: r119395
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@ -1,3 +1,27 @@
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2006-12-01 Joseph Myers <joseph@codesourcery.com>
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David Edelsohn <edelsohn@gnu.org>
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PR target/24036
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* doc/tm.texi (HARD_REGNO_NREGS_HAS_PADDING,
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HARD_REGNO_NREGS_WITH_PADDING): Document new target macros.
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* defaults.h (HARD_REGNO_NREGS_HAS_PADDING,
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HARD_REGNO_NREGS_WITH_PADDING): Define.
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* config/i386/i386.h (HARD_REGNO_NREGS_HAS_PADDING,
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HARD_REGNO_NREGS_WITH_PADDING): Define.
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* rtlanal.c (subreg_regno_offset, subreg_offset_representable_p):
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Use new macros to detect modes with holes; do not look at integer
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units.
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(subreg_offset_representable_p): Check for and disallow cases
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where the modes use different numbers of bits from registers.
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* config/rs6000/rs6000.c (rs6000_emit_move): Handle TFmode
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constant for soft-float.
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(rs6000_hard_regno_nregs): Use UNITS_PER_FP_WORD for e500 GPRs
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containing doubles.
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(rs6000_split_multireg_move): Use DFmode reg_mode for TFmode moves
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in E500 double case.
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* config/rs6000/rs6000.md (movtf): Allow soft-float.
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(movtf_softfloat): New.
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2006-11-30 Richard Sandiford <richard@codesourcery.com>
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* simplify-rtx.c (simplify_rtx): Use simplify_subreg rather than
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@ -917,6 +917,15 @@ do { \
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? (TARGET_64BIT ? 4 : 6) \
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: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
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#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \
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((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \
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? (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \
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? 0 \
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: ((MODE) == XFmode || (MODE) == XCmode)) \
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: 0)
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#define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) ((MODE) == XFmode ? 4 : 8)
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#define VALID_SSE2_REG_MODE(MODE) \
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((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \
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|| (MODE) == V2DImode || (MODE) == DFmode)
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@ -3822,9 +3822,6 @@ rs6000_hard_regno_nregs (int regno, enum machine_mode mode)
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if (FP_REGNO_P (regno))
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return (GET_MODE_SIZE (mode) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD;
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if (TARGET_E500_DOUBLE && mode == DFmode)
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return 1;
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if (SPE_SIMD_REGNO_P (regno) && TARGET_SPE && SPE_VECTOR_MODE (mode))
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return (GET_MODE_SIZE (mode) + UNITS_PER_SPE_WORD - 1) / UNITS_PER_SPE_WORD;
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@ -3832,6 +3829,14 @@ rs6000_hard_regno_nregs (int regno, enum machine_mode mode)
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return
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(GET_MODE_SIZE (mode) + UNITS_PER_ALTIVEC_WORD - 1) / UNITS_PER_ALTIVEC_WORD;
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/* The value returned for SCmode in the E500 double case is 2 for
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ABI compatibility; storing an SCmode value in a single register
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would require function_arg and rs6000_spe_function_arg to handle
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SCmode so as to pass the value correctly in a pair of
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registers. */
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if (TARGET_E500_DOUBLE && FLOAT_MODE_P (mode) && mode != SCmode)
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return (GET_MODE_SIZE (mode) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD;
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return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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}
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@ -4200,8 +4205,7 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
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/* 128-bit constant floating-point values on Darwin should really be
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loaded as two parts. */
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if (!TARGET_IEEEQUAD
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&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128
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if (!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
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&& mode == TFmode && GET_CODE (operands[1]) == CONST_DOUBLE)
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{
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/* DImode is used, not DFmode, because simplify_gen_subreg doesn't
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@ -12744,6 +12748,8 @@ rs6000_split_multireg_move (rtx dst, rtx src)
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reg_mode = DFmode;
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else if (ALTIVEC_REGNO_P (reg))
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reg_mode = V16QImode;
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else if (TARGET_E500_DOUBLE && mode == TFmode)
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reg_mode = DFmode;
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else
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reg_mode = word_mode;
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reg_mode_size = GET_MODE_SIZE (reg_mode);
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@ -8518,8 +8518,7 @@
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(define_expand "movtf"
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[(set (match_operand:TF 0 "general_operand" "")
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(match_operand:TF 1 "any_operand" ""))]
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"!TARGET_IEEEQUAD
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&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
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"!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128"
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"{ rs6000_emit_move (operands[0], operands[1], TFmode); DONE; }")
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; It's important to list the o->f and f->o moves before f->f because
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@ -8538,6 +8537,19 @@
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{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }
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[(set_attr "length" "8,8,8,20,20,16")])
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(define_insn_and_split "*movtf_softfloat"
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[(set (match_operand:TF 0 "nonimmediate_operand" "=r,Y,r")
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(match_operand:TF 1 "input_operand" "YGHF,r,r"))]
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"!TARGET_IEEEQUAD
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&& (TARGET_SOFT_FLOAT || !TARGET_FPRS) && TARGET_LONG_DOUBLE_128
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&& (gpc_reg_operand (operands[0], TFmode)
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|| gpc_reg_operand (operands[1], TFmode))"
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"#"
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"&& reload_completed"
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[(pc)]
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{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }
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[(set_attr "length" "20,20,16")])
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(define_expand "extenddftf2"
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[(parallel [(set (match_operand:TF 0 "nonimmediate_operand" "")
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(float_extend:TF (match_operand:DF 1 "input_operand" "")))
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@ -895,4 +895,9 @@ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
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#define INCOMING_FRAME_SP_OFFSET 0
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#endif
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#ifndef HARD_REGNO_NREGS_HAS_PADDING
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#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) 0
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#define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) -1
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#endif
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#endif /* ! GCC_DEFAULTS_H */
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@ -1978,6 +1978,33 @@ definition of this macro is
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@end smallexample
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@end defmac
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@defmac HARD_REGNO_NREGS_HAS_PADDING (@var{regno}, @var{mode})
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A C expression that is nonzero if a value of mode @var{mode}, stored
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in memory, ends with padding that causes it to take up more space than
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in registers starting at register number @var{regno} (as determined by
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multiplying GCC's notion of the size of the register when containing
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this mode by the number of registers returned by
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@code{HARD_REGNO_NREGS}). By default this is zero.
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For example, if a floating-point value is stored in three 32-bit
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registers but takes up 128 bits in memory, then this would be
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nonzero.
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This macros only needs to be defined if there are cases where
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@code{subreg_regno_offset} and @code{subreg_offset_representable_p}
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would otherwise wrongly determine that a @code{subreg} can be
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represented by an offset to the register number, when in fact such a
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@code{subreg} would contain some of the padding not stored in
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registers and so not be representable.
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@end defmac
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@defmac HARD_REGNO_NREGS_WITH_PADDING (@var{regno}, @var{mode})
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For values of @var{regno} and @var{mode} for which
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@code{HARD_REGNO_NREGS_HAS_PADDING} returns nonzero, a C expression
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returning the greater number of registers required to hold the value
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including any padding. In the example above, the value would be four.
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@end defmac
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@defmac REGMODE_NATURAL_SIZE (@var{mode})
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Define this macro if the natural size of registers that hold values
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of mode @var{mode} is not the word size. It is a C expression that
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@ -2925,34 +2925,15 @@ unsigned int
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subreg_regno_offset (unsigned int xregno, enum machine_mode xmode,
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unsigned int offset, enum machine_mode ymode)
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{
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int nregs_xmode, nregs_ymode, nregs_xmode_unit_int;
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int nregs_xmode, nregs_ymode;
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int mode_multiple, nregs_multiple;
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int y_offset;
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enum machine_mode xmode_unit, xmode_unit_int;
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gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
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if (GET_MODE_INNER (xmode) == VOIDmode)
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xmode_unit = xmode;
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else
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xmode_unit = GET_MODE_INNER (xmode);
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if (FLOAT_MODE_P (xmode_unit))
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{
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xmode_unit_int = int_mode_for_mode (xmode_unit);
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if (xmode_unit_int == BLKmode)
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/* It's probably bad to be here; a port should have an integer mode
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that's the same size as anything of which it takes a SUBREG. */
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xmode_unit_int = xmode_unit;
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}
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else
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xmode_unit_int = xmode_unit;
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nregs_xmode_unit_int = hard_regno_nregs[xregno][xmode_unit_int];
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/* Adjust nregs_xmode to allow for 'holes'. */
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if (nregs_xmode_unit_int != hard_regno_nregs[xregno][xmode_unit])
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nregs_xmode = nregs_xmode_unit_int * GET_MODE_NUNITS (xmode);
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if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode))
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nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
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else
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nregs_xmode = hard_regno_nregs[xregno][xmode];
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subreg_offset_representable_p (unsigned int xregno, enum machine_mode xmode,
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unsigned int offset, enum machine_mode ymode)
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{
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int nregs_xmode, nregs_ymode, nregs_xmode_unit, nregs_xmode_unit_int;
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int nregs_xmode, nregs_ymode;
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int mode_multiple, nregs_multiple;
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int y_offset;
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enum machine_mode xmode_unit, xmode_unit_int;
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int regsize_xmode, regsize_ymode;
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gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
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if (GET_MODE_INNER (xmode) == VOIDmode)
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xmode_unit = xmode;
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else
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xmode_unit = GET_MODE_INNER (xmode);
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if (FLOAT_MODE_P (xmode_unit))
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{
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xmode_unit_int = int_mode_for_mode (xmode_unit);
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if (xmode_unit_int == BLKmode)
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/* It's probably bad to be here; a port should have an integer mode
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that's the same size as anything of which it takes a SUBREG. */
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xmode_unit_int = xmode_unit;
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}
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else
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xmode_unit_int = xmode_unit;
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nregs_xmode_unit = hard_regno_nregs[xregno][xmode_unit];
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nregs_xmode_unit_int = hard_regno_nregs[xregno][xmode_unit_int];
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/* If there are holes in a non-scalar mode in registers, we expect
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that it is made up of its units concatenated together. */
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if (nregs_xmode_unit != nregs_xmode_unit_int)
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if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode))
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{
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gcc_assert (nregs_xmode_unit * GET_MODE_NUNITS (xmode)
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== hard_regno_nregs[xregno][xmode]);
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enum machine_mode xmode_unit;
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nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
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if (GET_MODE_INNER (xmode) == VOIDmode)
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xmode_unit = xmode;
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else
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xmode_unit = GET_MODE_INNER (xmode);
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gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
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gcc_assert (nregs_xmode
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== (GET_MODE_NUNITS (xmode)
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* HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode_unit)));
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gcc_assert (hard_regno_nregs[xregno][xmode]
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== (hard_regno_nregs[xregno][xmode_unit]
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* GET_MODE_NUNITS (xmode)));
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/* You can only ask for a SUBREG of a value with holes in the middle
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if you don't cross the holes. (Such a SUBREG should be done by
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3 for each part, but in memory it's two 128-bit parts.
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Padding is assumed to be at the end (not necessarily the 'high part')
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of each unit. */
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if (nregs_xmode_unit != nregs_xmode_unit_int
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&& (offset / GET_MODE_SIZE (xmode_unit_int) + 1
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< GET_MODE_NUNITS (xmode))
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&& (offset / GET_MODE_SIZE (xmode_unit_int)
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if ((offset / GET_MODE_SIZE (xmode_unit) + 1
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< GET_MODE_NUNITS (xmode))
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&& (offset / GET_MODE_SIZE (xmode_unit)
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!= ((offset + GET_MODE_SIZE (ymode) - 1)
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/ GET_MODE_SIZE (xmode_unit_int))))
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/ GET_MODE_SIZE (xmode_unit))))
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return false;
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nregs_xmode = nregs_xmode_unit_int * GET_MODE_NUNITS (xmode);
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}
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else
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nregs_xmode = hard_regno_nregs[xregno][xmode];
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? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
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return true;
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/* If registers store different numbers of bits in the different
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modes, we cannot generally form this subreg. */
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regsize_xmode = GET_MODE_SIZE (xmode) / nregs_xmode;
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regsize_ymode = GET_MODE_SIZE (ymode) / nregs_ymode;
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if (regsize_xmode > regsize_ymode && nregs_ymode > 1)
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return false;
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if (regsize_ymode > regsize_xmode && nregs_xmode > 1)
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return false;
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/* Lowpart subregs are otherwise valid. */
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if (offset == subreg_lowpart_offset (ymode, xmode))
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return true;
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