From 859e95abb84b67a2cb42d6e6013c16160d9c802d Mon Sep 17 00:00:00 2001
From: Segher Boessenkool <segher@kernel.crashing.org>
Date: Wed, 12 Oct 2016 17:37:20 +0200
Subject: [PATCH] shrink-wrap: Testcases for separate shrink-wrapping

A few testcases for separate shrink-wrapping: test whether it works in a
trivial case; whether it creates more than one prologue where that is
useful; whether it puts prologues inside a loop if that is cheaper.


gcc/testsuite/
	* gcc.target/powerpc/shrink-wrap-separate-0.c: New testcase.
	* gcc.target/powerpc/shrink-wrap-separate-1.c: New testcase.
	* gcc.target/powerpc/shrink-wrap-separate-2.c: New testcase.

From-SVN: r241066
---
 gcc/testsuite/ChangeLog                       |  6 +++++
 .../powerpc/shrink-wrap-separate-0.c          | 22 ++++++++++++++++
 .../powerpc/shrink-wrap-separate-1.c          | 18 +++++++++++++
 .../powerpc/shrink-wrap-separate-2.c          | 26 +++++++++++++++++++
 4 files changed, 72 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-0.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-2.c

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4aed4b81d2e..5eb693a652f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2016-10-12  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	* gcc.target/powerpc/shrink-wrap-separate-0.c: New testcase.
+	* gcc.target/powerpc/shrink-wrap-separate-1.c: New testcase.
+	* gcc.target/powerpc/shrink-wrap-separate-2.c: New testcase.
+
 2016-10-12  Segher Boessenkool  <segher@kernel.crashing.org>
 
 	* gcc.target/powerpc/warn-1.c: Change line number in dg-warning.
diff --git a/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-0.c b/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-0.c
new file mode 100644
index 00000000000..dea0611e8fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-0.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler {#before\M.*\mmflr\M} } } */
+
+/* This tests if shrink-wrapping for separate components works.
+
+   r20 (a callee-saved register) is forced live at the start, so that we
+   get it saved in a prologue at the start of the function.
+   The link register only needs to be saved if x is non-zero; without
+   separate shrink-wrapping it would however be saved in the one prologue.
+   The test tests if the mflr insn ends up behind the prologue.  */
+
+void g(void);
+
+void f(int x)
+{
+	register int r20 asm("20") = x;
+	asm("#before" : : "r"(r20));
+	if (x)
+		g();
+	asm(""); // no tailcall of g
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-1.c b/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-1.c
new file mode 100644
index 00000000000..735b606e66d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler {\mmflr\M.*\mbl\M.*\mmflr\M.*\mbl\M} } } */
+
+/* This tests if shrink-wrapping for separate components creates more
+   than one prologue when that is useful.  In this case, it saves the
+   link register before both the call to g and the call to h.  */
+
+void g(void) __attribute__((noreturn));
+void h(void) __attribute__((noreturn));
+
+void f(int x)
+{
+	if (x == 42)
+		g();
+	if (x == 31)
+		h();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-2.c b/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-2.c
new file mode 100644
index 00000000000..b22564a51c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/shrink-wrap-separate-2.c
@@ -0,0 +1,26 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler {\mmflr\M.*\mbl\M.*\mmflr\M.*\mbl\M} } } */
+
+/* This tests if shrink-wrapping for separate components puts a prologue
+   inside a loop when that is useful.  In this case, it saves the link
+   register before each call: both calls happen with probability .10,
+   so saving the link register happens with .80 per execution of f on
+   average, which is smaller than 1 which you would get if you saved
+   it outside the loop.  */
+
+int *a;
+void g(void);
+
+void f(int x)
+{
+	int j;
+	for (j = 0; j < 4; j++) {
+		if (__builtin_expect(a[j], 0))
+			g();
+		asm("#" : : : "memory");
+		if (__builtin_expect(a[j], 0))
+			g();
+		a[j]++;
+	}
+}