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mn10300: Define the A and D constraints.

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This will allow combining am33 and mn103 alternatives
without having to resort to the enabled attribute.

The existing 'A' constraint renamed to 'c'.  Thankfully
this existing accumulator constraint doesn't appear in
either newlib or eglibc sources.

From-SVN: r168675
This commit is contained in:
Richard Henderson 2011-01-11 10:28:59 -08:00 committed by Richard Henderson
parent a5c727e3ba
commit 85a337b58a
3 changed files with 19 additions and 5 deletions
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5
gcc/ChangeLog
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@ -1,5 +1,10 @@
2011-01-11 Richard Henderson <rth@redhat.com>
* config/mn10300/constraints.md ("c"): Rename from "A".
("A", "D"): New constraint letters.
* config/mn10300/mn10300.md (fmasf4): Use the "c" constraint.
(fmssf4, fnmasf4, fnmssf4): Likewise.
* config/mn10300/mn10300.md (isa): New attribute.
(enabled): New attribute.

11
gcc/config/mn10300/constraints.md
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@ -23,6 +23,15 @@
(define_register_constraint "a" "ADDRESS_REGS"
"An address register.")
;; This can be used for QI/HImode memory operations, and most arithmetic.
;; AM33 supports these on all registers, where MN103 needs DATA_REGS.
(define_register_constraint "D" "TARGET_AM33 ? GENERAL_REGS : DATA_REGS"
"A general register for AM33, and a data register otherwise.")
;; Similarly for ADDRESS_REGS vs GENERAL_REGS.
(define_register_constraint "A" "TARGET_AM33 ? GENERAL_REGS : ADDRESS_REGS"
"A general register for AM33, and an address register otherwise.")
(define_register_constraint "y" "SP_REGS"
"An SP register (if available).")
@ -32,7 +41,7 @@
(define_register_constraint "f" "TARGET_AM33_2 ? FP_REGS : NO_REGS"
"A floating point register.")
(define_register_constraint "A" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
(define_register_constraint "c" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
"A floating point accumulator register.")
(define_memory_constraint "Q"

8
gcc/config/mn10300/mn10300.md
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@ -2717,7 +2717,7 @@
)
(define_insn "fmasf4"
[(set (match_operand:SF 0 "register_operand" "=A")
[(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f")))
@ -2730,7 +2730,7 @@
)
(define_insn "fmssf4"
[(set (match_operand:SF 0 "register_operand" "=A")
[(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")
(neg:SF (match_operand:SF 3 "register_operand" "f"))))
@ -2743,7 +2743,7 @@
)
(define_insn "fnmasf4"
[(set (match_operand:SF 0 "register_operand" "=A")
[(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
(match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f")))
@ -2756,7 +2756,7 @@
)
(define_insn "fnmssf4"
[(set (match_operand:SF 0 "register_operand" "=A")
[(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
(match_operand:SF 2 "register_operand" "f")
(neg:SF (match_operand:SF 3 "register_operand" "f"))))