rs6000.md (sync_add<mode>_internal, [...]): Use "bne- $-xxx" rather than local labels.
* config/rs6000/rs6000.md (sync_add<mode>_internal, sync_addshort_internal, sync_sub<mode>_internal, sync_andsi_internal, sync_anddi_internal, sync_boolsi_internal, sync_booldi_internal, sync_boolc<mode>_internal, sync_boolc<mode>_internal2, sync_boolcc<mode>_internal, sync_lock_test_and_set<mode>): Use "bne- $-xxx" rather than local labels. (sync_lock_release<mode>): Add second operand. (lwsync): Use .long rather than a more meaningful opcode. * doc/md.texi (Standard Names): Add description of second parameter to sync_lock_test_and_set. From-SVN: r98602
This commit is contained in:
Geoffrey Keating
Geoffrey Keating
parent
a3b609dfb9
commit
8635a91927
@ -1,3 +1,16 @@
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2005-04-22 Geoffrey Keating <geoffk@apple.com>
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* config/rs6000/rs6000.md (sync_add<mode>_internal,
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sync_addshort_internal, sync_sub<mode>_internal, sync_andsi_internal,
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sync_anddi_internal, sync_boolsi_internal, sync_booldi_internal,
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sync_boolc<mode>_internal, sync_boolc<mode>_internal2,
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sync_boolcc<mode>_internal, sync_lock_test_and_set<mode>): Use
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"bne- $-xxx" rather than local labels.
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(sync_lock_release<mode>): Add second operand.
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(lwsync): Use .long rather than a more meaningful opcode.
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* doc/md.texi (Standard Names): Add description of second
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parameter to sync_lock_test_and_set.
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2005-04-23 Kazu Hirata <kazu@cs.umass.edu>
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PR tree-optimization/21088
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@ -14776,7 +14776,7 @@
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(unspec:BLK [(mem:BLK (match_scratch 6 "X"))] UNSPEC_SYNC))
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(clobber (match_scratch:CC 4 "=&x"))]
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"TARGET_POWERPC"
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"sync\n0:\t<larx> %0,%y1\n\t<cmp>%I2 %0,%2\n\tbne- 1f\n\t<stcx> %3,%y1\n\tbne- 0b\n\t1:\tisync"
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"sync\n\t<larx> %0,%y1\n\t<cmp>%I2 %0,%2\n\tbne- $+12\n\t<stcx> %3,%y1\n\tbne- $-16\n\tisync"
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[(set_attr "length" "28")])
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(define_expand "sync_add<mode>"
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@ -15012,8 +15012,8 @@
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(clobber (match_scratch:CC 4 "=&x,&x"))]
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"TARGET_POWERPC"
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"@
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0:\t<larx> %3,%y0\n\tadd%I1 %2,%3,%1\n\t<stcx> %2,%y0\n\tbne- 0b
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0:\t<larx> %3,%y0\n\taddis %2,%3,%v1\n\t<stcx> %2,%y0\n\tbne- 0b"
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<larx> %3,%y0\n\tadd%I1 %2,%3,%1\n\t<stcx> %2,%y0\n\tbne- $-12
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<larx> %3,%y0\n\taddis %2,%3,%v1\n\t<stcx> %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16,16")])
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(define_insn "*sync_addshort_internal"
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@ -15031,7 +15031,7 @@
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(clobber (match_scratch:CC 5 "=&x"))
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(clobber (match_scratch:SI 6 "=&r"))]
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"TARGET_POWERPC"
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"0:\tlwarx %3,%y0\n\tadd%I1 %2,%3,%1\n\tandc %6,%3,%4\n\tand %2,%2,%4\n\tor %2,%2,%6\n\tstwcx. %2,%y0\n\tbne- 0b"
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"lwarx %3,%y0\n\tadd%I1 %2,%3,%1\n\tandc %6,%3,%4\n\tand %2,%2,%4\n\tor %2,%2,%6\n\tstwcx. %2,%y0\n\tbne- $-24"
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[(set_attr "length" "28")])
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(define_insn "*sync_sub<mode>_internal"
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@ -15044,7 +15044,7 @@
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UNSPEC_SYNC_OP))
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(clobber (match_scratch:CC 4 "=&x"))]
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"TARGET_POWERPC"
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"0:\t<larx> %3,%y0\n\tsubf %2,%1,%3\n\t<stcx> %2,%y0\n\tbne- 0b"
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"<larx> %3,%y0\n\tsubf %2,%1,%3\n\t<stcx> %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16")])
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(define_insn "*sync_andsi_internal"
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@ -15058,10 +15058,10 @@
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(clobber (match_scratch:CC 4 "=&x,&x,&x,&x"))]
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"TARGET_POWERPC"
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"@
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0:\tlwarx %3,%y0\n\tand %2,%3,%1\n\tstwcx. %2,%y0\n\tbne- 0b
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0:\tlwarx %3,%y0\n\trlwinm %2,%3,0,%m1,%M1\n\tstwcx. %2,%y0\n\tbne- 0b
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0:\tlwarx %3,%y0\n\tandi. %2,%3,%b1\n\tstwcx. %2,%y0\n\tbne- 0b
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0:\tlwarx %3,%y0\n\tandis. %2,%3,%u1\n\tstwcx. %2,%y0\n\tbne- 0b"
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lwarx %3,%y0\n\tand %2,%3,%1\n\tstwcx. %2,%y0\n\tbne- $-12
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lwarx %3,%y0\n\trlwinm %2,%3,0,%m1,%M1\n\tstwcx. %2,%y0\n\tbne- $-12
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lwarx %3,%y0\n\tandi. %2,%3,%b1\n\tstwcx. %2,%y0\n\tbne- $-12
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lwarx %3,%y0\n\tandis. %2,%3,%u1\n\tstwcx. %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16,16,16,16")])
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(define_insn "*sync_anddi_internal"
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@ -15075,11 +15075,11 @@
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(clobber (match_scratch:CC 4 "=&x,&x,&x,&x,&x"))]
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"TARGET_POWERPC64"
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"@
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0:\tldarx %3,%y0\n\tand %2,%3,%1\n\tstdcx. %2,%y0\n\tbne- 0b
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0:\tldarx %3,%y0\n\trldic%B1 %2,%3,0,%S1\n\tstdcx. %2,%y0\n\tbne- 0b
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0:\tldarx %3,%y0\n\trlwinm %2,%3,0,%m1,%M1\n\tstdcx. %2,%y0\n\tbne- 0b
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0:\tldarx %3,%y0\n\tandi. %2,%3,%b1\n\tstdcx. %2,%y0\n\tbne- 0b
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0:\tldarx %3,%y0\n\tandis. %2,%3,%b1\n\tstdcx. %2,%y0\n\tbne- 0b"
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ldarx %3,%y0\n\tand %2,%3,%1\n\tstdcx. %2,%y0\n\tbne- $-12
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ldarx %3,%y0\n\trldic%B1 %2,%3,0,%S1\n\tstdcx. %2,%y0\n\tbne- $-12
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ldarx %3,%y0\n\trlwinm %2,%3,0,%m1,%M1\n\tstdcx. %2,%y0\n\tbne- $-12
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ldarx %3,%y0\n\tandi. %2,%3,%b1\n\tstdcx. %2,%y0\n\tbne- $-12
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ldarx %3,%y0\n\tandis. %2,%3,%b1\n\tstdcx. %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16,16,16,16,16")])
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(define_insn "*sync_boolsi_internal"
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@ -15092,9 +15092,9 @@
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(clobber (match_scratch:CC 5 "=&x,&x,&x"))]
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"TARGET_POWERPC"
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"@
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0:\tlwarx %3,%y0\n\t%q4 %2,%3,%1\n\tstwcx. %2,%y0\n\tbne- 0b
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0:\tlwarx %3,%y0\n\t%q4i %2,%3,%b1\n\tstwcx. %2,%y0\n\tbne- 0b
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0:\tlwarx %3,%y0\n\t%q4is %2,%3,%u1\n\tstwcx. %2,%y0\n\tbne- 0b"
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lwarx %3,%y0\n\t%q4 %2,%3,%1\n\tstwcx. %2,%y0\n\tbne- $-12
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lwarx %3,%y0\n\t%q4i %2,%3,%b1\n\tstwcx. %2,%y0\n\tbne- $-12
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lwarx %3,%y0\n\t%q4is %2,%3,%u1\n\tstwcx. %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16,16,16")])
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(define_insn "*sync_booldi_internal"
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@ -15107,9 +15107,9 @@
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(clobber (match_scratch:CC 5 "=&x,&x,&x"))]
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"TARGET_POWERPC64"
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"@
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0:\tldarx %3,%y0\n\t%q4 %2,%3,%1\n\tstdcx. %2,%y0\n\tbne- 0b
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0:\tldarx %3,%y0\n\t%q4i %2,%3,%b1\n\tstdcx. %2,%y0\n\tbne- 0b
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0:\tldarx %3,%y0\n\t%q4is %2,%3,%u1\n\tstdcx. %2,%y0\n\tbne- 0b"
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ldarx %3,%y0\n\t%q4 %2,%3,%1\n\tstdcx. %2,%y0\n\tbne- $-12
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ldarx %3,%y0\n\t%q4i %2,%3,%b1\n\tstdcx. %2,%y0\n\tbne- $-12
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ldarx %3,%y0\n\t%q4is %2,%3,%u1\n\tstdcx. %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16,16,16")])
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(define_insn "*sync_boolc<mode>_internal"
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@ -15121,7 +15121,7 @@
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(set (match_dup 0) (unspec:GPR [(match_dup 4)] UNSPEC_SYNC_OP))
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(clobber (match_scratch:CC 5 "=&x"))]
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"TARGET_POWERPC"
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"0:\t<larx> %3,%y0\n\t%q4 %2,%1,%3\n\t<stcx> %2,%y0\n\tbne- 0b"
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"<larx> %3,%y0\n\t%q4 %2,%1,%3\n\t<stcx> %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16")])
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(define_insn "*sync_boolc<mode>_internal2"
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@ -15133,7 +15133,7 @@
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(set (match_dup 0) (unspec:GPR [(match_dup 4)] UNSPEC_SYNC_OP))
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(clobber (match_scratch:CC 5 "=&x"))]
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"TARGET_POWERPC"
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"0:\t<larx> %3,%y0\n\t%q4 %2,%3,%1\n\t<stcx> %2,%y0\n\tbne- 0b"
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"<larx> %3,%y0\n\t%q4 %2,%3,%1\n\t<stcx> %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16")])
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(define_insn "*sync_boolcc<mode>_internal"
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@ -15145,7 +15145,7 @@
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(set (match_dup 0) (unspec:GPR [(match_dup 4)] UNSPEC_SYNC_OP))
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(clobber (match_scratch:CC 5 "=&x"))]
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"TARGET_POWERPC"
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"0:\t<larx> %3,%y0\n\t%q4 %2,%1,%3\n\t<stcx> %2,%y0\n\tbne- 0b"
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"<larx> %3,%y0\n\t%q4 %2,%1,%3\n\t<stcx> %2,%y0\n\tbne- $-12"
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[(set_attr "length" "16")])
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(define_insn "isync"
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@ -15163,24 +15163,26 @@
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(set (mem:BLK (match_scratch 4 "X"))
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(unspec:BLK [(mem:BLK (match_scratch 5 "X"))] UNSPEC_ISYNC))]
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"TARGET_POWERPC"
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"0:\t<larx> %0,%y1\n\t<stcx> %2,%y1\n\tbne- 0b\n\tisync"
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"<larx> %0,%y1\n\t<stcx> %2,%y1\n\tbne- $-8\n\tisync"
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[(set_attr "length" "16")])
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(define_expand "sync_lock_release<mode>"
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[(use (match_operand:INT 0 "memory_operand"))]
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[(set (match_operand:INT 0 "memory_operand")
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(match_operand:INT 1 "any_operand"))]
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""
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"
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{
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emit_insn (gen_lwsync ());
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emit_move_insn (operands[0], CONST0_RTX (<MODE>mode));
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emit_move_insn (operands[0], operands[1]);
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DONE;
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}")
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; Some AIX assemblers don't accept lwsync, so we use a .long.
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(define_insn "lwsync"
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[(set (mem:BLK (match_scratch 0 "X"))
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(unspec:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_LWSYNC))]
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""
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"lwsync")
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".long 0x7c2004ac")
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@ -4069,14 +4069,19 @@ a compare-and-swap operation, if defined.
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This pattern, if defined, releases a lock set by
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@code{sync_lock_test_and_set@var{mode}}. Operand 0 is the memory
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that contains the lock.
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that contains the lock; operand 1 is the value to store in the lock.
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If the target doesn't implement full semantics for
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@code{sync_lock_test_and_set@var{mode}}, any value operand which is not
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the constant 0 should be rejected with @code{FAIL}, and the true contents
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of the memory operand are implementation defined.
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This pattern must issue any memory barrier instructions such that the
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pattern as a whole acts as a release barrier, that is the lock is
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released only after all previous memory operations have completed.
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If this pattern is not defined, then a @code{memory_barrier} pattern
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will be emitted, followed by a store of zero to the memory operand.
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will be emitted, followed by a store of the value to the memory operand.
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@end table
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