re PR target/14471 (Workaround for errata regarding multiplication bug)
PR target/14471
* configure.ac (Target-specific assembler checks) <cris-*-*>: New
case, checking for -no-mul-bug-abort option.
* configure, config.in: Regenerate.
* doc/invoke.texi (CRIS Options): Document -mmul-bug-workaround
and -mno-mul-bug-workaround.
* config/cris/cris.md ("smulsi3_highpart", "umulsi3_highpart")
("mulsidi3", "umulsidi3"): Prefix output template with "%!".
("umulhisi3", "umulqihi3", "mulsi3", "mulqihi3", "mulhisi3"):
Ditto. Make attribute "slottable" dependent on TARGET_MUL_BUG.
* config/cris/mulsi3.asm (__Mul) [__CRIS_arch_version >= 10]: Make
sure mulu.d is not last on cache-line.
* config/cris/cris.h (ASM_SPEC): Translate -mno-mul-bug-workaround
into -no-mul-bug-abort depending on HAVE_AS_MUL_BUG_ABORT_OPTION.
(TARGET_MASK_MUL_BUG, TARGET_MUL_BUG): New macros.
(TARGET_SWITCHES): New options -mmul-bug-workaround and
-mno-mul-bug-workaround.
(TARGET_DEFAULT): Include TARGET_MASK_MUL_BUG.
(PRINT_OPERAND_PUNCT_VALID_P): Include '!'.
* config/cris/cris.c (cris_operand_extend_operator): Clarify
relation to MULT in head comment.
(cris_op_str): Abort for MULT.
(cris_print_operand) <case '!'>: New case.
From-SVN: r79085
This commit is contained in:
Hans-Peter Nilsson
Hans-Peter Nilsson
parent
f5fb3886b2
commit
86da66b593
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@ -1,3 +1,29 @@
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2004-03-08 Hans-Peter Nilsson <hp@axis.com>
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PR target/14471
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* configure.ac (Target-specific assembler checks) <cris-*-*>: New
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case, checking for -no-mul-bug-abort option.
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* configure, config.in: Regenerate.
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* doc/invoke.texi (CRIS Options): Document -mmul-bug-workaround
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and -mno-mul-bug-workaround.
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* config/cris/cris.md ("smulsi3_highpart", "umulsi3_highpart")
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("mulsidi3", "umulsidi3"): Prefix output template with "%!".
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("umulhisi3", "umulqihi3", "mulsi3", "mulqihi3", "mulhisi3"):
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Ditto. Make attribute "slottable" dependent on TARGET_MUL_BUG.
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* config/cris/mulsi3.asm (__Mul) [__CRIS_arch_version >= 10]: Make
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sure mulu.d is not last on cache-line.
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* config/cris/cris.h (ASM_SPEC): Translate -mno-mul-bug-workaround
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into -no-mul-bug-abort depending on HAVE_AS_MUL_BUG_ABORT_OPTION.
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(TARGET_MASK_MUL_BUG, TARGET_MUL_BUG): New macros.
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(TARGET_SWITCHES): New options -mmul-bug-workaround and
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-mno-mul-bug-workaround.
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(TARGET_DEFAULT): Include TARGET_MASK_MUL_BUG.
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(PRINT_OPERAND_PUNCT_VALID_P): Include '!'.
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* config/cris/cris.c (cris_operand_extend_operator): Clarify
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relation to MULT in head comment.
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(cris_op_str): Abort for MULT.
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(cris_print_operand) <case '!'>: New case.
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2004-03-08 Alan Modra <amodra@bigpond.net.au>
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PR debug/11983
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@ -106,6 +106,9 @@
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/* Define if your assembler supports mfcr field. */
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#undef HAVE_AS_MFCRF
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/* Define if your assembler supports the -no-mul-bug-abort option. */
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#undef HAVE_AS_NO_MUL_BUG_ABORT_OPTION
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/* Define if your assembler supports offsetable %lo(). */
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#undef HAVE_AS_OFFSETABLE_LO10
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@ -543,9 +546,11 @@
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/* Define to `int' if <sys/types.h> doesn't define. */
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#undef gid_t
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/* Define as `__inline' if that's what the C compiler calls it, or to nothing
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if it is not supported. */
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/* Define to `__inline__' or `__inline' if that's what the C compiler
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calls it, or to nothing if 'inline' is not supported under any name. */
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#ifndef __cplusplus
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#undef inline
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#endif
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/* Define to `int' if <sys/types.h> does not define. */
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#undef pid_t
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@ -332,7 +332,10 @@ cris_commutative_orth_op (rtx x, enum machine_mode mode)
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|| code == IOR || code == AND || code == UMIN));
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}
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/* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN. */
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/* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN.
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By the name, you might think we should include MULT. We don't because
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it doesn't accept the same addressing modes as the others (ony
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registers) and there's also the problem of handling TARGET_MUL_BUG. */
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int
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cris_operand_extend_operator (rtx x, enum machine_mode mode)
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@ -499,7 +502,11 @@ cris_op_str (rtx x)
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break;
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case MULT:
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return "mul";
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/* This function is for retrieving a part of an instruction name for
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an operator, for immediate output. If that ever happens for
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MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
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we notice. */
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abort ();
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break;
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case DIV:
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@ -1392,6 +1399,23 @@ cris_print_operand (FILE *file, rtx x, int code)
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fputs ("\n\tnop", file);
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return;
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case '!':
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/* Output directive for alignment padded with "nop" insns.
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Optimizing for size, it's plain 4-byte alignment, otherwise we
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align the section to a cache-line (32 bytes) and skip at max 2
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bytes, i.e. we skip if it's the last insn on a cache-line. The
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latter is faster by a small amount (for two test-programs 99.6%
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and 99.9%) and larger by a small amount (ditto 100.1% and
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100.2%). This is supposed to be the simplest yet performance-
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wise least intrusive way to make sure the immediately following
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(supposed) muls/mulu insn isn't located at the end of a
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cache-line. */
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if (TARGET_MUL_BUG)
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fputs (optimize_size
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? ".p2alignw 2,0x050f\n\t"
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: ".p2alignw 5,0x050f,2\n\t", file);
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return;
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case 'H':
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/* Print high (most significant) part of something. */
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switch (GET_CODE (operand))
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@ -171,9 +171,17 @@ extern const char *cris_elinux_stacksize_str;
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%{!melinux:%{!maout|melf:%{!fno-vtable-gc:-fvtable-gc}}}}}". */
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#define CC1PLUS_SPEC ""
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#ifdef HAVE_AS_MUL_BUG_ABORT_OPTION
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#define MAYBE_AS_NO_MUL_BUG_ABORT \
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"%{mno-mul-bug-workaround:-no-mul-bug-abort} "
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#else
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#define MAYBE_AS_NO_MUL_BUG_ABORT
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#endif
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/* Override previous definitions (linux.h). */
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#undef ASM_SPEC
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#define ASM_SPEC \
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MAYBE_AS_NO_MUL_BUG_ABORT \
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"%{v:-v}\
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%(asm_subtarget)"
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@ -326,8 +334,34 @@ extern int target_flags;
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#define TARGET_MASK_AVOID_GOTPLT 8192
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#define TARGET_AVOID_GOTPLT (target_flags & TARGET_MASK_AVOID_GOTPLT)
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/* Whether or not to work around multiplication instruction hardware bug
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when generating code for models where it may be present. From the
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trouble report for Etrax 100 LX: "A multiply operation may cause
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incorrect cache behaviour under some specific circumstances. The
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problem can occur if the instruction following the multiply instruction
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causes a cache miss, and multiply operand 1 (source operand) bits
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[31:27] matches the logical mapping of the mode register address
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(0xb0....), and bits [9:2] of operand 1 matches the TLB register
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address (0x258-0x25f). There is such a mapping in kernel mode or when
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the MMU is off. Normally there is no such mapping in user mode, and
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the problem will therefore probably not occur in Linux user mode
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programs."
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We have no sure-fire way to know from within GCC that we're compiling a
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user program. For example, -fpic/PIC is used in libgcc which is linked
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into the kernel. However, the workaround option -mno-mul-bug can be
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safely used per-package when compiling programs. The same goes for
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general user-only libraries such as glibc, since there's no user-space
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driver-like program that gets a mapping of I/O registers (all on the
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same page, including the TLB registers). */
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#define TARGET_MASK_MUL_BUG 16384
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#define TARGET_MUL_BUG (target_flags & TARGET_MASK_MUL_BUG)
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#define TARGET_SWITCHES \
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{ \
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{"mul-bug-workaround", TARGET_MASK_MUL_BUG, \
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N_("Work around bug in multiplication instruction")}, \
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{"no-mul-bug-workaround", -TARGET_MASK_MUL_BUG, ""}, \
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/* No "no-etrax" as it does not really imply any model. \
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On the other hand, "etrax" implies the common (and large) \
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subset matching all models. */ \
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@ -405,7 +439,7 @@ extern int target_flags;
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# define TARGET_DEFAULT \
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(TARGET_MASK_SIDE_EFFECT_PREFIXES + TARGET_MASK_STACK_ALIGN \
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+ TARGET_MASK_CONST_ALIGN + TARGET_MASK_DATA_ALIGN \
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+ TARGET_MASK_PROLOGUE_EPILOGUE)
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+ TARGET_MASK_PROLOGUE_EPILOGUE + TARGET_MASK_MUL_BUG)
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#endif
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/* For the cris-*-elf subtarget. */
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@ -1474,7 +1508,8 @@ call_ ## FUNC (void) \
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cris_print_operand (FILE, X, CODE)
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/* For delay-slot handling. */
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#define PRINT_OPERAND_PUNCT_VALID_P(CODE) (CODE == '#')
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#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
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((CODE) == '#' || (CODE) == '!')
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#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
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cris_print_operand_address (FILE, ADDR)
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@ -2469,8 +2469,11 @@
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(zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
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(zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
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"TARGET_HAS_MUL_INSNS"
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"mulu.w %2,%0"
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[(set_attr "slottable" "yes")
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"%!mulu.w %2,%0"
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[(set (attr "slottable")
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(if_then_else (ne (symbol_ref "TARGET_MUL_BUG") (const_int 0))
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(const_string "no")
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(const_string "yes")))
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;; Just N unusable here, but let's be safe.
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(set_attr "cc" "clobber")])
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@ -2480,8 +2483,11 @@
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(zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
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(zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
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"TARGET_HAS_MUL_INSNS"
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"mulu.b %2,%0"
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[(set_attr "slottable" "yes")
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"%!mulu.b %2,%0"
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[(set (attr "slottable")
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(if_then_else (ne (symbol_ref "TARGET_MUL_BUG") (const_int 0))
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(const_string "no")
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(const_string "yes")))
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;; Not exactly sure, but let's be safe.
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(set_attr "cc" "clobber")])
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@ -2496,8 +2502,11 @@
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(mult:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:SI 2 "register_operand" "r")))]
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"TARGET_HAS_MUL_INSNS"
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"muls.d %2,%0"
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[(set_attr "slottable" "yes")
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"%!muls.d %2,%0"
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[(set (attr "slottable")
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(if_then_else (ne (symbol_ref "TARGET_MUL_BUG") (const_int 0))
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(const_string "no")
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(const_string "yes")))
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;; Just N unusable here, but let's be safe.
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(set_attr "cc" "clobber")])
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@ -2511,8 +2520,11 @@
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(sign_extend:HI (match_operand:QI 1 "register_operand" "0"))
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(sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
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"TARGET_HAS_MUL_INSNS"
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"muls.b %2,%0"
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[(set_attr "slottable" "yes")
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"%!muls.b %2,%0"
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[(set (attr "slottable")
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(if_then_else (ne (symbol_ref "TARGET_MUL_BUG") (const_int 0))
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(const_string "no")
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(const_string "yes")))
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(set_attr "cc" "clobber")])
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(define_insn "mulhisi3"
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@ -2521,8 +2533,11 @@
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(sign_extend:SI (match_operand:HI 1 "register_operand" "0"))
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(sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
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"TARGET_HAS_MUL_INSNS"
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"muls.w %2,%0"
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[(set_attr "slottable" "yes")
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"%!muls.w %2,%0"
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[(set (attr "slottable")
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(if_then_else (ne (symbol_ref "TARGET_MUL_BUG") (const_int 0))
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(const_string "no")
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(const_string "yes")))
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;; Just N unusable here, but let's be safe.
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(set_attr "cc" "clobber")])
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@ -2538,7 +2553,7 @@
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(sign_extend:DI (match_operand:SI 1 "register_operand" "0"))
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(sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
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"TARGET_HAS_MUL_INSNS"
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"muls.d %2,%M0\;move $mof,%H0")
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"%!muls.d %2,%M0\;move $mof,%H0")
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(define_insn "umulsidi3"
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[(set (match_operand:DI 0 "register_operand" "=r")
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@ -2546,7 +2561,7 @@
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(zero_extend:DI (match_operand:SI 1 "register_operand" "0"))
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(zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
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"TARGET_HAS_MUL_INSNS"
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"mulu.d %2,%M0\;move $mof,%H0")
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"%!mulu.d %2,%M0\;move $mof,%H0")
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;; This pattern would probably not be needed if we add "mof" in its own
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;; register class (and open a can of worms about /not/ pairing it with a
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@ -2565,7 +2580,7 @@
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(const_int 32))))
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(clobber (match_scratch:SI 3 "=X,1,1"))]
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"TARGET_HAS_MUL_INSNS"
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"muls.d %2,%1\;move $mof,%0"
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"%!muls.d %2,%1\;move $mof,%0"
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[(set_attr "cc" "clobber")])
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(define_insn "umulsi3_highpart"
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@ -2578,7 +2593,7 @@
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(const_int 32))))
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(clobber (match_scratch:SI 3 "=X,1,1"))]
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"TARGET_HAS_MUL_INSNS"
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"mulu.d %2,%1\;move $mof,%0"
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"%!mulu.d %2,%1\;move $mof,%0"
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[(set_attr "cc" "clobber")])
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;; Divide and modulus instructions. CRIS only has a step instruction.
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@ -82,8 +82,13 @@
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.type ___Mul,@function
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___Mul:
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#if defined (__CRIS_arch_version) && __CRIS_arch_version >= 10
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ret
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;; Can't have the mulu.d last on a cache-line (in the delay-slot of the
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;; "ret"), due to hardware bug. See documentation for -mmul-bug-workaround.
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;; Not worthwhile to conditionalize here.
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.p2alignw 2,0x050f
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mulu.d $r11,$r10
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ret
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nop
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#else
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move.d $r10,$r12
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move.d $r11,$r9
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File diff suppressed because it is too large
Load Diff
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@ -608,7 +608,8 @@ in the following sections.
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-metrax4 -metrax100 -mpdebug -mcc-init -mno-side-effects @gol
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-mstack-align -mdata-align -mconst-align @gol
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-m32-bit -m16-bit -m8-bit -mno-prologue-epilogue -mno-gotplt @gol
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-melf -maout -melinux -mlinux -sim -sim2}
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-melf -maout -melinux -mlinux -sim -sim2 @gol
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-mmul-bug-workaround -mno-mul-bug-workaround}
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@emph{PDP-11 Options}
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@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
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@ -10107,6 +10108,13 @@ program should be set to @var{n} bytes.
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The options @option{-metrax4} and @option{-metrax100} are synonyms for
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@option{-march=v3} and @option{-march=v8} respectively.
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@item -mmul-bug-workaround
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@itemx -mno-mul-bug-workaround
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@opindex mmul-bug-workaround
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@opindex mno-mul-bug-workaround
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Work around a bug in the @code{muls} and @code{mulu} instructions for CPU
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models where it applies. This option is active by default.
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@item -mpdebug
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@opindex mpdebug
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Enable CRIS-specific verbose debug-related information in the assembly
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Loading…
Reference in New Issue