re PR target/38931 (Seg fault when getting instruction latency on a *movsi_1 with an MMX target register)
PR target/38931 * config/i386/i386.md (*movsi_1): Use type "mmx" for alternative 2. (*movdi_1_rex64): Use type "mmx" for alternative 5. testsuite/ChangeLog: PR target/38931 * gcc.target/i386/pr38931.c: New test. From-SVN: r143567
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@ -1,3 +1,9 @@
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2009-01-22 Uros Bizjak <ubizjak@gmail.com>
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PR target/38931
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* config/i386/i386.md (*movsi_1): Use type "mmx" for alternative 2.
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(*movdi_1_rex64): Use type "mmx" for alternative 5.
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2009-01-22 Richard Earnshaw <rearnsha@arm.com>
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* arm.h (DATA_ALIGNMENT): Align structures, unions and arrays to
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@ -5,7 +11,7 @@
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(LOCAL_ALIGNMENT): Similarly.
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2009-01-22 Mark Shinwell <shinwell@codesourcery.com>
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Joseph Myers <joseph@codesourcery.com>
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Joseph Myers <joseph@codesourcery.com>
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* config/arm/arm.c (all_architectures): Add iWMMXt2 entry.
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* config/arm/arm-cores.def: New ARM_CORE entry for iWMMXt2.
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@ -1534,7 +1534,7 @@
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gcc_unreachable ();
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}
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case TYPE_MMXADD:
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case TYPE_MMX:
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return "pxor\t%0, %0";
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case TYPE_MMXMOV:
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@ -1552,7 +1552,7 @@
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}
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[(set (attr "type")
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(cond [(eq_attr "alternative" "2")
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(const_string "mmxadd")
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(const_string "mmx")
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(eq_attr "alternative" "3,4,5")
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(const_string "mmxmov")
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(eq_attr "alternative" "6")
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@ -2370,7 +2370,7 @@
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case TYPE_SSELOG1:
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return "%vpxor\t%0, %d0";
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case TYPE_MMXADD:
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case TYPE_MMX:
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return "pxor\t%0, %0";
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case TYPE_MULTI:
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@ -2391,7 +2391,7 @@
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}
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[(set (attr "type")
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(cond [(eq_attr "alternative" "5")
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(const_string "mmxadd")
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(const_string "mmx")
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(eq_attr "alternative" "6,7,8,9,10")
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(const_string "mmxmov")
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(eq_attr "alternative" "11")
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@ -1,3 +1,8 @@
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2009-01-22 Uros Bizjak <ubizjak@gmail.com>
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PR target/38931
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* gcc.target/i386/pr38931.c: New test.
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2009-01-22 Dodji Seketeli <dodji@redhat.com>
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PR c++/38930
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@ -0,0 +1,23 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse" } */
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typedef int __m64 __attribute__ ((__vector_size__ (8)));
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extern __m64 foo () ;
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void bar (const int input_bpl, const unsigned char *input,
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unsigned char *output, unsigned long x1)
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{
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unsigned char *pix_end_ptr = output + x1 * 4;
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__m64 m_original = { 0, 0 };
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__m64 m_base_addr = __builtin_ia32_vec_init_v2si (0, input_bpl);
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__m64 m_addr = __builtin_ia32_paddd (m_original, m_base_addr);
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__m64 *a0 = (__m64 *) input;
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for (; output < pix_end_ptr; output += 4)
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{
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a0 = (__m64 *) (input + __builtin_ia32_vec_ext_v2si (m_addr, 0));
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m_addr = foo ();
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__builtin_prefetch (a0, 0);
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}
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}
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