[ARM][doc] Improve description of AArch32 CRC32 intrinsics.
* doc/arm-acle-intrinsics.texi: Specify when CRC32 intrinsics are available. Simplify description of __crc32d and __crc32cd intrinsics. * doc/extend.texi (ARM ACLE Intrinsics): Remove comment about CRC32 availability. From-SVN: r211402
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2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* doc/arm-acle-intrinsics.texi: Specify when CRC32 intrinsics are
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available.
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Simplify description of __crc32d and __crc32cd intrinsics.
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* doc/extend.texi (ARM ACLE Intrinsics): Remove comment about CRC32
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availability.
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2014-06-10 Thomas Schwinge <thomas@codesourcery.com>
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PR lto/61334
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@ -4,6 +4,10 @@
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@subsubsection CRC32 intrinsics
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These intrinsics are available when the CRC32 architecture extension is
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specified, e.g. when the @option{-march=armv8-a+crc} switch is used, or when
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the target processor specified with @option{-mcpu} supports it.
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@itemize @bullet
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@item uint32_t __crc32b (uint32_t, uint8_t)
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@*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}}
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@ -25,8 +29,7 @@
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@itemize @bullet
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@item uint32_t __crc32d (uint32_t, uint64_t)
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@*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}}
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instructions for AArch32. One @code{crc32w @var{w0}, @var{w0}, @var{x0}} instruction for
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AArch64.
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instructions.
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@end itemize
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@itemize @bullet
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@ -50,6 +53,5 @@ AArch64.
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@itemize @bullet
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@item uint32_t __crc32cd (uint32_t, uint64_t)
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@*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
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instructions for AArch32. One @code{crc32cw @var{w0}, @var{w0}, @var{x0}} instruction for
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AArch64.
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instructions.
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@end itemize
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@ -10516,9 +10516,6 @@ when the @option{-mfpu=neon} switch is used:
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@node ARM ACLE Intrinsics
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@subsection ARM ACLE Intrinsics
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These built-in intrinsics for the ARMv8-A CRC32 extension are available when
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the @option{-march=armv8-a+crc} switch is used:
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@include arm-acle-intrinsics.texi
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@node ARM Floating Point Status and Control Intrinsics
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