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sh.md (fpu_switch0, [...]): Simplify. 

* config/sh/sh.md (fpu_switch0, fpu_switch1): Simplify.
* config/sh/sh.c (fpscr_set_from_mem): Use them.

From-SVN: r35792
This commit is contained in:
Alexandre Oliva 2000-08-18 19:10:43 +00:00 committed by Alexandre Oliva
parent a1c1fdd010
commit 8845e874be
3 changed files with 17 additions and 32 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
Fri Aug 18 16:01:18 2000 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (fpu_switch0, fpu_switch1): Simplify.
* config/sh/sh.c (fpscr_set_from_mem): Use them.
Fri Aug 18 14:23:18 2000 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* regmove.c (perhaps_ends_bb_p): New function.

22
gcc/config/sh/sh.c
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@ -5106,28 +5106,10 @@ fpscr_set_from_mem (mode, regs_live)
HARD_REG_SET regs_live;
{
enum attr_fp_mode fp_mode = mode;
rtx i;
rtx sym;
rtx addr_reg = get_free_reg (regs_live);
sym = gen_rtx_SYMBOL_REF (SImode, "__fpscr_values");
i = gen_rtx_SET (VOIDmode, addr_reg, sym);
emit_insn (i);
if (fp_mode == (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE))
{
rtx r = addr_reg;
addr_reg = get_free_reg (regs_live);
i = gen_rtx_SET (VOIDmode, addr_reg,
gen_rtx_PLUS (Pmode, r, GEN_INT (4)));
emit_insn (i);
}
i = gen_rtx_SET (VOIDmode,
get_fpscr_rtx (),
gen_rtx_MEM (PSImode, gen_rtx_POST_INC (Pmode, addr_reg)));
i = emit_insn (i);
REG_NOTES (i) = gen_rtx_EXPR_LIST (REG_DEAD, addr_reg, REG_NOTES (i));
REG_NOTES (i) = gen_rtx_EXPR_LIST (REG_INC, addr_reg, REG_NOTES (i));
emit_insn ((fp_mode == (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE)
? gen_fpu_switch1 : gen_fpu_switch0) (addr_reg));
}
/* Is the given character a logical line separator for the assembler? */

22
gcc/config/sh/sh.md
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@ -3884,27 +3884,25 @@
;; ??? All patterns should have a type attribute.
(define_expand "fpu_switch0"
[(set (match_operand:SI 0 "" "") (symbol_ref "__fpscr_values"))
(set (match_dup 2) (match_dup 1))]
[(set (match_operand:SI 0 "" "") (match_dup 2))
(set (match_dup 1) (mem:PSI (match_dup 0)))]
""
"
{
operands[1] = gen_rtx (MEM, PSImode, operands[0]);
RTX_UNCHANGING_P (operands[1]) = 1;
operands[2] = get_fpscr_rtx ();
operands[1] = get_fpscr_rtx ();
operands[2] = gen_rtx_SYMBOL_REF (SImode, \"__fpscr_values\");
}")
(define_expand "fpu_switch1"
[(set (match_operand:SI 0 "" "") (symbol_ref "__fpscr_values"))
(set (match_dup 1) (plus:SI (match_dup 0) (const_int 4)))
(set (match_dup 3) (match_dup 2))]
[(set (match_operand:SI 0 "" "") (match_dup 2))
(set (match_dup 3) (plus:SI (match_dup 0) (const_int 4)))
(set (match_dup 1) (mem:PSI (match_dup 3)))]
""
"
{
operands[1] = gen_reg_rtx (SImode);
operands[2] = gen_rtx (MEM, PSImode, operands[1]);
RTX_UNCHANGING_P (operands[2]) = 1;
operands[3] = get_fpscr_rtx ();
operands[1] = get_fpscr_rtx ();
operands[2] = gen_rtx_SYMBOL_REF (SImode, \"__fpscr_values\");
operands[3] = no_new_pseudos ? operands[0] : gen_reg_rtx (SImode);
}")
(define_expand "movpsi"