AVX512: Restrict default masks for prefetch gather/scatter
instructions. gcc/ PR target/69228 * config/i386/sse.md (define_expand "avx512pf_gatherpf<mode>sf"): Change first operand predicate from register_or_constm1_operand to register_operand. (define_expand "avx512pf_gatherpf<mode>df"): Likewise. (define_expand "avx512pf_scatterpf<mode>sf"): Likewise. (define_expand "avx512pf_scatterpf<mode>df"): Likewise. (define_insn "*avx512pf_gatherpf<mode>sf"): Remove. (define_insn "*avx512pf_gatherpf<mode>df"): Likewise. (define_insn "*avx512pf_scatterpf<mode>sf"): Likewise. (define_insn "*avx512pf_scatterpf<mode>df"): Likewise. * config/i386/i386.c (ix86_expand_builtin): Remove first operand comparison with constm1_rtx from vec_prefetch_gen part. gcc/testsuite PR target/69228 * gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Adjust. * gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Likewise. From-SVN: r232324
This commit is contained in:
Alexander Fomin
Alexander Fomin
parent
629e47295b
commit
8866d62c0a
|
|
@ -1,3 +1,19 @@
|
|||
2016-01-13 Alexander Fomin <alexander.fomin@intel.com>
|
||||
|
||||
PR target/69228
|
||||
* config/i386/sse.md (define_expand "avx512pf_gatherpf<mode>sf"):
|
||||
Change first operand predicate from register_or_constm1_operand
|
||||
to register_operand.
|
||||
(define_expand "avx512pf_gatherpf<mode>df"): Likewise.
|
||||
(define_expand "avx512pf_scatterpf<mode>sf"): Likewise.
|
||||
(define_expand "avx512pf_scatterpf<mode>df"): Likewise.
|
||||
(define_insn "*avx512pf_gatherpf<mode>sf"): Remove.
|
||||
(define_insn "*avx512pf_gatherpf<mode>df"): Likewise.
|
||||
(define_insn "*avx512pf_scatterpf<mode>sf"): Likewise.
|
||||
(define_insn "*avx512pf_scatterpf<mode>df"): Likewise.
|
||||
* config/i386/i386.c (ix86_expand_builtin): Remove first operand
|
||||
comparison with constm1_rtx from vec_prefetch_gen part.
|
||||
|
||||
2016-01-13 Richard Biener <rguenther@suse.de>
|
||||
|
||||
PR tree-optimization/69013
|
||||
|
|
|
|||
|
|
@ -41828,13 +41828,12 @@ rdseed_step:
|
|||
|
||||
op0 = fixup_modeless_constant (op0, mode0);
|
||||
|
||||
if (GET_MODE (op0) == mode0
|
||||
|| (GET_MODE (op0) == VOIDmode && op0 != constm1_rtx))
|
||||
if (GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode)
|
||||
{
|
||||
if (!insn_data[icode].operand[0].predicate (op0, mode0))
|
||||
op0 = copy_to_mode_reg (mode0, op0);
|
||||
}
|
||||
else if (op0 != constm1_rtx)
|
||||
else
|
||||
{
|
||||
op0 = copy_to_reg (op0);
|
||||
op0 = simplify_gen_subreg (mode0, op0, GET_MODE (op0), 0);
|
||||
|
|
|
|||
|
|
@ -15654,7 +15654,7 @@
|
|||
|
||||
(define_expand "avx512pf_gatherpf<mode>sf"
|
||||
[(unspec
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_operand")
|
||||
(mem:<GATHER_SCATTER_SF_MEM_MODE>
|
||||
(match_par_dup 5
|
||||
[(match_operand 2 "vsib_address_operand")
|
||||
|
|
@ -15696,37 +15696,10 @@
|
|||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
(define_insn "*avx512pf_gatherpf<mode>sf"
|
||||
[(unspec
|
||||
[(const_int -1)
|
||||
(match_operator:<GATHER_SCATTER_SF_MEM_MODE> 4 "vsib_mem_operator"
|
||||
[(unspec:P
|
||||
[(match_operand:P 1 "vsib_address_operand" "Tv")
|
||||
(match_operand:VI48_512 0 "register_operand" "v")
|
||||
(match_operand:SI 2 "const1248_operand" "n")]
|
||||
UNSPEC_VSIBADDR)])
|
||||
(match_operand:SI 3 "const_2_to_3_operand" "n")]
|
||||
UNSPEC_GATHER_PREFETCH)]
|
||||
"TARGET_AVX512PF"
|
||||
{
|
||||
switch (INTVAL (operands[3]))
|
||||
{
|
||||
case 3:
|
||||
return "vgatherpf0<ssemodesuffix>ps\t{%4|%4}";
|
||||
case 2:
|
||||
return "vgatherpf1<ssemodesuffix>ps\t{%4|%4}";
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
}
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
;; Packed double variants
|
||||
(define_expand "avx512pf_gatherpf<mode>df"
|
||||
[(unspec
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_operand")
|
||||
(mem:V8DF
|
||||
(match_par_dup 5
|
||||
[(match_operand 2 "vsib_address_operand")
|
||||
|
|
@ -15768,37 +15741,10 @@
|
|||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
(define_insn "*avx512pf_gatherpf<mode>df"
|
||||
[(unspec
|
||||
[(const_int -1)
|
||||
(match_operator:V8DF 4 "vsib_mem_operator"
|
||||
[(unspec:P
|
||||
[(match_operand:P 1 "vsib_address_operand" "Tv")
|
||||
(match_operand:VI4_256_8_512 0 "register_operand" "v")
|
||||
(match_operand:SI 2 "const1248_operand" "n")]
|
||||
UNSPEC_VSIBADDR)])
|
||||
(match_operand:SI 3 "const_2_to_3_operand" "n")]
|
||||
UNSPEC_GATHER_PREFETCH)]
|
||||
"TARGET_AVX512PF"
|
||||
{
|
||||
switch (INTVAL (operands[3]))
|
||||
{
|
||||
case 3:
|
||||
return "vgatherpf0<ssemodesuffix>pd\t{%4|%4}";
|
||||
case 2:
|
||||
return "vgatherpf1<ssemodesuffix>pd\t{%4|%4}";
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
}
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
;; Packed float variants
|
||||
(define_expand "avx512pf_scatterpf<mode>sf"
|
||||
[(unspec
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_operand")
|
||||
(mem:<GATHER_SCATTER_SF_MEM_MODE>
|
||||
(match_par_dup 5
|
||||
[(match_operand 2 "vsib_address_operand")
|
||||
|
|
@ -15842,39 +15788,10 @@
|
|||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
(define_insn "*avx512pf_scatterpf<mode>sf"
|
||||
[(unspec
|
||||
[(const_int -1)
|
||||
(match_operator:<GATHER_SCATTER_SF_MEM_MODE> 4 "vsib_mem_operator"
|
||||
[(unspec:P
|
||||
[(match_operand:P 1 "vsib_address_operand" "Tv")
|
||||
(match_operand:VI48_512 0 "register_operand" "v")
|
||||
(match_operand:SI 2 "const1248_operand" "n")]
|
||||
UNSPEC_VSIBADDR)])
|
||||
(match_operand:SI 3 "const2367_operand" "n")]
|
||||
UNSPEC_SCATTER_PREFETCH)]
|
||||
"TARGET_AVX512PF"
|
||||
{
|
||||
switch (INTVAL (operands[3]))
|
||||
{
|
||||
case 3:
|
||||
case 7:
|
||||
return "vscatterpf0<ssemodesuffix>ps\t{%4|%4}";
|
||||
case 2:
|
||||
case 6:
|
||||
return "vscatterpf1<ssemodesuffix>ps\t{%4|%4}";
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
}
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
;; Packed double variants
|
||||
(define_expand "avx512pf_scatterpf<mode>df"
|
||||
[(unspec
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
|
||||
[(match_operand:<avx512fmaskmode> 0 "register_operand")
|
||||
(mem:V8DF
|
||||
(match_par_dup 5
|
||||
[(match_operand 2 "vsib_address_operand")
|
||||
|
|
@ -15918,35 +15835,6 @@
|
|||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
(define_insn "*avx512pf_scatterpf<mode>df"
|
||||
[(unspec
|
||||
[(const_int -1)
|
||||
(match_operator:V8DF 4 "vsib_mem_operator"
|
||||
[(unspec:P
|
||||
[(match_operand:P 1 "vsib_address_operand" "Tv")
|
||||
(match_operand:VI4_256_8_512 0 "register_operand" "v")
|
||||
(match_operand:SI 2 "const1248_operand" "n")]
|
||||
UNSPEC_VSIBADDR)])
|
||||
(match_operand:SI 3 "const2367_operand" "n")]
|
||||
UNSPEC_SCATTER_PREFETCH)]
|
||||
"TARGET_AVX512PF"
|
||||
{
|
||||
switch (INTVAL (operands[3]))
|
||||
{
|
||||
case 3:
|
||||
case 7:
|
||||
return "vscatterpf0<ssemodesuffix>pd\t{%4|%4}";
|
||||
case 2:
|
||||
case 6:
|
||||
return "vscatterpf1<ssemodesuffix>pd\t{%4|%4}";
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
}
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "prefix" "evex")
|
||||
(set_attr "mode" "XI")])
|
||||
|
||||
(define_insn "avx512er_exp2<mode><mask_name><round_saeonly_name>"
|
||||
[(set (match_operand:VF_512 0 "register_operand" "=v")
|
||||
(unspec:VF_512
|
||||
|
|
|
|||
|
|
@ -1,3 +1,15 @@
|
|||
2016-01-13 Alexander Fomin <alexander.fomin@intel.com>
|
||||
|
||||
PR target/69228
|
||||
* gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Adjust.
|
||||
* gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Likewise.
|
||||
* gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Likewise.
|
||||
* gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Likewise.
|
||||
* gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Likewise.
|
||||
* gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Likewise.
|
||||
* gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Likewise.
|
||||
* gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Likewise.
|
||||
|
||||
2016-01-13 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR target/69247
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m256i idx;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512pf -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue