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re PR target/17025 (attribute regparm code-generation bug)

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PR target/17025
        * config/i386/i386.md (testqi_1_maybe_si, andqi_2_maybe_si): New.
        (test_qi_1, andqi_2): Do not promote to simode.

From-SVN: r91956
This commit is contained in:
Richard Henderson 2004-12-09 09:33:42 -08:00 committed by Richard Henderson
parent ad87ad6788
commit 88d6095610
2 changed files with 54 additions and 15 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2004-12-09 Richard Henderson <rth@redhat.com>
PR target/17025
* config/i386/i386.md (testqi_1_maybe_si, andqi_2_maybe_si): New.
(test_qi_1, andqi_2): Do not promote to simode.
2004-12-09 Andrew Pinski <pinskia@physics.uc.edu> 2004-12-09 Andrew Pinski <pinskia@physics.uc.edu>
PR tree-opt/18904 PR tree-opt/18904

63
gcc/config/i386/i386.md
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@ -7834,18 +7834,21 @@
"" ""
"") "")
(define_insn "*testqi_1" (define_insn "*testqi_1_maybe_si"
[(set (reg FLAGS_REG) [(set (reg FLAGS_REG)
(compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "%!*a,q,qm,r") (compare
(match_operand:QI 1 "general_operand" "n,n,qn,n")) (and:QI
(const_int 0)))] (match_operand:QI 0 "nonimmediate_operand" "%!*a,q,qm,r")
"ix86_match_ccmode (insn, CCNOmode) (match_operand:QI 1 "general_operand" "n,n,qn,n"))
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" (const_int 0)))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ix86_match_ccmode (insn,
GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
{ {
if (which_alternative == 3) if (which_alternative == 3)
{ {
if (GET_CODE (operands[1]) == CONST_INT if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 0)
&& (INTVAL (operands[1]) & 0xffffff00))
operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff); operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff);
return "test{l}\t{%1, %k0|%k0, %1}"; return "test{l}\t{%1, %k0|%k0, %1}";
} }
@ -7856,6 +7859,21 @@
(set_attr "mode" "QI,QI,QI,SI") (set_attr "mode" "QI,QI,QI,SI")
(set_attr "pent_pair" "uv,np,uv,np")]) (set_attr "pent_pair" "uv,np,uv,np")])
(define_insn "*testqi_1"
[(set (reg FLAGS_REG)
(compare
(and:QI
(match_operand:QI 0 "nonimmediate_operand" "%!*a,q,qm")
(match_operand:QI 1 "general_operand" "n,n,qn"))
(const_int 0)))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ix86_match_ccmode (insn, CCNOmode)"
"test{b}\t{%1, %0|%0, %1}"
[(set_attr "type" "test")
(set_attr "modrm" "0,1,1")
(set_attr "mode" "QI")
(set_attr "pent_pair" "uv,np,uv")])
(define_expand "testqi_ext_ccno_0" (define_expand "testqi_ext_ccno_0"
[(set (reg:CCNO FLAGS_REG) [(set (reg:CCNO FLAGS_REG)
(compare:CCNO (compare:CCNO
@ -8343,21 +8361,22 @@
[(set_attr "type" "alu1") [(set_attr "type" "alu1")
(set_attr "mode" "QI")]) (set_attr "mode" "QI")])
(define_insn "*andqi_2" (define_insn "*andqi_2_maybe_si"
[(set (reg FLAGS_REG) [(set (reg FLAGS_REG)
(compare (and:QI (compare (and:QI
(match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "qim,qi,i")) (match_operand:QI 2 "general_operand" "qim,qi,i"))
(const_int 0))) (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r") (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r")
(and:QI (match_dup 1) (match_dup 2)))] (and:QI (match_dup 1) (match_dup 2)))]
"ix86_match_ccmode (insn, CCNOmode) "ix86_binary_operator_ok (AND, QImode, operands)
&& ix86_binary_operator_ok (AND, QImode, operands)" && ix86_match_ccmode (insn,
GET_CODE (operands[2]) == CONST_INT
&& INTVAL (operands[2]) >= 0 ? CCNOmode : CCZmode)"
{ {
if (which_alternative == 2) if (which_alternative == 2)
{ {
if (GET_CODE (operands[2]) == CONST_INT if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
&& (INTVAL (operands[2]) & 0xffffff00))
operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff);
return "and{l}\t{%2, %k0|%k0, %2}"; return "and{l}\t{%2, %k0|%k0, %2}";
} }
@ -8366,6 +8385,20 @@
[(set_attr "type" "alu") [(set_attr "type" "alu")
(set_attr "mode" "QI,QI,SI")]) (set_attr "mode" "QI,QI,SI")])
(define_insn "*andqi_2"
[(set (reg FLAGS_REG)
(compare (and:QI
(match_operand:QI 1 "nonimmediate_operand" "%0,0")
(match_operand:QI 2 "general_operand" "qim,qi"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
(and:QI (match_dup 1) (match_dup 2)))]
"ix86_match_ccmode (insn, CCNOmode)
&& ix86_binary_operator_ok (AND, QImode, operands)"
"and{b}\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
(set_attr "mode" "QI")])
(define_insn "*andqi_2_slp" (define_insn "*andqi_2_slp"
[(set (reg FLAGS_REG) [(set (reg FLAGS_REG)
(compare (and:QI (compare (and:QI