OpenE2K/gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

i386.md (type attribute): Add "rotate" for rotate insns.

Browse Source 
* i386.md (type attribute): Add "rotate" for rotate insns.
        (rotate insns): Set type to "rotate".
        (various attributes and function units): Treat rotate like shift.
        (pent_pair attribute): Only rotates by one bit position are
        pairable.
        (sbb insns): Explicitly set pent_pair attribute on a couple
        that were missing it.

From-SVN: r53338
This commit is contained in:
Jeffrey A Law 2002-05-09 17:58:09 +00:00 committed by Jeff Law
parent f78ec36a71
commit 890d52e81b
2 changed files with 42 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
Thu May 9 11:50:09 2002 Jeffrey A Law (law@cygnus.com)
* i386.md (type attribute): Add "rotate" for rotate insns.
(rotate insns): Set type to "rotate".
(various attributes and function units): Treat rotate like shift.
(pent_pair attribute): Only rotates by one bit position are
pairable.
(sbb insns): Explicitly set pent_pair attribute on a couple
that were missing it.
Thu May 9 18:29:24 2002 J"orn Rennecke <joern.rennecke@superh.com>
* sh.c (sh_builtin_saveregs): If starting with an odd fp register,

59
gcc/config/i386/i386.md
View File

@ -123,7 +123,7 @@
;; A basic instruction type. Refinements due to arguments to be
;; provided in other attributes.
(define_attr "type"
"other,multi,alu1,negnot,alu,icmp,test,imov,imovx,lea,incdec,ishift,imul,idiv,ibr,setcc,push,pop,call,callv,icmov,fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,str,cld,sse,sseadd,ssemul,ssediv,ssemov,ssecmp,ssecvt,sselog,sseiadd,sseishft,sseimul,mmx,mmxmov,mmxadd,mmxshft,mmxcmp,mmxcvt,mmxmul,fistp"
"other,multi,alu1,negnot,alu,icmp,test,imov,imovx,lea,incdec,ishift,rotate,imul,idiv,ibr,setcc,push,pop,call,callv,icmov,fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,str,cld,sse,sseadd,ssemul,ssediv,ssemov,ssecmp,ssecvt,sselog,sseiadd,sseishft,sseimul,mmx,mmxmov,mmxadd,mmxshft,mmxcmp,mmxcvt,mmxmul,fistp"
(const_string "other"))
;; Main data type used by the insn
@ -146,7 +146,7 @@
(const_int 0)
(eq_attr "unit" "i387,sse,mmx")
(const_int 0)
(eq_attr "type" "alu1,negnot,alu,icmp,imovx,ishift,imul,push,pop")
(eq_attr "type" "alu1,negnot,alu,icmp,imovx,ishift,rotate,imul,push,pop")
(symbol_ref "ix86_attr_length_immediate_default(insn,1)")
(eq_attr "type" "imov,test")
(symbol_ref "ix86_attr_length_immediate_default(insn,0)")
@ -305,7 +305,7 @@
(and (match_operand 0 "memory_displacement_operand" "")
(match_operand 1 "immediate_operand" "")))
(const_string "true")
(and (eq_attr "type" "alu,ishift,imul,idiv")
(and (eq_attr "type" "alu,ishift,rotate,imul,idiv")
(and (match_operand 0 "memory_displacement_operand" "")
(match_operand 2 "immediate_operand" "")))
(const_string "true")
@ -356,6 +356,9 @@
(and (eq_attr "type" "ishift")
(match_operand 2 "const_int_operand" ""))
(const_string "pu")
(and (eq_attr "type" "rotate")
(match_operand 2 "const_int_1_operand" ""))
(const_string "pu")
(and (eq_attr "type" "call")
(match_operand 0 "constant_call_address_operand" ""))
(const_string "pv")
@ -651,7 +654,7 @@
(define_function_unit "ppro_p0" 1 0
(and (eq_attr "cpu" "pentiumpro")
(eq_attr "type" "ishift,lea,ibr,cld"))
(eq_attr "type" "ishift,rotate,lea,ibr,cld"))
1 1)
(define_function_unit "ppro_p0" 1 0
@ -766,7 +769,7 @@
;; Shift instructions and certain arithmetic are issued only to X pipe.
(define_function_unit "k6_alux" 1 0
(and (eq_attr "cpu" "k6")
(eq_attr "type" "ishift,alu1,negnot,cld"))
(eq_attr "type" "ishift,rotate,alu1,negnot,cld"))
1 1)
;; The QI mode arithmetic is issued to X pipe only.
@ -778,7 +781,7 @@
(define_function_unit "k6_alu" 2 0
(and (eq_attr "cpu" "k6")
(eq_attr "type" "ishift,alu1,negnot,alu,icmp,test,imovx,incdec,setcc,lea"))
(eq_attr "type" "ishift,rotate,alu1,negnot,alu,icmp,test,imovx,incdec,setcc,lea"))
1 1)
(define_function_unit "k6_alu" 2 0
@ -907,7 +910,7 @@
(define_function_unit "athlon_ieu" 3 0
(and (eq_attr "cpu" "athlon")
(eq_attr "type" "alu1,negnot,alu,icmp,test,imov,imovx,lea,incdec,ishift,ibr,call,callv,icmov,cld,pop,setcc,push,pop"))
(eq_attr "type" "alu1,negnot,alu,icmp,test,imov,imovx,lea,incdec,ishift,rotate,ibr,call,callv,icmov,cld,pop,setcc,push,pop"))
1 1)
(define_function_unit "athlon_ieu" 3 0
@ -12237,7 +12240,7 @@
"TARGET_64BIT && ix86_binary_operator_ok (ROTATE, DImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"rol{q}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand:DI 0 "register_operand" "")
(const_string "2")
@ -12252,7 +12255,7 @@
"@
rol{q}\t{%2, %0|%0, %2}
rol{q}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "DI")])
(define_expand "rotlsi3"
@ -12271,7 +12274,7 @@
"ix86_binary_operator_ok (ROTATE, SImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"rol{l}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand:SI 0 "register_operand" "")
(const_string "2")
@ -12286,7 +12289,7 @@
"TARGET_64BIT && ix86_binary_operator_ok (ROTATE, SImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"rol{l}\t%k0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "length" "2")])
(define_insn "*rotlsi3_1"
@ -12298,7 +12301,7 @@
"@
rol{l}\t{%2, %0|%0, %2}
rol{l}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "SI")])
(define_insn "*rotlsi3_1_zext"
@ -12311,7 +12314,7 @@
"@
rol{l}\t{%2, %k0|%k0, %2}
rol{l}\t{%b2, %k0|%k0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "SI")])
(define_expand "rotlhi3"
@ -12330,7 +12333,7 @@
"ix86_binary_operator_ok (ROTATE, HImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"rol{w}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "2")
@ -12345,7 +12348,7 @@
"@
rol{w}\t{%2, %0|%0, %2}
rol{w}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "HI")])
(define_expand "rotlqi3"
@ -12364,7 +12367,7 @@
"ix86_binary_operator_ok (ROTATE, QImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"rol{b}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "2")
@ -12379,7 +12382,7 @@
"@
rol{b}\t{%2, %0|%0, %2}
rol{b}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "QI")])
(define_expand "rotrdi3"
@ -12398,7 +12401,7 @@
"TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, DImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"ror{q}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand:DI 0 "register_operand" "")
(const_string "2")
@ -12413,7 +12416,7 @@
"@
ror{q}\t{%2, %0|%0, %2}
ror{q}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "DI")])
(define_expand "rotrsi3"
@ -12432,7 +12435,7 @@
"ix86_binary_operator_ok (ROTATERT, SImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"ror{l}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand:SI 0 "register_operand" "")
(const_string "2")
@ -12447,7 +12450,7 @@
"TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, SImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"ror{l}\t%k0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand:SI 0 "register_operand" "")
(const_string "2")
@ -12462,7 +12465,7 @@
"@
ror{l}\t{%2, %0|%0, %2}
ror{l}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "SI")])
(define_insn "*rotrsi3_1_zext"
@ -12475,7 +12478,7 @@
"@
ror{l}\t{%2, %k0|%k0, %2}
ror{l}\t{%b2, %k0|%k0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "SI")])
(define_expand "rotrhi3"
@ -12494,7 +12497,7 @@
"ix86_binary_operator_ok (ROTATERT, HImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"ror{w}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "2")
@ -12509,7 +12512,7 @@
"@
ror{w}\t{%2, %0|%0, %2}
ror{w}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "HI")])
(define_expand "rotrqi3"
@ -12528,7 +12531,7 @@
"ix86_binary_operator_ok (ROTATERT, QImode, operands)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)"
"ror{b}\t%0"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set (attr "length")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "2")
@ -12543,7 +12546,7 @@
"@
ror{b}\t{%2, %0|%0, %2}
ror{b}\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")
[(set_attr "type" "rotate")
(set_attr "mode" "QI")])
;; Bit set / bit test instructions
@ -15961,6 +15964,7 @@
; Since we don't have the proper number of operands for an alu insn,
; fill in all the blanks.
[(set_attr "type" "alu")
(set_attr "pent_pair" "pu")
(set_attr "memory" "none")
(set_attr "imm_disp" "false")
(set_attr "mode" "DI")
@ -16003,6 +16007,7 @@
; Since we don't have the proper number of operands for an alu insn,
; fill in all the blanks.
[(set_attr "type" "alu")
(set_attr "pent_pair" "pu")
(set_attr "memory" "none")
(set_attr "imm_disp" "false")
(set_attr "mode" "SI")