OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

emit-rtl.c (need_atomic_barrier_p): New function. 

* emit-rtl.c (need_atomic_barrier_p): New function.
	* emit-rtl.h (need_atomic_barrier_p): Declare it.
	* config/alpha/alpha.c (alpha_{pre,post}_atomic_barrier): Use it.
	* config/arm/arm.c (arm_{pre,post}_atomic_barrier): Use it.
	* config/tilegx/tilegx.c (tile_{pre,post}_atomic_barrier): Use it.
	* config/mips/mips.c (mips_{pre,post}_atomic_barrier_p): Remove.
	(mips_process_sync_loop): Use generic version instead.

From-SVN: r188806
This commit is contained in:
Maxim Kuvyrkov 2012-06-20 01:05:25 +00:00 committed by Maxim Kuvyrkov
parent ff6191481c
commit 8930883ee9
7 changed files with 51 additions and 125 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
2012-06-19 Maxim Kuvyrkov <maxim@codesourcery.com>
* emit-rtl.c (need_atomic_barrier_p): New function.
* emit-rtl.h (need_atomic_barrier_p): Declare it.
* config/alpha/alpha.c (alpha_{pre,post}_atomic_barrier): Use it.
* config/arm/arm.c (arm_{pre,post}_atomic_barrier): Use it.
* config/tilegx/tilegx.c (tile_{pre,post}_atomic_barrier): Use it.
* config/mips/mips.c (mips_{pre,post}_atomic_barrier_p): Remove.
(mips_process_sync_loop): Use generic version instead.
2012-06-19 Maxim Kuvyrkov <maxim@codesourcery.com>
* config/mips/mips.c (mips_process_sync_loop): Emit cmp result only if

32
gcc/config/alpha/alpha.c
View File

@ -4262,39 +4262,15 @@ emit_store_conditional (enum machine_mode mode, rtx res, rtx mem, rtx val)
static void
alpha_pre_atomic_barrier (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
break;
case MEMMODEL_RELEASE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
emit_insn (gen_memory_barrier ());
break;
default:
gcc_unreachable ();
}
if (need_atomic_barrier_p (model, true))
emit_insn (gen_memory_barrier ());
}
static void
alpha_post_atomic_barrier (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_RELEASE:
break;
case MEMMODEL_ACQUIRE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
emit_insn (gen_memory_barrier ());
break;
default:
gcc_unreachable ();
}
if (need_atomic_barrier_p (model, false))
emit_insn (gen_memory_barrier ());
}
/* A subroutine of the atomic operation splitters. Emit an insxl

32
gcc/config/arm/arm.c
View File

@ -25572,39 +25572,15 @@ vfp3_const_double_for_fract_bits (rtx operand)
static void
arm_pre_atomic_barrier (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
break;
case MEMMODEL_RELEASE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
emit_insn (gen_memory_barrier ());
break;
default:
gcc_unreachable ();
}
if (need_atomic_barrier_p (model, true))
emit_insn (gen_memory_barrier ());
}
static void
arm_post_atomic_barrier (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_RELEASE:
break;
case MEMMODEL_ACQUIRE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
emit_insn (gen_memory_barrier ());
break;
default:
gcc_unreachable ();
}
if (need_atomic_barrier_p (model, false))
emit_insn (gen_memory_barrier ());
}
/* Emit the load-exclusive and store-exclusive instructions. */

43
gcc/config/mips/mips.c
View File

@ -11982,45 +11982,6 @@ mips_sync_insn2_template (enum attr_sync_insn2 type)
gcc_unreachable ();
}
/* Subroutines of the mips_process_sync_loop.
Emit barriers as needed for the memory MODEL. */
static bool
mips_emit_pre_atomic_barrier_p (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
return false;
case MEMMODEL_RELEASE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
return true;
default:
gcc_unreachable ();
}
}
static bool
mips_emit_post_atomic_barrier_p (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_RELEASE:
return false;
case MEMMODEL_ACQUIRE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
return true;
default:
gcc_unreachable ();
}
}
/* OPERANDS are the operands to a sync loop instruction and INDEX is
the value of the one of the sync_* attributes. Return the operand
referred to by the attribute, or DEFAULT_VALUE if the insn doesn't
@ -12093,7 +12054,7 @@ mips_process_sync_loop (rtx insn, rtx *operands)
mips_multi_start ();
/* Output the release side of the memory barrier. */
if (mips_emit_pre_atomic_barrier_p (model))
if (need_atomic_barrier_p (model, true))
{
if (required_oldval == 0 && TARGET_OCTEON)
{
@ -12206,7 +12167,7 @@ mips_process_sync_loop (rtx insn, rtx *operands)
mips_multi_add_insn ("li\t%0,1", cmp, NULL);
/* Output the acquire side of the memory barrier. */
if (TARGET_SYNC_AFTER_SC && mips_emit_post_atomic_barrier_p (model))
if (TARGET_SYNC_AFTER_SC && need_atomic_barrier_p (model, false))
mips_multi_add_insn ("sync", NULL);
/* Output the exit label, if needed. */

32
gcc/config/tilegx/tilegx.c
View File

@ -2593,20 +2593,8 @@ tilegx_expand_tablejump (rtx op0, rtx op1)
void
tilegx_pre_atomic_barrier (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
break;
case MEMMODEL_RELEASE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
emit_insn (gen_memory_barrier ());
break;
default:
gcc_unreachable ();
}
if (need_atomic_barrier_p (model, true))
emit_insn (gen_memory_barrier ());
}
@ -2614,20 +2602,8 @@ tilegx_pre_atomic_barrier (enum memmodel model)
void
tilegx_post_atomic_barrier (enum memmodel model)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_RELEASE:
break;
case MEMMODEL_ACQUIRE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
emit_insn (gen_memory_barrier ());
break;
default:
gcc_unreachable ();
}
if (need_atomic_barrier_p (model, false))
emit_insn (gen_memory_barrier ());
}

25
gcc/emit-rtl.c
View File

@ -6161,4 +6161,29 @@ locator_eq (int loc1, int loc2)
return locator_scope (loc1) == locator_scope (loc2);
}
/* Return true if memory model MODEL requires a pre-operation (release-style)
barrier or a post-operation (acquire-style) barrier. While not universal,
this function matches behavior of several targets. */
bool
need_atomic_barrier_p (enum memmodel model, bool pre)
{
switch (model)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
return false;
case MEMMODEL_RELEASE:
return pre;
case MEMMODEL_ACQUIRE:
return !pre;
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
return true;
default:
gcc_unreachable ();
}
}
#include "gt-emit-rtl.h"

2
gcc/emit-rtl.h
View File

@ -69,6 +69,8 @@ extern void set_reg_attrs_for_decl_rtl (tree t, rtx x);
extern void adjust_reg_mode (rtx, enum machine_mode);
extern int mem_expr_equal_p (const_tree, const_tree);
extern bool need_atomic_barrier_p (enum memmodel, bool);
/* Return the first insn of the current sequence or current function. */
static inline rtx