thumb.md (extendqisi2_insn): Cope with REG + OFFSET addressing.
* config/arm/thumb.md (extendqisi2_insn): Cope with REG + OFFSET addressing. From-SVN: r21862
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@ -484,7 +484,23 @@
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{
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ops[1] = XEXP (XEXP (operands[1], 0), 0);
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ops[2] = XEXP (XEXP (operands[1], 0), 1);
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output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops);
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if (GET_CODE (ops[1]) == REG && GET_CODE (ops[2]) == REG)
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output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops);
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else if (GET_CODE (ops[1]) == REG)
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{
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if (REGNO (ops[1]) == REGNO (operands[0]))
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output_asm_insn (\"ldrb\\t%0, [%1, %2]\;lsl\\t%0, %0, #24\;asr\\t%0, %0, #24\", ops);
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else
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output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
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}
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else
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{
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if (REGNO (ops[2]) == REGNO (operands[0]))
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output_asm_insn (\"ldrb\\t%0, [%2, %1]\;lsl\\t%0, %0, #24\;asr\\t%0, %0, #24\", ops);
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else
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output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
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}
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}
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else if (REGNO (operands[0]) == REGNO (XEXP (operands[1], 0)))
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{
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