diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f89575a4c84..3e92ee9aaa5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/predicates.md (indirect_branch_operand): Rewrite
+	ix86_indirect_branch_register logic.
+
 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* config/i386/constraints.md (Bs): Update
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index a502657f9e3..2f2393b9e3e 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -665,8 +665,8 @@
 ;; Test for a valid operand for indirect branch.
 (define_predicate "indirect_branch_operand"
   (ior (match_operand 0 "register_operand")
-       (and (not (match_test "TARGET_X32
-			      || ix86_indirect_branch_register"))
+       (and (not (match_test "ix86_indirect_branch_register"))
+	    (not (match_test "TARGET_X32"))
 	    (match_operand 0 "memory_operand"))))
 
 ;; Return true if OP is a memory operands that can be used in sibcalls.