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Replace gen_rtx (CONST_INT...) calls with GEN_INT calls

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From-SVN: r17879
This commit is contained in:
Michael Meissner 1998-02-12 17:18:51 +00:00 committed by Michael Meissner
parent 8bd6ecc280
commit 89e9f3a8a9
2 changed files with 42 additions and 37 deletions
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5
gcc/ChangeLog
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@ -1,4 +1,9 @@
Thu Feb 12 20:16:35 1998 Michael Meissner <meissner@cygnus.com>
* rs6000.md: Replace gen_rtx (CONST_INT,...) with GEN_INT.
Thu Feb 12 16:45:17 1998 Robert Lipe <robertl@dgii.com> Thu Feb 12 16:45:17 1998 Robert Lipe <robertl@dgii.com>
* expr.c (expand_assignment): Correct typo exposed by -Wall. * expr.c (expand_assignment): Correct typo exposed by -Wall.
offset should have been a truth value, not an assignment. offset should have been a truth value, not an assignment.

74
gcc/config/rs6000/rs6000.md
View File

@ -2119,8 +2119,8 @@
int start = INTVAL (operands[2]) & 31; int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31; int size = INTVAL (operands[1]) & 31;
operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - start - size); operands[4] = GEN_INT (32 - start - size);
operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }")
@ -2137,8 +2137,8 @@
int start = INTVAL (operands[2]) & 31; int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31; int size = INTVAL (operands[1]) & 31;
operands[4] = gen_rtx (CONST_INT, VOIDmode, shift - start - size); operands[4] = GEN_INT (shift - start - size);
operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }")
@ -2155,8 +2155,8 @@
int start = INTVAL (operands[2]) & 31; int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31; int size = INTVAL (operands[1]) & 31;
operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - shift - start - size); operands[4] = GEN_INT (32 - shift - start - size);
operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }")
@ -2173,8 +2173,8 @@
int start = INTVAL (operands[2]) & 31; int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31; int size = INTVAL (operands[1]) & 31;
operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - shift - start - size); operands[4] = GEN_INT (32 - shift - start - size);
operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }")
@ -2196,7 +2196,7 @@
/* Align extract field with insert field */ /* Align extract field with insert field */
operands[5] = gen_rtx (CONST_INT, VOIDmode, operands[5] = gen_rtx (CONST_INT, VOIDmode,
extract_start + extract_size - insert_start - insert_size); extract_start + extract_size - insert_start - insert_size);
operands[1] = gen_rtx (CONST_INT, VOIDmode, insert_start + insert_size - 1); operands[1] = GEN_INT (insert_start + insert_size - 1);
return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\";
}") }")
@ -2211,7 +2211,7 @@
int start = INTVAL (operands[2]) & 63; int start = INTVAL (operands[2]) & 63;
int size = INTVAL (operands[1]) & 63; int size = INTVAL (operands[1]) & 63;
operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - start - size); operands[2] = GEN_INT (64 - start - size);
return \"rldimi %0,%3,%H2,%H1\"; return \"rldimi %0,%3,%H2,%H1\";
}") }")
@ -2245,7 +2245,7 @@
if (start + size >= 32) if (start + size >= 32)
operands[3] = const0_rtx; operands[3] = const0_rtx;
else else
operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size); operands[3] = GEN_INT (start + size);
return \"{rlinm|rlwinm} %0,%1,%3,%s2,31\"; return \"{rlinm|rlwinm} %0,%1,%3,%s2,31\";
}") }")
@ -2282,7 +2282,7 @@
if (start + size >= 32) if (start + size >= 32)
operands[3] = const0_rtx; operands[3] = const0_rtx;
else else
operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size); operands[3] = GEN_INT (start + size);
return \"{rlinm.|rlwinm.} %4,%1,%3,%s2,31\"; return \"{rlinm.|rlwinm.} %4,%1,%3,%s2,31\";
}" }"
[(set_attr "type" "compare")]) [(set_attr "type" "compare")])
@ -2303,14 +2303,14 @@
if (start >= 16 && start + size == 32) if (start >= 16 && start + size == 32)
{ {
operands[3] = gen_rtx (CONST_INT, VOIDmode, (1 << (32 - start)) - 1); operands[3] = GEN_INT ((1 << (32 - start)) - 1);
return \"{andil.|andi.} %0,%1,%3\"; return \"{andil.|andi.} %0,%1,%3\";
} }
if (start + size >= 32) if (start + size >= 32)
operands[3] = const0_rtx; operands[3] = const0_rtx;
else else
operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size); operands[3] = GEN_INT (start + size);
return \"{rlinm.|rlwinm.} %0,%1,%3,%s2,31\"; return \"{rlinm.|rlwinm.} %0,%1,%3,%s2,31\";
}" }"
[(set_attr "type" "delayed_compare")]) [(set_attr "type" "delayed_compare")])
@ -2329,8 +2329,8 @@
if (start + size >= 64) if (start + size >= 64)
operands[3] = const0_rtx; operands[3] = const0_rtx;
else else
operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size); operands[3] = GEN_INT (start + size);
operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - size); operands[2] = GEN_INT (64 - size);
return \"rldicl %0,%1,%3,%2\"; return \"rldicl %0,%1,%3,%2\";
}") }")
@ -2350,8 +2350,8 @@
if (start + size >= 64) if (start + size >= 64)
operands[3] = const0_rtx; operands[3] = const0_rtx;
else else
operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size); operands[3] = GEN_INT (start + size);
operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - size); operands[2] = GEN_INT (64 - size);
return \"rldicl. %4,%1,%3,%2\"; return \"rldicl. %4,%1,%3,%2\";
}") }")
@ -2372,8 +2372,8 @@
if (start + size >= 64) if (start + size >= 64)
operands[3] = const0_rtx; operands[3] = const0_rtx;
else else
operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size); operands[3] = GEN_INT (start + size);
operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - size); operands[2] = GEN_INT (64 - size);
return \"rldicl. %0,%1,%3,%2\"; return \"rldicl. %0,%1,%3,%2\";
}") }")
@ -2752,7 +2752,7 @@
(subreg:QI (subreg:QI
(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) 0)))] (match_operand:SI 2 "const_int_operand" "i")) 0)))]
"includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))" "includes_rshift_p (operands[2], GEN_INT (255))"
"{rlinm|rlwinm} %0,%1,%s2,0xff") "{rlinm|rlwinm} %0,%1,%s2,0xff")
(define_insn "" (define_insn ""
@ -2764,7 +2764,7 @@
(match_operand:SI 2 "const_int_operand" "i")) 0)) (match_operand:SI 2 "const_int_operand" "i")) 0))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 3 "=r"))] (clobber (match_scratch:SI 3 "=r"))]
"includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))" "includes_rshift_p (operands[2], GEN_INT (255))"
"{rlinm.|rlwinm.} %3,%1,%s2,0xff" "{rlinm.|rlwinm.} %3,%1,%s2,0xff"
[(set_attr "type" "delayed_compare")]) [(set_attr "type" "delayed_compare")])
@ -2778,7 +2778,7 @@
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))] (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]
"includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))" "includes_rshift_p (operands[2], GEN_INT (255))"
"{rlinm.|rlwinm.} %0,%1,%s2,0xff" "{rlinm.|rlwinm.} %0,%1,%s2,0xff"
[(set_attr "type" "delayed_compare")]) [(set_attr "type" "delayed_compare")])
@ -2788,7 +2788,7 @@
(subreg:HI (subreg:HI
(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) 0)))] (match_operand:SI 2 "const_int_operand" "i")) 0)))]
"includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))" "includes_rshift_p (operands[2], GEN_INT (65535))"
"{rlinm|rlwinm} %0,%1,%s2,0xffff") "{rlinm|rlwinm} %0,%1,%s2,0xffff")
(define_insn "" (define_insn ""
@ -2800,7 +2800,7 @@
(match_operand:SI 2 "const_int_operand" "i")) 0)) (match_operand:SI 2 "const_int_operand" "i")) 0))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 3 "=r"))] (clobber (match_scratch:SI 3 "=r"))]
"includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))" "includes_rshift_p (operands[2], GEN_INT (65535))"
"{rlinm.|rlwinm.} %3,%1,%s2,0xffff" "{rlinm.|rlwinm.} %3,%1,%s2,0xffff"
[(set_attr "type" "delayed_compare")]) [(set_attr "type" "delayed_compare")])
@ -2814,7 +2814,7 @@
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))] (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]
"includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))" "includes_rshift_p (operands[2], GEN_INT (65535))"
"{rlinm.|rlwinm.} %0,%1,%s2,0xffff" "{rlinm.|rlwinm.} %0,%1,%s2,0xffff"
[(set_attr "type" "delayed_compare")]) [(set_attr "type" "delayed_compare")])
@ -4859,8 +4859,8 @@
second_c = orig | ~ first_c; second_c = orig | ~ first_c;
operands[3] = gen_rtx (CONST_INT, VOIDmode, first_c); operands[3] = GEN_INT (first_c);
operands[4] = gen_rtx (CONST_INT, VOIDmode, second_c); operands[4] = GEN_INT (second_c);
}") }")
(define_insn "iordi3" (define_insn "iordi3"
@ -4908,7 +4908,7 @@
{ {
operands[3] = gen_rtx (CONST_INT, VOIDmode, operands[3] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff)); INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff));
operands[4] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff); operands[4] = GEN_INT (INTVAL (operands[2]) & 0xffff);
}") }")
(define_insn "xordi3" (define_insn "xordi3"
@ -4956,7 +4956,7 @@
{ {
operands[3] = gen_rtx (CONST_INT, VOIDmode, operands[3] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[2]) & 0xffff0000); INTVAL (operands[2]) & 0xffff0000);
operands[4] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff); operands[4] = GEN_INT (INTVAL (operands[2]) & 0xffff);
}") }")
(define_insn "" (define_insn ""
@ -5355,7 +5355,7 @@
{ {
operands[2] = gen_rtx (CONST_INT, VOIDmode, operands[2] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[1]) & 0xffff0000); INTVAL (operands[1]) & 0xffff0000);
operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff); operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff);
}") }")
(define_insn "" (define_insn ""
@ -8095,8 +8095,8 @@
int sextc = (c << 16) >> 16; int sextc = (c << 16) >> 16;
int xorv = c ^ sextc; int xorv = c ^ sextc;
operands[4] = gen_rtx (CONST_INT, VOIDmode, xorv); operands[4] = GEN_INT (xorv);
operands[5] = gen_rtx (CONST_INT, VOIDmode, sextc); operands[5] = GEN_INT (sextc);
}") }")
(define_insn "" (define_insn ""
@ -8223,8 +8223,8 @@
else else
count = 32 - (put_bit - is_bit); count = 32 - (put_bit - is_bit);
operands[4] = gen_rtx (CONST_INT, VOIDmode, count); operands[4] = GEN_INT (count);
operands[5] = gen_rtx (CONST_INT, VOIDmode, put_bit); operands[5] = GEN_INT (put_bit);
return \"%D1mfcr %0\;{rlinm|rlwinm} %0,%0,%4,%5,%5\"; return \"%D1mfcr %0\;{rlinm|rlwinm} %0,%0,%4,%5,%5\";
}" }"
@ -8253,8 +8253,8 @@
else else
count = 32 - (put_bit - is_bit); count = 32 - (put_bit - is_bit);
operands[5] = gen_rtx (CONST_INT, VOIDmode, count); operands[5] = GEN_INT (count);
operands[6] = gen_rtx (CONST_INT, VOIDmode, put_bit); operands[6] = GEN_INT (put_bit);
return \"%D1mfcr %4\;{rlinm.|rlwinm.} %4,%4,%5,%6,%6\"; return \"%D1mfcr %4\;{rlinm.|rlwinm.} %4,%4,%5,%6,%6\";
}" }"