diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a32c59a869..4dfa7c2cf78 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-05-23 Tom de Vries + + * doc/sourcebuild.texi (Effective-Target Keywords, Other hardware + attributes): Sort alphabetically. + 2017-05-23 Georg-Johann Lay * config/avr/genmultilib.awk: Use gsub instead of gensub. diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 84d9a22ccf7..01d705a9fea 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1826,6 +1826,7 @@ PowerPC target supports executing VSX instructions (ISA 2.06). @subsubsection Other hardware attributes +@c Please keep this table sorted alphabetically. @table @code @item avx Target supports compiling @code{avx} instructions. @@ -1839,12 +1840,21 @@ Test system can execute AltiVec and Cell PPU instructions. @item coldfire_fpu Target uses a ColdFire FPU. +@item divmod +Target supporting hardware divmod insn or divmod libcall. + +@item divmod_simode +Target supporting hardware divmod insn or divmod libcall for SImode. + @item hard_float Target supports FPU instructions. @item non_strict_align Target does not require strict alignment. +@item pie_copyreloc +The x86-64 target linker supports PIE with copy reloc. + @item sqrt_insn Target has a square root instruction that the compiler can generate. @@ -1874,15 +1884,6 @@ or @code{EM_SPARCV9} executables. @item vect_cmdline_needed Target requires a command line argument to enable a SIMD instruction set. -@item pie_copyreloc -The x86-64 target linker supports PIE with copy reloc. - -@item divmod -Target supporting hardware divmod insn or divmod libcall. - -@item divmod_simode -Target supporting hardware divmod insn or divmod libcall for SImode. - @end table @subsubsection Environment attributes