diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index df4231e93ec..737dbba33fa 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2008-03-20 Victor Kaplansky + Uros Bizjak + + PR testsuite/34168 + * lib/target-supports.exp (check_sse2_hw_available): New procedure. + * gcc.dg/vect/vect.exp: Set dg-do-what-default to "compile" + if SSE2 hardware is not available. + * g++.dg/vect/vect.exp: Update target-dependent overrides to match + gcc.dg/vect/vect.exp. + * gfortran.dg/vect/vect.exp: Ditto. + (check_effective_target_lp64_or_vect_no_align): Remove procedure. + 2008-03-20 Andreas Schwab * gcc.dg/cpp/cmdlne-dD-M.c: Fix test for makefile rule and remove diff --git a/gcc/testsuite/g++.dg/vect/vect.exp b/gcc/testsuite/g++.dg/vect/vect.exp index 05964c64615..f3db0368ef7 100644 --- a/gcc/testsuite/g++.dg/vect/vect.exp +++ b/gcc/testsuite/g++.dg/vect/vect.exp @@ -45,7 +45,14 @@ lappend DEFAULT_VECTCFLAGS "-O2" "-ftree-vectorize" "-fno-vect-cost-model" \ # Skip these tests for targets that do not support generating vector # code. Set additional target-dependent vector flags, which can be # overridden by using dg-options in individual tests. -if [istarget "powerpc*-*-*"] { +if [istarget "powerpc-*paired*"] { + lappend DEFAULT_VECTCFLAGS "-mpaired" + if [check_750cl_hw_available] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } +} elseif [istarget "powerpc*-*-*"] { # Skip targets not supporting -maltivec. if ![is-effective-target powerpc_altivec_ok] { return @@ -53,19 +60,23 @@ if [istarget "powerpc*-*-*"] { lappend DEFAULT_VECTCFLAGS "-maltivec" if [check_vmx_hw_available] { - set dg-do-what-default run + set dg-do-what-default run } else { - if [is-effective-target ilp32] { - # Specify a cpu that supports VMX for compile-only tests. - lappend DEFAULT_VECTCFLAGS "-mcpu=7400" - } - set dg-do-what-default compile + if [is-effective-target ilp32] { + # Specify a cpu that supports VMX for compile-only tests. + lappend DEFAULT_VECTCFLAGS "-mcpu=970" + } + set dg-do-what-default compile } } elseif { [istarget "spu-*-*"] } { set dg-do-what-default run } elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } { lappend DEFAULT_VECTCFLAGS "-msse2" - set dg-do-what-default run + if [check_sse2_hw_available] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } elseif { [istarget "mips*-*-*"] && [check_effective_target_mpaired_single] && [check_effective_target_nomips16] } { @@ -73,21 +84,37 @@ if [istarget "powerpc*-*-*"] { set dg-do-what-default run } elseif [istarget "sparc*-*-*"] { lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis" - set dg-do-what-default run + if [check_effective_target_ultrasparc_hw] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } elseif [istarget "alpha*-*-*"] { + # Alpha's vectorization capabilities are extremely limited. + # It's more effort than its worth disabling all of the tests + # that it cannot pass. But if you actually want to see what + # does work, command out the return. + return + lappend DEFAULT_VECTCFLAGS "-mmax" if [check_alpha_max_hw_available] { - set dg-do-what-default run + set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default compile } } elseif [istarget "ia64-*-*"] { set dg-do-what-default run +} elseif [is-effective-target arm_neon_ok] { + lappend DEFAULT_VECTCFLAGS "-mfpu=neon" "-mfloat-abi=softfp" + if [is-effective-target arm_neon_hw] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } else { return } - # Initialize `dg'. dg-init diff --git a/gcc/testsuite/gcc.dg/vect/vect.exp b/gcc/testsuite/gcc.dg/vect/vect.exp index 04fbc0178d9..18877095fa9 100644 --- a/gcc/testsuite/gcc.dg/vect/vect.exp +++ b/gcc/testsuite/gcc.dg/vect/vect.exp @@ -63,7 +63,11 @@ if [istarget "powerpc-*paired*"] { set dg-do-what-default run } elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } { lappend DEFAULT_VECTCFLAGS "-msse2" - set dg-do-what-default run + if [check_sse2_hw_available] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } elseif { [istarget "mips*-*-*"] && [check_effective_target_mpaired_single] && [check_effective_target_nomips16] } { diff --git a/gcc/testsuite/gfortran.dg/vect/vect.exp b/gcc/testsuite/gfortran.dg/vect/vect.exp index 9f91434a702..518b6850b6a 100644 --- a/gcc/testsuite/gfortran.dg/vect/vect.exp +++ b/gcc/testsuite/gfortran.dg/vect/vect.exp @@ -38,8 +38,18 @@ set save-dg-do-what-default ${dg-do-what-default} # Skip these tests for targets that do not support generating vector # code. Set additional target-dependent vector flags, which can be # overridden by using dg-options in individual tests. -if [istarget "powerpc*-*-*"] { - # If there are powerpc targets to skip, do it here. +if [istarget "powerpc-*paired*"] { + lappend DEFAULT_VECTCFLAGS "-mpaired" + if [check_750cl_hw_available] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } +} elseif [istarget "powerpc*-*-*"] { + # Skip targets not supporting -maltivec. + if ![is-effective-target powerpc_altivec_ok] { + return + } lappend DEFAULT_VECTCFLAGS "-maltivec" if [check_vmx_hw_available] { @@ -47,20 +57,38 @@ if [istarget "powerpc*-*-*"] { } else { if [is-effective-target ilp32] { # Specify a cpu that supports VMX for compile-only tests. - lappend DEFAULT_VECTCFLAGS "-mcpu=7400" + lappend DEFAULT_VECTCFLAGS "-mcpu=970" } set dg-do-what-default compile } +} elseif { [istarget "spu-*-*"] } { + set dg-do-what-default run } elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } { lappend DEFAULT_VECTCFLAGS "-msse2" - set dg-do-what-default run -} elseif [istarget "mipsisa64*-*-*"] { + if [check_sse2_hw_available] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } +} elseif { [istarget "mips*-*-*"] + && [check_effective_target_mpaired_single] + && [check_effective_target_nomips16] } { lappend DEFAULT_VECTCFLAGS "-mpaired-single" set dg-do-what-default run } elseif [istarget "sparc*-*-*"] { lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis" - set dg-do-what-default run + if [check_effective_target_ultrasparc_hw] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } elseif [istarget "alpha*-*-*"] { + # Alpha's vectorization capabilities are extremely limited. + # It's more effort than its worth disabling all of the tests + # that it cannot pass. But if you actually want to see what + # does work, command out the return. + return + lappend DEFAULT_VECTCFLAGS "-mmax" if [check_alpha_max_hw_available] { set dg-do-what-default run @@ -69,23 +97,17 @@ if [istarget "powerpc*-*-*"] { } } elseif [istarget "ia64-*-*"] { set dg-do-what-default run +} elseif [is-effective-target arm_neon_ok] { + lappend DEFAULT_VECTCFLAGS "-mfpu=neon" "-mfloat-abi=softfp" + if [is-effective-target arm_neon_hw] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } else { return } -# Return 1 if the effective target is LP64 or if the effective target -# does not support a vector alignment mechanism. - -proc check_effective_target_lp64_or_vect_no_align { } { - if { [is-effective-target lp64] - || [is-effective-target vect_no_align] } { - set answer 1 - } else { - set answer 0 - } - return $answer -} - # Initialize `dg'. dg-init diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index e2667ff9417..2d50643485b 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -764,6 +764,29 @@ proc check_750cl_hw_available { } { }] } +# Return 1 if the target supports executing SSE2 instructions, 0 +# otherwise. Cache the result. + +proc check_sse2_hw_available { } { + return [check_cached_effective_target sse2_hw_available { + # If this is not the right target then we can skip the test. + if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } { + expr 0 + } else { + check_runtime_nocache sse2_hw_available { + #include "cpuid.h" + int main () + { + unsigned int eax, ebx, ecx, edx = 0; + if (__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return !(edx & bit_SSE2); + return 1; + } + } "" + } + }] +} + # Return 1 if the target supports executing AltiVec instructions, 0 # otherwise. Cache the result.