diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 57f5bb4a8e3..a9dc717b294 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gcc.target/i386/avx256-unaligned-load-1.c: Update load scan.
+
 2016-04-20  Bin Cheng  <bin.cheng@arm.com>
 
 	PR tree-optimization/69489
diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
index 0c476cd78f2..68378a556fb 100644
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "(avx_loadups256|vmovups\[^\n\r]*movv8sf_internal)" } } */
-/* { dg-final { scan-assembler "(sse_loadups|movv4sf_internal)" } } */
+/* { dg-final { scan-assembler-not "vmovups\[^\n\r]*movv8sf_internal/2" } } */
+/* { dg-final { scan-assembler "movv4sf_internal/2" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */