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re PR target/30970 (Register zeroing by xor N,N should be moved out of loop) 

PR target/30970
        * config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
        *movv2df_internal): Enable pattern only for valid operand
        combinations.
        * config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
        tie only 128bit modes. For MMX registers, tie only 64bit modes.

testsuite/ChangeLog:

	PR target/30970
	* gcc.target/i386/gfortran.dg/pr30970.c: New test.

From-SVN: r122387
This commit is contained in:
Uros Bizjak 2007-02-27 22:27:27 +01:00 committed by Uros Bizjak
parent 3b41414683
commit 8ab9333261
5 changed files with 44 additions and 7 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2007-02-27 Uros Bizjak <ubizjak@gmail.com>
PR target/30970
* config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
*movv2df_internal): Enable pattern only for valid operand
combinations.
* config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
tie only 128bit modes. For MMX registers, tie only 64bit modes.
2007-02-27 Mike Stump <mrs@apple.com>
* config/darwin-crt3.c: Avoid compilation when compiling for a

10
gcc/config/i386/i386.c
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@ -18783,15 +18783,17 @@ ix86_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
/* If MODE2 is only appropriate for an SSE register, then tie with
any other mode acceptable to SSE registers. */
if (GET_MODE_SIZE (mode2) >= 8
if (GET_MODE_SIZE (mode2) == 16
&& ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode2))
return ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode1);
return (GET_MODE_SIZE (mode1) == 16
&& ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode1));
/* If MODE2 is appropriate for an MMX (or SSE) register, then tie
/* If MODE2 is appropriate for an MMX register, then tie
with any other mode acceptable to MMX registers. */
if (GET_MODE_SIZE (mode2) == 8
&& ix86_hard_regno_mode_ok (FIRST_MMX_REG, mode2))
return ix86_hard_regno_mode_ok (FIRST_MMX_REG, mode1);
return (GET_MODE_SIZE (mode2) == 8
&& ix86_hard_regno_mode_ok (FIRST_MMX_REG, mode1));
return false;
}

12
gcc/config/i386/sse.md
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@ -60,7 +60,9 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:SSEMODEI 0 "nonimmediate_operand" "=x,x ,m")
(match_operand:SSEMODEI 1 "nonimmediate_or_sse_const_operand" "C ,xm,x"))]
"TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"TARGET_SSE
&& (register_operand (operands[0], <MODE>mode)
|| register_operand (operands[1], <MODE>mode))"
{
switch (which_alternative)
{
@ -140,7 +142,9 @@
(define_insn "*movv4sf_internal"
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m")
(match_operand:V4SF 1 "nonimmediate_or_sse_const_operand" "C,xm,x"))]
"TARGET_SSE"
"TARGET_SSE
&& (register_operand (operands[0], V4SFmode)
|| register_operand (operands[1], V4SFmode))"
{
switch (which_alternative)
{
@ -182,7 +186,9 @@
(define_insn "*movv2df_internal"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,m")
(match_operand:V2DF 1 "nonimmediate_or_sse_const_operand" "C,xm,x"))]
"TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"TARGET_SSE
&& (register_operand (operands[0], V2DFmode)
|| register_operand (operands[1], V2DFmode))"
{
switch (which_alternative)
{

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2007-02-27 Uros Bizjak <ubizjak@gmail.com>
PR target/30970
* gcc.target/i386/gfortran.dg/pr30970.c: New test.
2007-02-27 Mark Mitchell <mark@codesourcery.com>
* lib/target-supports.exp (check_effective_target_init_priority):

15
gcc/testsuite/gcc.target/i386/pr30970.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do compile { target i?86-*-* x86_64-*-* } }
/* { dg-options "-msse2 -O2 -ftree-vectorize" } */
#define N 256
int b[N];
void test()
{
int i;
for (i = 0; i < N; i++)
b[i] = 0;
}
/* { dg-final { scan-assembler-times "pxor" 1 } } */