rs6000.c (rs6000_expand_vec_perm_const_1): Remove correction for little endian...

2014-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Remove
	correction for little endian...
	* config/rs6000/vsx.md (vsx_xxpermdi2_<mode>_1): ...and move it to
	here.

From-SVN: r207062
This commit is contained in:
Bill Schmidt 2014-01-24 21:32:38 +00:00 committed by William Schmidt
parent 3d75049621
commit 8adcc78b5f
3 changed files with 32 additions and 18 deletions

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@ -1,3 +1,10 @@
2014-01-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Remove
correction for little endian...
* config/rs6000/vsx.md (vsx_xxpermdi2_<mode>_1): ...and move it to
here.
2014-01-24 Jeff Law <law@redhat.com>
PR tree-optimization/59919

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@ -30140,22 +30140,6 @@ rs6000_expand_vec_perm_const_1 (rtx target, rtx op0, rtx op1,
vmode = GET_MODE (target);
gcc_assert (GET_MODE_NUNITS (vmode) == 2);
dmode = mode_for_vector (GET_MODE_INNER (vmode), 4);
/* For little endian, swap operands and invert/swap selectors
to get the correct xxpermdi. The operand swap sets up the
inputs as a little endian array. The selectors are swapped
because they are defined to use big endian ordering. The
selectors are inverted to get the correct doublewords for
little endian ordering. */
if (!BYTES_BIG_ENDIAN)
{
int n;
perm0 = 3 - perm0;
perm1 = 3 - perm1;
n = perm0, perm0 = perm1, perm1 = n;
x = op0, op0 = op1, op1 = x;
}
x = gen_rtx_VEC_CONCAT (dmode, op0, op1);
v = gen_rtvec (2, GEN_INT (perm0), GEN_INT (perm1));
x = gen_rtx_VEC_SELECT (vmode, x, gen_rtx_PARALLEL (VOIDmode, v));

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@ -1634,9 +1634,32 @@
(match_operand 4 "const_2_to_3_operand" "")])))]
"VECTOR_MEM_VSX_P (<MODE>mode)"
{
int mask = (INTVAL (operands[3]) << 1) | (INTVAL (operands[4]) - 2);
int op3, op4, mask;
/* For little endian, swap operands and invert/swap selectors
to get the correct xxpermdi. The operand swap sets up the
inputs as a little endian array. The selectors are swapped
because they are defined to use big endian ordering. The
selectors are inverted to get the correct doublewords for
little endian ordering. */
if (BYTES_BIG_ENDIAN)
{
op3 = INTVAL (operands[3]);
op4 = INTVAL (operands[4]);
}
else
{
op3 = 3 - INTVAL (operands[4]);
op4 = 3 - INTVAL (operands[3]);
}
mask = (op3 << 1) | (op4 - 2);
operands[3] = GEN_INT (mask);
return "xxpermdi %x0,%x1,%x2,%3";
if (BYTES_BIG_ENDIAN)
return "xxpermdi %x0,%x1,%x2,%3";
else
return "xxpermdi %x0,%x2,%x1,%3";
}
[(set_attr "type" "vecperm")])