m68k-linux: Implement atomic operations via syscall.
libgcc/ * config/m68k/linux.h (TARGET_INIT_LIBFUNCS): New. * config/m68k/m68k.c (m68k_init_sync_libfuncs): New. gcc/ * config/m68k/linux-atomic.c: New file. * config/m68k/t-linux: New file. * config.host (m68k-uclinux, m68k-linux): Use it. From-SVN: r181746
This commit is contained in:
Richard Henderson
Richard Henderson
parent
84ec53b6ac
commit
8b281334a0
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@ -1,3 +1,8 @@
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2011-11-26 Richard Henderson <rth@redhat.com>
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* config/m68k/linux.h (TARGET_INIT_LIBFUNCS): New.
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* config/m68k/m68k.c (m68k_init_sync_libfuncs): New.
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2011-11-26 Nathan Sidwell <nathan@acm.org>
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PR gcov-profile/51297
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@ -235,3 +235,7 @@ along with GCC; see the file COPYING3. If not see
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#undef WCHAR_TYPE_SIZE
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#define WCHAR_TYPE_SIZE BITS_PER_WORD
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/* Install the __sync libcalls. */
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#undef TARGET_INIT_LIBFUNCS
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#define TARGET_INIT_LIBFUNCS m68k_init_sync_libfuncs
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@ -47,6 +47,7 @@ along with GCC; see the file COPYING3. If not see
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#include "insn-codes.h"
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#include "ggc.h"
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#include "opts.h"
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#include "optabs.h"
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enum reg_class regno_reg_class[] =
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{
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@ -164,6 +165,7 @@ static rtx m68k_function_arg (cumulative_args_t, enum machine_mode,
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const_tree, bool);
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static bool m68k_cannot_force_const_mem (enum machine_mode mode, rtx x);
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static bool m68k_output_addr_const_extra (FILE *, rtx);
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static void m68k_init_sync_libfuncs (void) ATTRIBUTE_UNUSED;
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/* Initialize the GCC target structure. */
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@ -6524,4 +6526,10 @@ m68k_conditional_register_usage (void)
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fixed_regs[PIC_REG] = call_used_regs[PIC_REG] = 1;
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}
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static void
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m68k_init_sync_libfuncs (void)
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{
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init_sync_libfuncs (UNITS_PER_WORD);
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}
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#include "gt-m68k.h"
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@ -1,3 +1,9 @@
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2011-11-26 Richard Henderson <rth@redhat.com>
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* config/m68k/linux-atomic.c: New file.
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* config/m68k/t-linux: New file.
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* config.host (m68k-uclinux, m68k-linux): Use it.
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2011-11-26 Richard Henderson <rth@redhat.com>
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* crtstuff.c (__TMC_LIST__): Mark used not unused.
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@ -701,14 +701,14 @@ m68k*-*-netbsdelf*)
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;;
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m68k*-*-openbsd*)
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;;
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m68k-*-uclinux*) # Motorola m68k/ColdFire running uClinux with uClibc
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tmake_file="$tmake_file m68k/t-floatlib"
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m68k-*-uclinux*) # Motorola m68k/ColdFire running uClinux with uClibc
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tmake_file="$tmake_file m68k/t-floatlib m68k/t-linux"
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md_unwind_header=m68k/linux-unwind.h
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;;
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m68k-*-linux*) # Motorola m68k's running GNU/Linux
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# with ELF format using glibc 2
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# aka the GNU/Linux C library 6.
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tmake_file="$tmake_file m68k/t-floatlib"
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tmake_file="$tmake_file m68k/t-floatlib m68k/t-linux"
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# If not configured with --enable-sjlj-exceptions, bump the
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# libgcc version number.
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if test x$enable_sjlj_exceptions != xyes; then
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@ -0,0 +1,211 @@
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/* Linux-specific atomic operations for m68k Linux.
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Copyright (C) 2011 Free Software Foundation, Inc.
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Based on code contributed by CodeSourcery for ARM EABI Linux.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Coldfire dropped the CAS instruction from the base M68K ISA.
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GCC automatically issues a asm memory barrier when it encounters
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a __sync_synchronize builtin. Thus, we do not need to define this
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builtin.
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We implement byte, short and int versions of each atomic operation
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using the kernel helper defined below. There is no support for
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64-bit operations yet. */
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#include <asm/unistd.h>
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#include <stdbool.h>
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#ifndef __NR_atomic_cmpxchg_32
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#define __NR_atomic_cmpxchg_32 335
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#endif
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/* Kernel helper for compare-and-exchange a 32-bit value. */
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static inline unsigned
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__kernel_cmpxchg (unsigned *mem, unsigned oldval, unsigned newval)
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{
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register unsigned *a0 asm("a0") = mem;
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register unsigned d2 asm("d2") = oldval;
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register unsigned d1 asm("d1") = newval;
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register unsigned d0 asm("d0") = __NR_atomic_cmpxchg_32;
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asm volatile ("trap #0"
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: "=r"(d0), "=r"(d1), "=r"(a0)
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: "r"(d0), "r"(d1), "r"(d2), "r"(a0)
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: "memory", "a1");
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return d0;
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}
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#define HIDDEN __attribute__ ((visibility ("hidden")))
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/* Big endian masks */
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#define INVERT_MASK_1 24
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#define INVERT_MASK_2 16
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#define MASK_1 0xffu
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#define MASK_2 0xffffu
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#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
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#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
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#define WORD_SYNC_OP(OP, PFX_OP, INF_OP, RETURN) \
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unsigned HIDDEN \
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NAME##_##RETURN (OP, 4) (unsigned *ptr, unsigned val) \
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{ \
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unsigned oldval, newval, cmpval = *ptr; \
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\
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do { \
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oldval = cmpval; \
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newval = PFX_OP (oldval INF_OP val); \
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cmpval = __kernel_cmpxchg (ptr, oldval, newval); \
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} while (__builtin_expect (oldval != cmpval, 0)); \
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\
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return RETURN; \
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}
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#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN) \
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TYPE HIDDEN \
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NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE sval) \
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{ \
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unsigned *wordptr = (unsigned *) ((unsigned long) ptr & ~3); \
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unsigned int mask, shift, oldval, newval, cmpval, wval; \
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\
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shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \
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mask = MASK_##WIDTH << shift; \
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wval = (sval & MASK_##WIDTH) << shift; \
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\
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cmpval = *wordptr; \
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do { \
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oldval = cmpval; \
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newval = PFX_OP (oldval INF_OP wval); \
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newval = (newval & mask) | (oldval & ~mask); \
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cmpval = __kernel_cmpxchg (wordptr, oldval, newval); \
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} while (__builtin_expect (oldval != cmpval, 0)); \
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\
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return (RETURN >> shift) & MASK_##WIDTH; \
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}
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WORD_SYNC_OP (add, , +, oldval)
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WORD_SYNC_OP (sub, , -, oldval)
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WORD_SYNC_OP (or, , |, oldval)
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WORD_SYNC_OP (and, , &, oldval)
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WORD_SYNC_OP (xor, , ^, oldval)
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WORD_SYNC_OP (nand, ~, &, oldval)
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SUBWORD_SYNC_OP (add, , +, unsigned short, 2, oldval)
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SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, oldval)
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SUBWORD_SYNC_OP (or, , |, unsigned short, 2, oldval)
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SUBWORD_SYNC_OP (and, , &, unsigned short, 2, oldval)
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SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, oldval)
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SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval)
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SUBWORD_SYNC_OP (add, , +, unsigned char, 1, oldval)
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SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, oldval)
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SUBWORD_SYNC_OP (or, , |, unsigned char, 1, oldval)
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SUBWORD_SYNC_OP (and, , &, unsigned char, 1, oldval)
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SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, oldval)
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SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval)
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WORD_SYNC_OP (add, , +, newval)
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WORD_SYNC_OP (sub, , -, newval)
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WORD_SYNC_OP (or, , |, newval)
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WORD_SYNC_OP (and, , &, newval)
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WORD_SYNC_OP (xor, , ^, newval)
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WORD_SYNC_OP (nand, ~, &, newval)
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SUBWORD_SYNC_OP (add, , +, unsigned short, 2, newval)
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SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, newval)
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SUBWORD_SYNC_OP (or, , |, unsigned short, 2, newval)
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SUBWORD_SYNC_OP (and, , &, unsigned short, 2, newval)
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SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, newval)
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SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval)
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SUBWORD_SYNC_OP (add, , +, unsigned char, 1, newval)
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SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, newval)
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SUBWORD_SYNC_OP (or, , |, unsigned char, 1, newval)
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SUBWORD_SYNC_OP (and, , &, unsigned char, 1, newval)
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SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, newval)
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SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval)
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unsigned HIDDEN
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__sync_val_compare_and_swap_4 (unsigned *ptr, unsigned oldval, unsigned newval)
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{
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return __kernel_cmpxchg (ptr, oldval, newval);
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}
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bool HIDDEN
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__sync_bool_compare_and_swap_4 (unsigned *ptr, unsigned oldval,
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unsigned newval)
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{
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return __kernel_cmpxchg (ptr, oldval, newval) == oldval;
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}
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#define SUBWORD_VAL_CAS(TYPE, WIDTH) \
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TYPE HIDDEN \
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__sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE soldval, \
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TYPE snewval) \
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{ \
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unsigned *wordptr = (unsigned *)((unsigned long) ptr & ~3); \
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unsigned int mask, shift, woldval, wnewval; \
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unsigned oldval, newval, cmpval; \
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\
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shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \
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mask = MASK_##WIDTH << shift; \
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woldval = (soldval & MASK_##WIDTH) << shift; \
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wnewval = (snewval & MASK_##WIDTH) << shift; \
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cmpval = *wordptr; \
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\
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do { \
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oldval = cmpval; \
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if ((oldval & mask) != woldval) \
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break; \
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newval = (oldval & ~mask) | wnewval; \
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cmpval = __kernel_cmpxchg (wordptr, oldval, newval); \
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} while (__builtin_expect (oldval != cmpval, 0)); \
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\
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return (oldval >> shift) & MASK_##WIDTH; \
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}
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SUBWORD_VAL_CAS (unsigned short, 2)
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SUBWORD_VAL_CAS (unsigned char, 1)
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#define SUBWORD_BOOL_CAS(TYPE, WIDTH) \
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bool HIDDEN \
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__sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval, \
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TYPE newval) \
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{ \
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return (__sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval) \
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== oldval); \
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}
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SUBWORD_BOOL_CAS (unsigned short, 2)
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SUBWORD_BOOL_CAS (unsigned char, 1)
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#undef NAME_oldval
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#define NAME_oldval(OP, WIDTH) __sync_lock_##OP##_##WIDTH
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#define COMMA ,
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WORD_SYNC_OP (test_and_set, , COMMA, oldval)
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SUBWORD_SYNC_OP (test_and_set, , COMMA, unsigned short, 1, oldval)
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SUBWORD_SYNC_OP (test_and_set, , COMMA, unsigned short, 2, oldval)
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@ -0,0 +1 @@
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LIB2ADD_ST = $(srcdir)/config/m68k/linux-atomic.c
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