rs6000: MMA built-in dies with incorrect sharing of tree nodes error
When we expand our MMA built-ins into gimple, we erroneously reused the accumulator memory reference for both the source input value as well as the destination output value. This led to a tree sharing error. The solution is to create separate memory references for the input and output values. 2020-09-01 Peter Bergner <bergner@linux.ibm.com> gcc/ PR target/96808 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Do not reuse accumulator memory reference for source and destination accesses. gcc/testsuite/ PR target/96808 * gcc.target/powerpc/pr96808.c: New test.
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@ -11471,12 +11471,8 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
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/* Convert this built-in into an internal version that uses pass-by-value
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arguments. The internal built-in follows immediately after this one. */
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new_decl = rs6000_builtin_decls[fncode + 1];
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tree lhs, mem, op[MAX_MMA_OPERANDS];
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tree lhs, op[MAX_MMA_OPERANDS];
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tree acc = gimple_call_arg (stmt, 0);
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if (TREE_CODE (acc) == PARM_DECL)
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mem = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (acc)), acc);
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else
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mem = build_simple_mem_ref (acc);
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push_gimplify_context (true);
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if ((attr & RS6000_BTC_QUAD) != 0)
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@ -11486,7 +11482,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
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op[0] = make_ssa_name (vector_quad_type_node);
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for (unsigned i = 1; i < nopnds; i++)
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op[i] = gimple_call_arg (stmt, i);
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gimplify_assign (op[0], mem, &new_seq);
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gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq);
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}
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else
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{
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@ -11536,7 +11532,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
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lhs = make_ssa_name (vector_quad_type_node);
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gimple_call_set_lhs (new_call, lhs);
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gimple_seq_add_stmt (&new_seq, new_call);
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gimplify_assign (mem, lhs, &new_seq);
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gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq);
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pop_gimplify_context (NULL);
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gsi_replace_with_seq (gsi, new_seq, true);
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59
gcc/testsuite/gcc.target/powerpc/pr96808.c
Normal file
59
gcc/testsuite/gcc.target/powerpc/pr96808.c
Normal file
@ -0,0 +1,59 @@
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/* PR target/96808 */
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/* { dg-do compile } */
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/* { dg-require-effective-target power10_ok } */
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/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
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/* Verify we do not ICE on the tests below. */
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void
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old_ok (__vector_quad *dst, vector unsigned char vc)
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{
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__vector_quad vq;
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__builtin_mma_xxsetaccz(&vq);
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__builtin_mma_xvf32gerpp(&vq, vc, vc);
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*dst = vq;
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}
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void
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test0 (__vector_quad *dst, vector unsigned char vc)
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{
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__vector_quad vq[2];
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__builtin_mma_xxsetaccz(&vq[1]);
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__builtin_mma_xvf32gerpp(&vq[1], vc, vc);
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*dst = vq[1];
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}
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void
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test1 (__vector_quad *dst, vector unsigned char vc)
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{
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__vector_quad vq[2][2];
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__builtin_mma_xxsetaccz(&vq[1][1]);
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__builtin_mma_xvf32gerpp(&vq[1][1], vc, vc);
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*dst = vq[1][1];
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}
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void
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test2 (__vector_quad *dst, vector unsigned char vc)
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{
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struct {
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__vector_quad dummy;
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__vector_quad acc;
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} vq;
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__builtin_mma_xxsetaccz(&vq.acc);
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__builtin_mma_xvf32gerpp(&vq.acc, vc, vc);
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*dst = vq.acc;
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}
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void
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test3 (__vector_quad *dst, vector unsigned char vc)
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{
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__builtin_mma_xxsetaccz(&dst[1]);
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__builtin_mma_xvf32gerpp(&dst[1], vc, vc);
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}
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void
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test4 (__vector_quad *dst[], vector unsigned char vc)
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{
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__builtin_mma_xxsetaccz(&dst[1][2]);
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__builtin_mma_xvf32gerpp(&dst[1][2], vc, vc);
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}
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