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MSP430: Support a memory operand for op1 of andneghi3

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This fixes an ICE caused by an unrecognizeable insn generated when
compiling gcc.c-torture/execute/pr97386-1.c at -O0.

gcc/ChangeLog:

	* config/msp430/msp430.md (andneghi3): Allow general operand for
	op1 and update output assembler template.
This commit is contained in:
Jozef Lawrynowicz 2020-10-20 11:26:20 +01:00
parent b3032d1b84
commit 8c3846e802
1 changed files with 2 additions and 2 deletions
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4
gcc/config/msp430/msp430.md
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@ -1346,12 +1346,12 @@
;; instructions, so we provide a pattern to support it here.
(define_insn "andneghi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(and:HI (neg:HI (match_operand:HI 1 "register_operand" "r"))
(and:HI (neg:HI (match_operand:HI 1 "general_operand" "rm"))
(match_operand 2 "immediate_operand" "n")))]
""
"*
if (REGNO (operands[0]) != REGNO (operands[1]))
return \"MOV.W\t%1, %0 { INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\";
return \"MOV%X1.W\t%1, %0 { INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\";
else
return \"INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\";
"