re PR rtl-optimization/67609 (Generates wrong code for SSE2 _mm_load_pd)
2015-10-20 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/67609 * lra-splill.c (lra_final_code_change): Don't remove all sub-registers. 2015-10-20 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/67609 * gcc.target/i386/pr67609.c: New. From-SVN: r229087
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2015-10-20 Vladimir Makarov <vmakarov@redhat.com>
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PR rtl-optimization/67609
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* lra-splill.c (lra_final_code_change): Don't remove all
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sub-registers.
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2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* simplify-rtx.c (simplify_binary_operation): If either operand was
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* simplify-rtx.c (simplify_binary_operation): If either operand was
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@ -727,14 +727,44 @@ lra_final_code_change (void)
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lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
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lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
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struct lra_static_insn_data *static_id = id->insn_static_data;
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struct lra_static_insn_data *static_id = id->insn_static_data;
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bool insn_change_p = false;
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bool insn_change_p = false;
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for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
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for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
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if ((DEBUG_INSN_P (insn) || ! static_id->operand[i].is_operator)
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{
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&& alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
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if (! DEBUG_INSN_P (insn) && static_id->operand[i].is_operator)
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{
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continue;
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lra_update_dup (id, i);
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insn_change_p = true;
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rtx op = *id->operand_loc[i];
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}
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if (static_id->operand[i].type == OP_OUT
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&& GET_CODE (op) == SUBREG && REG_P (SUBREG_REG (op))
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&& ! LRA_SUBREG_P (op))
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{
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hard_regno = REGNO (SUBREG_REG (op));
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/* We can not always remove sub-registers of
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hard-registers as we may lose information that
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only a part of registers is changed and
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subsequent optimizations may do wrong
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transformations (e.g. dead code eliminations).
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We can not also keep all sub-registers as the
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subsequent optimizations can not handle all such
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cases. Here is a compromise which works. */
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if ((GET_MODE_SIZE (GET_MODE (op))
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< GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
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&& (hard_regno_nregs[hard_regno][GET_MODE (SUBREG_REG (op))]
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== hard_regno_nregs[hard_regno][GET_MODE (op)])
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#ifdef STACK_REGS
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&& (hard_regno < FIRST_STACK_REG
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|| hard_regno > LAST_STACK_REG)
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#endif
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)
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continue;
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}
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if (alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
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{
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lra_update_dup (id, i);
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insn_change_p = true;
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}
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}
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if (insn_change_p)
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if (insn_change_p)
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lra_update_operator_dups (id);
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lra_update_operator_dups (id);
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}
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}
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@ -1,3 +1,8 @@
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2015-10-20 Vladimir Makarov <vmakarov@redhat.com>
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PR rtl-optimization/67609
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* gcc.target/i386/pr67609.c: New.
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2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* gcc.target/aarch64/fmul_fcvt_1.c: Add multiply-by-32 cases.
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* gcc.target/aarch64/fmul_fcvt_1.c: Add multiply-by-32 cases.
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@ -0,0 +1,14 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse2" } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-final { scan-assembler "movdqa" } } */
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#include <emmintrin.h>
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__m128d reg;
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void set_lower(double b)
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{
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double v[2];
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_mm_store_pd(v, reg);
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v[0] = b;
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reg = _mm_load_pd(v);
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}
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