pass location to md_asm_adjust
So the hook can use it as the location of diagnostics. gcc/ChangeLog: * cfgexpand.c (expand_asm_loc): Adjust. (expand_asm_stmt): Likewise. * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Likewise. * config/arm/aarch-common.c (arm_md_asm_adjust): Likewise. * config/arm/arm.c (thumb1_md_asm_adjust): Likewise. * config/avr/avr.c (avr_md_asm_adjust): Likewise. * config/cris/cris.c (cris_md_asm_adjust): Likewise. * config/i386/i386.c (ix86_md_asm_adjust): Likewise. * config/mn10300/mn10300.c (mn10300_md_asm_adjust): Likewise. * config/nds32/nds32.c (nds32_md_asm_adjust): Likewise. * config/pdp11/pdp11.c (pdp11_md_asm_adjust): Likewise. * config/rs6000/rs6000.c (rs6000_md_asm_adjust): Likewise. * config/s390/s390.c (s390_md_asm_adjust): Likewise. * config/vax/vax.c (vax_md_asm_adjust): Likewise. * config/visium/visium.c (visium_md_asm_adjust): Likewise. * doc/tm.texi: Regenerate. * target.def: Add location argument to md_asm_adjust. Signed-off-by: Trevor Saunders <tbsaunde@tbsaunde.org>
This commit is contained in:
parent
329769b720
commit
8d76ff9922
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@ -2897,7 +2897,8 @@ expand_asm_loc (tree string, int vol, location_t locus)
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if (targetm.md_asm_adjust)
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targetm.md_asm_adjust (output_rvec, input_rvec, input_mode,
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constraints, clobber_rvec, clobbered_regs);
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constraints, clobber_rvec, clobbered_regs,
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locus);
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asm_op = body;
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nclobbers = clobber_rvec.length ();
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@ -3074,8 +3075,7 @@ expand_asm_stmt (gasm *stmt)
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return;
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}
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/* There are some legacy diagnostics in here, and also avoids an extra
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parameter to targetm.md_asm_adjust. */
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/* There are some legacy diagnostics in here. */
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save_input_location s_i_l(locus);
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unsigned noutputs = gimple_asm_noutputs (stmt);
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@ -3456,7 +3456,8 @@ expand_asm_stmt (gasm *stmt)
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if (targetm.md_asm_adjust)
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after_md_seq
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= targetm.md_asm_adjust (output_rvec, input_rvec, input_mode,
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constraints, clobber_rvec, clobbered_regs);
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constraints, clobber_rvec, clobbered_regs,
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locus);
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/* Do not allow the hook to change the output and input count,
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lest it mess up the operand numbering. */
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@ -147,6 +147,7 @@ struct cpu_cost_table
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rtx_insn *arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> &constraints,
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs);
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs,
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location_t loc);
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#endif /* GCC_AARCH_COMMON_PROTOS_H */
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@ -534,7 +534,7 @@ rtx_insn *
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arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
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HARD_REG_SET & /*clobbered_regs*/)
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HARD_REG_SET & /*clobbered_regs*/, location_t loc)
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{
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bool saw_asm_flag = false;
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@ -547,7 +547,7 @@ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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con += 4;
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if (strchr (con, ',') != NULL)
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{
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error ("alternatives not allowed in %<asm%> flag output");
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error_at (loc, "alternatives not allowed in %<asm%> flag output");
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continue;
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}
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@ -608,7 +608,7 @@ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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mode = CC_Vmode, code = NE;
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break;
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default:
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error ("unknown %<asm%> flag output %qs", constraints[i]);
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error_at (loc, "unknown %<asm%> flag output %qs", constraints[i]);
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continue;
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}
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@ -618,7 +618,7 @@ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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machine_mode dest_mode = GET_MODE (dest);
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if (!SCALAR_INT_MODE_P (dest_mode))
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{
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error ("invalid type for %<asm%> flag output");
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error_at (loc, "invalid type for %<asm%> flag output");
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continue;
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}
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@ -333,7 +333,7 @@ static HOST_WIDE_INT arm_constant_alignment (const_tree, HOST_WIDE_INT);
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static rtx_insn *thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
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vec<machine_mode> &,
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vec<const char *> &, vec<rtx> &,
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HARD_REG_SET &);
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HARD_REG_SET &, location_t);
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/* Table of machine attributes. */
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static const struct attribute_spec arm_attribute_table[] =
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@ -34105,7 +34105,7 @@ rtx_insn *
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thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
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HARD_REG_SET & /*clobbered_regs*/)
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HARD_REG_SET & /*clobbered_regs*/, location_t /*loc*/)
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{
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for (unsigned i = 0, n = outputs.length (); i < n; ++i)
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if (startswith (constraints[i], "=@cc"))
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@ -14498,7 +14498,8 @@ static rtx_insn *
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avr_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> &/*constraints*/,
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs,
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location_t /*loc*/)
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{
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clobbers.safe_push (cc_reg_rtx);
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SET_HARD_REG_BIT (clobbered_regs, REG_CC);
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@ -151,7 +151,7 @@ static void cris_function_arg_advance (cumulative_args_t,
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const function_arg_info &);
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static rtx_insn *cris_md_asm_adjust (vec<rtx> &, vec<rtx> &,
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vec<machine_mode> &, vec<const char *> &,
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vec<rtx> &, HARD_REG_SET &);
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vec<rtx> &, HARD_REG_SET &, location_t);
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static void cris_option_override (void);
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cris_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &inputs,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> &constraints, vec<rtx> &clobbers,
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HARD_REG_SET &clobbered_regs)
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HARD_REG_SET &clobbered_regs, location_t /*loc*/)
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{
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/* For the time being, all asms clobber condition codes.
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Revisit when there's a reasonable use for inputs/outputs
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ix86_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> &constraints, vec<rtx> &clobbers,
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HARD_REG_SET &clobbered_regs)
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HARD_REG_SET &clobbered_regs, location_t loc)
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{
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bool saw_asm_flag = false;
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con += 4;
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if (strchr (con, ',') != NULL)
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{
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error ("alternatives not allowed in %<asm%> flag output");
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error_at (loc, "alternatives not allowed in %<asm%> flag output");
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continue;
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}
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}
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if (code == UNKNOWN)
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{
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error ("unknown %<asm%> flag output %qs", constraints[i]);
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error_at (loc, "unknown %<asm%> flag output %qs", constraints[i]);
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continue;
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}
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if (invert)
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machine_mode dest_mode = GET_MODE (dest);
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if (!SCALAR_INT_MODE_P (dest_mode))
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{
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error ("invalid type for %<asm%> flag output");
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error_at (loc, "invalid type for %<asm%> flag output");
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continue;
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}
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mn10300_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
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HARD_REG_SET &clobbered_regs)
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HARD_REG_SET &clobbered_regs, location_t /*loc*/)
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{
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clobbers.safe_push (gen_rtx_REG (CCmode, CC_REG));
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SET_HARD_REG_BIT (clobbered_regs, CC_REG);
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vec<rtx> &inputs ATTRIBUTE_UNUSED,
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vec<machine_mode> &input_modes ATTRIBUTE_UNUSED,
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vec<const char *> &constraints ATTRIBUTE_UNUSED,
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs,
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location_t /*loc*/)
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{
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if (!flag_inline_asm_r15)
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{
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@ -156,7 +156,7 @@ static int pdp11_addr_cost (rtx, machine_mode, addr_space_t, bool);
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static int pdp11_insn_cost (rtx_insn *insn, bool speed);
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static rtx_insn *pdp11_md_asm_adjust (vec<rtx> &, vec<rtx> &,
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vec<machine_mode> &, vec<const char *> &,
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vec<rtx> &, HARD_REG_SET &);
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vec<rtx> &, HARD_REG_SET &, location_t);
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static bool pdp11_return_in_memory (const_tree, const_tree);
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static rtx pdp11_function_value (const_tree, const_tree, bool);
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static rtx pdp11_libcall_value (machine_mode, const_rtx);
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pdp11_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
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HARD_REG_SET &clobbered_regs)
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HARD_REG_SET &clobbered_regs, location_t /*loc*/)
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{
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clobbers.safe_push (gen_rtx_REG (CCmode, CC_REGNUM));
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SET_HARD_REG_BIT (clobbered_regs, CC_REGNUM);
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rs6000_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
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HARD_REG_SET &clobbered_regs)
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HARD_REG_SET &clobbered_regs, location_t /*loc*/)
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{
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clobbers.safe_push (gen_rtx_REG (SImode, CA_REGNO));
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SET_HARD_REG_BIT (clobbered_regs, CA_REGNO);
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s390_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &inputs,
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vec<machine_mode> &input_modes,
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vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
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HARD_REG_SET & /*clobbered_regs*/)
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HARD_REG_SET & /*clobbered_regs*/, location_t /*loc*/)
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{
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if (!TARGET_VXE)
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/* Long doubles are stored in FPR pairs - nothing to do. */
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@ -57,7 +57,7 @@ static bool vax_rtx_costs (rtx, machine_mode, int, int, int *, bool);
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static machine_mode vax_cc_modes_compatible (machine_mode, machine_mode);
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static rtx_insn *vax_md_asm_adjust (vec<rtx> &, vec<rtx> &,
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vec<machine_mode> &, vec<const char *> &,
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vec<rtx> &, HARD_REG_SET &);
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vec<rtx> &, HARD_REG_SET &, location_t);
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static rtx vax_function_arg (cumulative_args_t, const function_arg_info &);
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static void vax_function_arg_advance (cumulative_args_t,
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const function_arg_info &);
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vec<rtx> &inputs ATTRIBUTE_UNUSED,
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vec<machine_mode> &input_modes ATTRIBUTE_UNUSED,
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vec<const char *> &constraints ATTRIBUTE_UNUSED,
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
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vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs,
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location_t /*loc*/)
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{
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clobbers.safe_push (gen_rtx_REG (CCmode, VAX_PSL_REGNUM));
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SET_HARD_REG_BIT (clobbered_regs, VAX_PSL_REGNUM);
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@ -190,7 +190,7 @@ static tree visium_build_builtin_va_list (void);
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static rtx_insn *visium_md_asm_adjust (vec<rtx> &, vec<rtx> &,
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vec<machine_mode> &,
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vec<const char *> &, vec<rtx> &,
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HARD_REG_SET &);
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HARD_REG_SET &, location_t);
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static bool visium_legitimate_constant_p (machine_mode, rtx);
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visium_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
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vec<machine_mode> & /*input_modes*/,
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vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
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HARD_REG_SET &clobbered_regs)
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HARD_REG_SET &clobbered_regs, location_t /*loc*/)
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{
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clobbers.safe_push (gen_rtx_REG (CCmode, FLAGS_REGNUM));
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SET_HARD_REG_BIT (clobbered_regs, FLAGS_REGNUM);
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@ -11708,11 +11708,12 @@ from shared libraries (DLLs).
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You need not define this macro if it would always evaluate to zero.
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@end defmac
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@deftypefn {Target Hook} {rtx_insn *} TARGET_MD_ASM_ADJUST (vec<rtx>& @var{outputs}, vec<rtx>& @var{inputs}, vec<machine_mode>& @var{input_modes}, vec<const char *>& @var{constraints}, vec<rtx>& @var{clobbers}, HARD_REG_SET& @var{clobbered_regs})
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@deftypefn {Target Hook} {rtx_insn *} TARGET_MD_ASM_ADJUST (vec<rtx>& @var{outputs}, vec<rtx>& @var{inputs}, vec<machine_mode>& @var{input_modes}, vec<const char *>& @var{constraints}, vec<rtx>& @var{clobbers}, HARD_REG_SET& @var{clobbered_regs}, location_t @var{loc})
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This target hook may add @dfn{clobbers} to @var{clobbers} and
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@var{clobbered_regs} for any hard regs the port wishes to automatically
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clobber for an asm. The @var{outputs} and @var{inputs} may be inspected
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to avoid clobbering a register that is already used by the asm.
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to avoid clobbering a register that is already used by the asm. @var{loc}
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is the source location of the asm.
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It may modify the @var{outputs}, @var{inputs}, @var{input_modes}, and
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@var{constraints} as necessary for other pre-processing. In this case the
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@ -4226,7 +4226,8 @@ DEFHOOK
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"This target hook may add @dfn{clobbers} to @var{clobbers} and\n\
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@var{clobbered_regs} for any hard regs the port wishes to automatically\n\
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clobber for an asm. The @var{outputs} and @var{inputs} may be inspected\n\
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to avoid clobbering a register that is already used by the asm.\n\
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to avoid clobbering a register that is already used by the asm. @var{loc}\n\
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is the source location of the asm.\n\
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\n\
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It may modify the @var{outputs}, @var{inputs}, @var{input_modes}, and\n\
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@var{constraints} as necessary for other pre-processing. In this case the\n\
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@ -4236,7 +4237,7 @@ to @var{input_modes}.",
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rtx_insn *,
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(vec<rtx>& outputs, vec<rtx>& inputs, vec<machine_mode>& input_modes,
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vec<const char *>& constraints, vec<rtx>& clobbers,
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HARD_REG_SET& clobbered_regs),
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HARD_REG_SET& clobbered_regs, location_t loc),
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NULL)
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/* This target hook allows the backend to specify a calling convention
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Loading…
Reference in New Issue