MAINTAINERS (c4x port): Remove.
* MAINTAINERS (c4x port): Remove. contrib: * paranoia.cc (main): Remove handling of c4x_single and c4x_extended formats. gcc: * config/c4x: Remove directory. * config.gcc (crx-*, mt-*): Mark obsolete. (c4x-*, tic4x-*, c4x-*-rtems*, tic4x-*-rtems*, c4x-*, tic4x-*, h8300-*-rtemscoff*, ns32k-*-netbsdelf*, ns32k-*-netbsd*, sh-*-rtemscoff*): Remove cases. * defaults.h (C4X_FLOAT_FORMAT): Remove. * real.c (encode_c4x_single, decode_c4x_single, encode_c4x_extended, decode_c4x_extended, c4x_single_format, c4x_extended_format): Remove. * real.h (c4x_single_format, c4x_extended_format): Remove. * doc/extend.texi (interrupt, naked): Remove mention of attributes on C4x. (Pragmas): Remove comment about c4x pragmas. * doc/install.texi (c4x): Remove target-specific instructions. * doc/invoke.texi (TMS320C3x/C4x Options): Remove. * doc/md.texi (Machine Constraints): Remove C4x documentation. * doc/tm.texi (MEMBER_TYPE_FORCES_BLK, c_register_pragma): Do not refer to C4x source files as examples. (C4X_FLOAT_FORMAT): Remove documentation. gcc/testsuite: * gcc.dg/builtin-inf-1.c, gcc.dg/compare6.c, gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c, gcc.dg/torture/builtin-attr-1.c: Don't handle c4x-*-* targets. libgcc: * config.host (tic4x-*-*, c4x-*-rtems*, tic4x-*-rtems*, c4x-*, tic4x-*, h8300-*-rtemscoff*, ns32k-*-netbsdelf*, ns32k-*-netbsd*, sh-*-rtemscoff*): Remove cases. From-SVN: r131835
This commit is contained in:
Joseph Myers
Joseph Myers
parent
1d555e2632
commit
8d8da22788
|
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@ -1,3 +1,7 @@
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2008-01-25 Joseph Myers <joseph@codesourcery.com>
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* MAINTAINERS (c4x port): Remove.
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2008-01-24 David Edelsohn <edelsohn@gnu.org>
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* libtool.m4: Backport AIX 6 support from ToT Libtool.
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|
|
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@ -42,7 +42,6 @@ arm port Paul Brook paul@codesourcery.com
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avr port Denis Chertykov denisc@overta.ru
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avr port Anatoly Sokolov aesok@post.ru
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bfin port Bernd Schmidt bernd.schmidt@analog.com
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c4x port Michael Hayes m.hayes@elec.canterbury.ac.nz
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cris port Hans-Peter Nilsson hp@axis.com
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crx port Paul Woegerer paul.woegerer@nsc.com
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fr30 port Nick Clifton nickc@redhat.com
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|
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@ -1,3 +1,8 @@
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2008-01-25 Joseph Myers <joseph@codesourcery.com>
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* paranoia.cc (main): Remove handling of c4x_single and
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c4x_extended formats.
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2007-12-26 Sebastian Pop <sebastian.pop@amd.com>
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* compareSumTests3: Changed to GPLv3.
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@ -2643,8 +2643,6 @@ int main(int ac, char **av)
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F(vax_g),
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F(i370_single),
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F(i370_double),
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F(c4x_single),
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F(c4x_extended),
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F(real_internal),
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#undef F
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};
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|
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@ -1,3 +1,25 @@
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2008-01-25 Joseph Myers <joseph@codesourcery.com>
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* config/c4x: Remove directory.
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* config.gcc (crx-*, mt-*): Mark obsolete.
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(c4x-*, tic4x-*, c4x-*-rtems*, tic4x-*-rtems*, c4x-*, tic4x-*,
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h8300-*-rtemscoff*, ns32k-*-netbsdelf*, ns32k-*-netbsd*,
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sh-*-rtemscoff*): Remove cases.
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* defaults.h (C4X_FLOAT_FORMAT): Remove.
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* real.c (encode_c4x_single, decode_c4x_single,
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encode_c4x_extended, decode_c4x_extended, c4x_single_format,
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c4x_extended_format): Remove.
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* real.h (c4x_single_format, c4x_extended_format): Remove.
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* doc/extend.texi (interrupt, naked): Remove mention of attributes
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on C4x.
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(Pragmas): Remove comment about c4x pragmas.
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* doc/install.texi (c4x): Remove target-specific instructions.
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* doc/invoke.texi (TMS320C3x/C4x Options): Remove.
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* doc/md.texi (Machine Constraints): Remove C4x documentation.
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* doc/tm.texi (MEMBER_TYPE_FORCES_BLK, c_register_pragma): Do not
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refer to C4x source files as examples.
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(C4X_FLOAT_FORMAT): Remove documentation.
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2008-01-25 Bernd Schmidt <bernd.schmidt@analog.com>
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* config/bfin/bfin.c (override_options): Reorder tests so that
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@ -1,6 +1,6 @@
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# GCC target-specific configuration file.
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# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
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# Free Software Foundation, Inc.
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# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
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# 2008 Free Software Foundation, Inc.
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#This file is part of GCC.
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@ -195,8 +195,8 @@ md_file=
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# Obsolete configurations.
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case ${target} in
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c4x-* \
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| tic4x-* \
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crx-* \
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| mt-* \
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)
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if test "x$enable_obsolete" != xyes; then
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echo "*** Configuration ${target} is obsolete." >&2
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@ -351,9 +351,6 @@ sh[123456789lbe]*-*-*)
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cpu_type=sh
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need_64bit_hwint=yes
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;;
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tic4x-*-*)
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cpu_type=c4x
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;;
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esac
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tm_file=${cpu_type}/${cpu_type}.h
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@ -830,17 +827,6 @@ bfin*-*)
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tmake_file=bfin/t-bfin
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use_collect2=no
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;;
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c4x-*-rtems* | tic4x-*-rtems*)
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tmake_file="c4x/t-c4x t-rtems c4x/t-rtems"
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tm_file="c4x/c4x.h c4x/rtems.h rtems.h"
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c_target_objs="c4x-c.o"
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cxx_target_objs="c4x-c.o"
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;;
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c4x-* | tic4x-*)
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tmake_file=c4x/t-c4x
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c_target_objs="c4x-c.o"
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cxx_target_objs="c4x-c.o"
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;;
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cris-*-aout)
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tm_file="dbxelf.h ${tm_file} cris/aout.h"
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gas=yes
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@ -895,10 +881,6 @@ frv-*-*linux*)
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linux.h frv/linux.h frv/frv-abi.h"
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tmake_file="${tmake_file} frv/t-frv frv/t-linux"
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;;
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h8300-*-rtemscoff*)
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tmake_file="h8300/t-h8300 t-rtems h8300/t-rtems"
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tm_file="h8300/h8300.h dbxcoff.h h8300/coff.h h8300/rtems.h rtems.h"
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;;
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h8300-*-rtems*)
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tmake_file="h8300/t-h8300 h8300/t-elf t-rtems h8300/t-rtems"
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tm_file="h8300/h8300.h dbxelf.h elfos.h h8300/elf.h h8300/rtems.h rtems.h"
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@ -1828,16 +1810,6 @@ mt-*-elf)
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tm_file="dbxelf.h elfos.h svr4.h ${tm_file}"
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tmake_file="${tmake_file} mt/t-mt"
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;;
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ns32k-*-netbsdelf*)
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echo "GCC does not yet support the ${target} target"; exit 1
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;;
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ns32k-*-netbsd*)
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tm_file="${tm_file} netbsd.h netbsd-aout.h ns32k/netbsd.h"
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# On NetBSD, the headers are already okay, except for math.h.
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tmake_file="t-netbsd ns32k/t-ns32k"
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extra_parts=""
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use_collect2=yes
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;;
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pdp11-*-bsd)
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tm_file="${tm_file} pdp11/2bsd.h"
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use_fixproto=yes
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@ -2304,10 +2276,6 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
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fi
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use_fixproto=yes
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;;
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sh-*-rtemscoff*)
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tmake_file="sh/t-sh t-rtems sh/t-rtems"
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tm_file="${tm_file} dbxcoff.h sh/coff.h sh/rtems.h rtems.h"
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;;
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sh-*-rtems*)
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tmake_file="sh/t-sh sh/t-elf t-rtems sh/t-rtems"
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tm_file="${tm_file} dbxelf.h elfos.h svr4.h sh/elf.h sh/embed-elf.h sh/rtemself.h rtems.h"
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|
|
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|
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@ -1,151 +0,0 @@
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/* Subroutines for the C front end on the TMS320C[34]x
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Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
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2007 Free Software Foundation, Inc.
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||||
|
||||
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
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||||
and Herman Ten Brugge (Haj.Ten.Brugge@net.HCC.nl).
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||||
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||||
This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
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||||
any later version.
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||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "tree.h"
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#include "toplev.h"
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#include "cpplib.h"
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#include "c-pragma.h"
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#include "tm_p.h"
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static int c4x_parse_pragma (const char *, tree *, tree *);
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/* Handle machine specific pragmas for compatibility with existing
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compilers for the C3x/C4x.
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|
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pragma attribute
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----------------------------------------------------------
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CODE_SECTION(symbol,"section") section("section")
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DATA_SECTION(symbol,"section") section("section")
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FUNC_CANNOT_INLINE(function)
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FUNC_EXT_CALLED(function)
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FUNC_IS_PURE(function) const
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FUNC_IS_SYSTEM(function)
|
||||
FUNC_NEVER_RETURNS(function) noreturn
|
||||
FUNC_NO_GLOBAL_ASG(function)
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||||
FUNC_NO_IND_ASG(function)
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||||
INTERRUPT(function) interrupt
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||||
|
||||
*/
|
||||
|
||||
/* Parse a C4x pragma, of the form ( function [, "section"] ) \n.
|
||||
FUNC is loaded with the IDENTIFIER_NODE of the function, SECT with
|
||||
the STRING_CST node of the string. If SECT is null, then this
|
||||
pragma doesn't take a section string. Returns 0 for a good pragma,
|
||||
-1 for a malformed pragma. */
|
||||
#define BAD(gmsgid, arg) \
|
||||
do { warning (OPT_Wpragmas, gmsgid, arg); return -1; } while (0)
|
||||
|
||||
static int
|
||||
c4x_parse_pragma (const char *name, tree *func, tree *sect)
|
||||
{
|
||||
tree f, s, x;
|
||||
|
||||
if (pragma_lex (&x) != CPP_OPEN_PAREN)
|
||||
BAD ("missing '(' after '#pragma %s' - ignored", name);
|
||||
|
||||
if (pragma_lex (&f) != CPP_NAME)
|
||||
BAD ("missing function name in '#pragma %s' - ignored", name);
|
||||
|
||||
if (sect)
|
||||
{
|
||||
if (pragma_lex (&x) != CPP_COMMA)
|
||||
BAD ("malformed '#pragma %s' - ignored", name);
|
||||
if (pragma_lex (&s) != CPP_STRING)
|
||||
BAD ("missing section name in '#pragma %s' - ignored", name);
|
||||
*sect = s;
|
||||
}
|
||||
|
||||
if (pragma_lex (&x) != CPP_CLOSE_PAREN)
|
||||
BAD ("missing ')' for '#pragma %s' - ignored", name);
|
||||
|
||||
if (pragma_lex (&x) != CPP_EOF)
|
||||
warning (OPT_Wpragmas, "junk at end of '#pragma %s'", name);
|
||||
|
||||
*func = f;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
c4x_pr_CODE_SECTION (cpp_reader *pfile ATTRIBUTE_UNUSED)
|
||||
{
|
||||
tree func, sect;
|
||||
|
||||
if (c4x_parse_pragma ("CODE_SECTION", &func, §))
|
||||
return;
|
||||
code_tree = chainon (code_tree,
|
||||
build_tree_list (func,
|
||||
build_tree_list (NULL_TREE, sect)));
|
||||
}
|
||||
|
||||
void
|
||||
c4x_pr_DATA_SECTION (cpp_reader *pfile ATTRIBUTE_UNUSED)
|
||||
{
|
||||
tree func, sect;
|
||||
|
||||
if (c4x_parse_pragma ("DATA_SECTION", &func, §))
|
||||
return;
|
||||
data_tree = chainon (data_tree,
|
||||
build_tree_list (func,
|
||||
build_tree_list (NULL_TREE, sect)));
|
||||
}
|
||||
|
||||
void
|
||||
c4x_pr_FUNC_IS_PURE (cpp_reader *pfile ATTRIBUTE_UNUSED)
|
||||
{
|
||||
tree func;
|
||||
|
||||
if (c4x_parse_pragma ("FUNC_IS_PURE", &func, 0))
|
||||
return;
|
||||
pure_tree = chainon (pure_tree, build_tree_list (func, NULL_TREE));
|
||||
}
|
||||
|
||||
void
|
||||
c4x_pr_FUNC_NEVER_RETURNS (cpp_reader *pfile ATTRIBUTE_UNUSED)
|
||||
{
|
||||
tree func;
|
||||
|
||||
if (c4x_parse_pragma ("FUNC_NEVER_RETURNS", &func, 0))
|
||||
return;
|
||||
noreturn_tree = chainon (noreturn_tree, build_tree_list (func, NULL_TREE));
|
||||
}
|
||||
|
||||
void
|
||||
c4x_pr_INTERRUPT (cpp_reader *pfile ATTRIBUTE_UNUSED)
|
||||
{
|
||||
tree func;
|
||||
|
||||
if (c4x_parse_pragma ("INTERRUPT", &func, 0))
|
||||
return;
|
||||
interrupt_tree = chainon (interrupt_tree, build_tree_list (func, NULL_TREE));
|
||||
}
|
||||
|
||||
/* Used for FUNC_CANNOT_INLINE, FUNC_EXT_CALLED, FUNC_IS_SYSTEM,
|
||||
FUNC_NO_GLOBAL_ASG, and FUNC_NO_IND_ASG. */
|
||||
void
|
||||
c4x_pr_ignored (cpp_reader *pfile ATTRIBUTE_UNUSED)
|
||||
{
|
||||
}
|
||||
|
|
@ -1,108 +0,0 @@
|
|||
/* Definitions of target machine for GNU compiler. TMS320C[34]x
|
||||
Copyright (C) 2002, 2004, 2007 Free Software Foundation, Inc.
|
||||
|
||||
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
|
||||
and Herman Ten Brugge (Haj.Ten.Brugge@net.HCC.nl).
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
/* C4x wants 1- and 2-word float modes, in its own peculiar format.
|
||||
FIXME: Give this port a way to get rid of SFmode, DFmode, and all
|
||||
the other modes it doesn't use. */
|
||||
FLOAT_MODE (QF, 1, c4x_single_format);
|
||||
FLOAT_MODE (HF, 2, c4x_extended_format);
|
||||
RESET_FLOAT_FORMAT (SF, 0); /* not used */
|
||||
RESET_FLOAT_FORMAT (DF, 0); /* not used */
|
||||
|
||||
/* Add any extra modes needed to represent the condition code.
|
||||
|
||||
On the C4x, we have a "no-overflow" mode which is used when an ADD,
|
||||
SUB, NEG, or MPY insn is used to set the condition code. This is
|
||||
to prevent the combiner from optimizing away a following CMP of the
|
||||
result with zero when a signed conditional branch or load insn
|
||||
follows.
|
||||
|
||||
The problem is a subtle one and deals with the manner in which the
|
||||
negative condition (N) flag is used on the C4x. This flag does not
|
||||
reflect the status of the actual result but of the ideal result had
|
||||
no overflow occurred (when considering signed operands).
|
||||
|
||||
For example, 0x7fffffff + 1 => 0x80000000 Z=0 V=1 N=0 C=0. Here
|
||||
the flags reflect the untruncated result, not the actual result.
|
||||
While the actual result is less than zero, the N flag is not set
|
||||
since the ideal result of the addition without truncation would
|
||||
have been positive.
|
||||
|
||||
Note that the while the N flag is handled differently to most other
|
||||
architectures, the use of it is self consistent and is not the
|
||||
cause of the problem.
|
||||
|
||||
Logical operations set the N flag to the MSB of the result so if
|
||||
the result is negative, N is 1. However, integer and floating
|
||||
point operations set the N flag to be the MSB of the result
|
||||
exclusive ored with the overflow (V) flag. Thus if an overflow
|
||||
occurs and the result does not have the MSB set (i.e., the result
|
||||
looks like a positive number), the N flag is set. Conversely, if
|
||||
an overflow occurs and the MSB of the result is set, N is set to 0.
|
||||
Thus the N flag represents the sign of the result if it could have
|
||||
been stored without overflow but does not represent the apparent
|
||||
sign of the result. Note that most architectures set the N flag to
|
||||
be the MSB of the result.
|
||||
|
||||
The C4x approach to setting the N flag simplifies signed
|
||||
conditional branches and loads which only have to test the state of
|
||||
the N flag, whereas most architectures have to look at both the N
|
||||
and V flags. The disadvantage is that there is no flag giving the
|
||||
status of the sign bit of the operation. However, there are no
|
||||
conditional load or branch instructions that make use of this
|
||||
feature (e.g., BMI---branch minus) instruction. Note that BN and
|
||||
BLT are identical in the C4x.
|
||||
|
||||
To handle the problem where the N flag is set differently whenever
|
||||
there is an overflow we use a different CC mode, CC_NOOVmode which
|
||||
says that the CC reflects the comparison of the result against zero
|
||||
if no overflow occurred.
|
||||
|
||||
For example,
|
||||
|
||||
[(set (reg:CC_NOOV 21)
|
||||
(compare:CC_NOOV (minus:QI (match_operand:QI 1 "src_operand" "")
|
||||
(match_operand:QI 2 "src_operand" ""))
|
||||
(const_int 0)))
|
||||
(set (match_operand:QI 0 "ext_reg_operand" "")
|
||||
(minus:QI (match_dup 1)
|
||||
(match_dup 2)))]
|
||||
|
||||
Note that there is no problem for insns that don't return a result
|
||||
like CMP, since the CC reflects the effect of operation.
|
||||
|
||||
An example of a potential problem is when GCC
|
||||
converts (LTU (MINUS (0x80000000) (0x7fffffff) (0x80000000)))
|
||||
to (LEU (MINUS (0x80000000) (0x7fffffff) (0x7fffffff)))
|
||||
to (GE (MINUS (0x80000000) (0x7fffffff) (0x00000000)))
|
||||
|
||||
Now (MINUS (0x80000000) (0x7fffffff)) returns 0x00000001 but the
|
||||
C4x sets the N flag since the result without overflow would have
|
||||
been 0xffffffff when treating the operands as signed integers.
|
||||
Thus (GE (MINUS (0x80000000) (0x7fffffff) (0x00000000))) sets the N
|
||||
flag but (GE (0x00000001)) does not set the N flag.
|
||||
|
||||
The upshot is that we cannot use signed branch and conditional
|
||||
load instructions after an add, subtract, neg, abs or multiply.
|
||||
We must emit a compare insn to check the result against 0. */
|
||||
|
||||
CC_MODE (CC_NOOV);
|
||||
|
|
@ -1,246 +0,0 @@
|
|||
/* Definitions of target machine for GNU compiler. TMS320C[34]x
|
||||
Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2003, 2004, 2005,
|
||||
2007 Free Software Foundation, Inc.
|
||||
|
||||
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
|
||||
and Herman Ten Brugge (Haj.Ten.Brugge@net.HCC.nl).
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef GCC_C4X_PROTOS_H
|
||||
#define GCC_C4X_PROTOS_H
|
||||
|
||||
extern void c4x_override_options (void);
|
||||
|
||||
extern void c4x_optimization_options (int, int);
|
||||
|
||||
extern void c4x_output_ascii (FILE *, const char *, int);
|
||||
|
||||
extern int c4x_interrupt_function_p (void);
|
||||
|
||||
extern void c4x_expand_prologue (void);
|
||||
|
||||
extern void c4x_expand_epilogue (void);
|
||||
|
||||
extern int c4x_null_epilogue_p (void);
|
||||
|
||||
extern void c4x_global_label (const char *);
|
||||
|
||||
extern void c4x_external_ref (const char *);
|
||||
|
||||
#ifdef TREE_CODE
|
||||
extern void c4x_function_arg_advance (CUMULATIVE_ARGS *,
|
||||
enum machine_mode, tree, int);
|
||||
|
||||
extern struct rtx_def *c4x_function_arg (CUMULATIVE_ARGS *,
|
||||
enum machine_mode, tree, int);
|
||||
|
||||
#endif /* TREE_CODE */
|
||||
|
||||
|
||||
#if defined(RTX_CODE) && defined(TREE_CODE)
|
||||
extern void c4x_init_cumulative_args (CUMULATIVE_ARGS *c, tree, rtx);
|
||||
|
||||
extern rtx c4x_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
|
||||
|
||||
extern void c4x_init_builtins (void);
|
||||
|
||||
#endif /* TREE_CODE and RTX_CODE*/
|
||||
|
||||
|
||||
#ifdef RTX_CODE
|
||||
extern struct rtx_def *c4x_gen_compare_reg (enum rtx_code, rtx, rtx);
|
||||
|
||||
extern int c4x_legitimate_address_p (enum machine_mode, rtx, int);
|
||||
|
||||
extern int c4x_hard_regno_mode_ok (unsigned int, enum machine_mode);
|
||||
|
||||
extern int c4x_hard_regno_rename_ok (unsigned int, unsigned int);
|
||||
|
||||
extern struct rtx_def *c4x_legitimize_address (rtx, enum machine_mode);
|
||||
|
||||
extern void c4x_print_operand (FILE *, rtx, int);
|
||||
|
||||
extern void c4x_print_operand_address (FILE *, rtx);
|
||||
|
||||
extern enum reg_class c4x_preferred_reload_class (rtx, enum reg_class);
|
||||
|
||||
extern struct rtx_def *c4x_operand_subword (rtx, int, int, enum machine_mode);
|
||||
|
||||
extern char *c4x_output_cbranch (const char *, rtx);
|
||||
|
||||
extern int c4x_label_conflict (rtx, rtx, rtx);
|
||||
|
||||
extern int c4x_address_conflict (rtx, rtx, int, int);
|
||||
|
||||
extern void c4x_rptb_insert (rtx insn);
|
||||
|
||||
extern int c4x_rptb_nop_p (rtx);
|
||||
|
||||
extern int c4x_rptb_rpts_p (rtx, rtx);
|
||||
|
||||
extern int c4x_check_laj_p (rtx);
|
||||
|
||||
extern int c4x_autoinc_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int reg_or_const_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int mixed_subreg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int reg_imm_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar0_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar0_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar1_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar1_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar2_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar2_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar3_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar3_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar4_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar4_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar5_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar5_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar6_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar6_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar7_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ar7_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ir0_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ir0_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ir1_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int ir1_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int group1_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int group1_mem_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int arx_reg_operand (rtx, enum machine_mode);
|
||||
|
||||
extern int not_rc_reg (rtx, enum machine_mode);
|
||||
|
||||
extern int not_modify_reg (rtx, enum machine_mode);
|
||||
|
||||
extern int c4x_shiftable_constant (rtx);
|
||||
|
||||
extern int c4x_immed_float_p (rtx);
|
||||
|
||||
extern int c4x_a_register (rtx);
|
||||
|
||||
extern int c4x_x_register (rtx);
|
||||
|
||||
extern int c4x_H_constant (rtx);
|
||||
|
||||
extern int c4x_I_constant (rtx);
|
||||
|
||||
extern int c4x_J_constant (rtx);
|
||||
|
||||
extern int c4x_K_constant (rtx);
|
||||
|
||||
extern int c4x_L_constant (rtx);
|
||||
|
||||
extern int c4x_N_constant (rtx);
|
||||
|
||||
extern int c4x_O_constant (rtx);
|
||||
|
||||
extern int c4x_Q_constraint (rtx);
|
||||
|
||||
extern int c4x_R_constraint (rtx);
|
||||
|
||||
extern int c4x_S_indirect (rtx);
|
||||
|
||||
extern int c4x_S_constraint (rtx);
|
||||
|
||||
extern int c4x_T_constraint (rtx);
|
||||
|
||||
extern int c4x_U_constraint (rtx);
|
||||
|
||||
extern void c4x_emit_libcall (rtx, enum rtx_code, enum machine_mode,
|
||||
enum machine_mode, int, rtx *);
|
||||
|
||||
extern void c4x_emit_libcall3 (rtx, enum rtx_code, enum machine_mode, rtx *);
|
||||
|
||||
extern void c4x_emit_libcall_mulhi (rtx, enum rtx_code,
|
||||
enum machine_mode, rtx *);
|
||||
|
||||
extern int c4x_emit_move_sequence (rtx *, enum machine_mode);
|
||||
|
||||
extern int legitimize_operands (enum rtx_code, rtx *, enum machine_mode);
|
||||
|
||||
extern int valid_operands (enum rtx_code, rtx *, enum machine_mode);
|
||||
|
||||
extern int valid_parallel_load_store (rtx *, enum machine_mode);
|
||||
|
||||
extern int valid_parallel_operands_4 (rtx *, enum machine_mode);
|
||||
|
||||
extern int valid_parallel_operands_5 (rtx *, enum machine_mode);
|
||||
|
||||
extern int valid_parallel_operands_6 (rtx *, enum machine_mode);
|
||||
|
||||
extern GTY(()) rtx smulhi3_libfunc;
|
||||
extern GTY(()) rtx umulhi3_libfunc;
|
||||
extern GTY(()) rtx fix_truncqfhi2_libfunc;
|
||||
extern GTY(()) rtx fixuns_truncqfhi2_libfunc;
|
||||
extern GTY(()) rtx fix_trunchfhi2_libfunc;
|
||||
extern GTY(()) rtx fixuns_trunchfhi2_libfunc;
|
||||
extern GTY(()) rtx floathiqf2_libfunc;
|
||||
extern GTY(()) rtx floatunshiqf2_libfunc;
|
||||
extern GTY(()) rtx floathihf2_libfunc;
|
||||
extern GTY(()) rtx floatunshihf2_libfunc;
|
||||
|
||||
extern GTY(()) rtx c4x_compare_op0; /* Operand 0 for comparisons. */
|
||||
extern GTY(()) rtx c4x_compare_op1; /* Operand 1 for comparisons. */
|
||||
|
||||
#endif /* RTX_CODE */
|
||||
|
||||
/* Smallest class containing REGNO. */
|
||||
extern enum reg_class c4x_regclass_map[FIRST_PSEUDO_REGISTER];
|
||||
extern enum machine_mode c4x_caller_save_map[FIRST_PSEUDO_REGISTER];
|
||||
|
||||
extern void c4x_pr_CODE_SECTION (struct cpp_reader *);
|
||||
extern void c4x_pr_DATA_SECTION (struct cpp_reader *);
|
||||
extern void c4x_pr_FUNC_IS_PURE (struct cpp_reader *);
|
||||
extern void c4x_pr_FUNC_NEVER_RETURNS (struct cpp_reader *);
|
||||
extern void c4x_pr_INTERRUPT (struct cpp_reader *);
|
||||
extern void c4x_pr_ignored (struct cpp_reader *);
|
||||
extern void c4x_init_pragma (int (*) (tree *));
|
||||
|
||||
extern GTY(()) tree code_tree;
|
||||
extern GTY(()) tree data_tree;
|
||||
extern GTY(()) tree pure_tree;
|
||||
extern GTY(()) tree noreturn_tree;
|
||||
extern GTY(()) tree interrupt_tree;
|
||||
|
||||
#endif /* ! GCC_C4X_PROTOS_H */
|
||||
4618
gcc/config/c4x/c4x.c
4618
gcc/config/c4x/c4x.c
File diff suppressed because it is too large
Load Diff
1649
gcc/config/c4x/c4x.h
1649
gcc/config/c4x/c4x.h
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,139 +0,0 @@
|
|||
; Options for the TMS320C[34]x port of the compiler.
|
||||
|
||||
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
|
||||
;
|
||||
; This file is part of GCC.
|
||||
;
|
||||
; GCC is free software; you can redistribute it and/or modify it under
|
||||
; the terms of the GNU General Public License as published by the Free
|
||||
; Software Foundation; either version 3, or (at your option) any later
|
||||
; version.
|
||||
;
|
||||
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
; for more details.
|
||||
;
|
||||
; You should have received a copy of the GNU General Public License
|
||||
; along with GCC; see the file COPYING3. If not see
|
||||
; <http://www.gnu.org/licenses/>.
|
||||
|
||||
m30
|
||||
Target RejectNegative
|
||||
Generate code for C30 CPU
|
||||
|
||||
m31
|
||||
Target RejectNegative
|
||||
Generate code for C31 CPU
|
||||
|
||||
m32
|
||||
Target RejectNegative
|
||||
Generate code for C32 CPU
|
||||
|
||||
m33
|
||||
Target RejectNegative
|
||||
Generate code for C33 CPU
|
||||
|
||||
m40
|
||||
Target RejectNegative
|
||||
Generate code for C40 CPU
|
||||
|
||||
m44
|
||||
Target RejectNegative
|
||||
Generate code for C44 CPU
|
||||
|
||||
maliases
|
||||
Target Report Mask(ALIASES)
|
||||
Assume that pointers may be aliased
|
||||
|
||||
mbig
|
||||
Target RejectNegative Report InverseMask(SMALL)
|
||||
Big memory model
|
||||
|
||||
mbk
|
||||
Target Report Mask(BK)
|
||||
Use the BK register as a general purpose register
|
||||
|
||||
mcpu=
|
||||
Target RejectNegative Joined
|
||||
-mcpu=CPU Generate code for CPU
|
||||
|
||||
mdb
|
||||
Target Report Mask(DB)
|
||||
Enable use of DB instruction
|
||||
|
||||
mdebug
|
||||
Target Report Mask(DEBUG)
|
||||
Enable debugging
|
||||
|
||||
mdevel
|
||||
Target Report Mask(DEVEL)
|
||||
Enable new features under development
|
||||
|
||||
mfast-fix
|
||||
Target Report Mask(FAST_FIX)
|
||||
Use fast but approximate float to integer conversion
|
||||
|
||||
mforce
|
||||
Target Report Mask(FORCE)
|
||||
Force RTL generation to emit valid 3 operand insns
|
||||
|
||||
mhoist
|
||||
Target Report Mask(HOIST)
|
||||
Force constants into registers to improve hoisting
|
||||
|
||||
misr-dp-reload
|
||||
Target Mask(PARANOID) MaskExists
|
||||
Save DP across ISR in small memory model
|
||||
|
||||
mloop-unsigned
|
||||
Target Report Mask(LOOP_UNSIGNED)
|
||||
Allow unsigned iteration counts for RPTB/DB
|
||||
|
||||
mmemparm
|
||||
Target RejectNegative Report Mask(MEMPARM)
|
||||
Pass arguments on the stack
|
||||
|
||||
mmpyi
|
||||
Target Report Mask(MPYI)
|
||||
Use MPYI instruction for C3x
|
||||
|
||||
mparallel-insns
|
||||
Target Report Mask(PARALLEL)
|
||||
Enable parallel instructions
|
||||
|
||||
mparallel-mpy
|
||||
Target Report Mask(PARALLEL_MPY)
|
||||
Enable MPY||ADD and MPY||SUB instructions
|
||||
|
||||
mparanoid
|
||||
Target Report Mask(PARANOID)
|
||||
Save DP across ISR in small memory model
|
||||
|
||||
mpreserve-float
|
||||
Target Report Mask(PRESERVE_FLOAT)
|
||||
Preserve all 40 bits of FP reg across call
|
||||
|
||||
mregparm
|
||||
Target RejectNegative Report InverseMask(MEMPARM)
|
||||
Pass arguments in registers
|
||||
|
||||
mrptb
|
||||
Target Report Mask(RPTB)
|
||||
Enable use of RTPB instruction
|
||||
|
||||
mrpts
|
||||
Target Report Mask(RPTS)
|
||||
Enable use of RTPS instruction
|
||||
|
||||
mrpts=
|
||||
Target RejectNegative Joined UInteger Var(c4x_rpts_cycles)
|
||||
-mrpts=N Set the maximum number of iterations for RPTS to N
|
||||
|
||||
msmall
|
||||
Target RejectNegative Report Mask(SMALL)
|
||||
Small memory model
|
||||
|
||||
mti
|
||||
Target Report Mask(TI)
|
||||
Emit code compatible with TI tools
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,403 +0,0 @@
|
|||
;; Predicate definitions for TMS320C[34]x.
|
||||
;; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
|
||||
;;
|
||||
;; This file is part of GCC.
|
||||
;;
|
||||
;; GCC is free software; you can redistribute it and/or modify
|
||||
;; it under the terms of the GNU General Public License as published by
|
||||
;; the Free Software Foundation; either version 3, or (at your option)
|
||||
;; any later version.
|
||||
;;
|
||||
;; GCC is distributed in the hope that it will be useful,
|
||||
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
;; GNU General Public License for more details.
|
||||
;;
|
||||
;; You should have received a copy of the GNU General Public License
|
||||
;; along with GCC; see the file COPYING3. If not see
|
||||
;; <http://www.gnu.org/licenses/>.
|
||||
|
||||
;; Nonzero if OP is a floating point value with value 0.0.
|
||||
|
||||
(define_predicate "fp_zero_operand"
|
||||
(match_code "const_double")
|
||||
{
|
||||
REAL_VALUE_TYPE r;
|
||||
|
||||
if (GET_CODE (op) != CONST_DOUBLE)
|
||||
return 0;
|
||||
REAL_VALUE_FROM_CONST_DOUBLE (r, op);
|
||||
return REAL_VALUES_EQUAL (r, dconst0);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "const_operand"
|
||||
(match_code "const_int,const_double")
|
||||
{
|
||||
switch (mode)
|
||||
{
|
||||
case QFmode:
|
||||
case HFmode:
|
||||
if (GET_CODE (op) != CONST_DOUBLE
|
||||
|| GET_MODE (op) != mode
|
||||
|| GET_MODE_CLASS (mode) != MODE_FLOAT)
|
||||
return 0;
|
||||
|
||||
return c4x_immed_float_p (op);
|
||||
|
||||
#if Pmode != QImode
|
||||
case Pmode:
|
||||
#endif
|
||||
case QImode:
|
||||
if (GET_CODE (op) != CONST_INT
|
||||
|| (GET_MODE (op) != VOIDmode && GET_MODE (op) != mode)
|
||||
|| GET_MODE_CLASS (mode) != MODE_INT)
|
||||
return 0;
|
||||
|
||||
return IS_HIGH_CONST (INTVAL (op)) || IS_INT16_CONST (INTVAL (op));
|
||||
|
||||
case HImode:
|
||||
return 0;
|
||||
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "stik_const_operand"
|
||||
(match_code "const_int")
|
||||
{
|
||||
return c4x_K_constant (op);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "not_const_operand"
|
||||
(match_code "const_int")
|
||||
{
|
||||
return c4x_N_constant (op);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (GET_CODE (op) == SUBREG
|
||||
&& GET_MODE (op) == QFmode)
|
||||
return 0;
|
||||
return register_operand (op, mode);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "reg_or_const_operand"
|
||||
(match_code "reg,subreg,const_int,const_double")
|
||||
{
|
||||
return reg_operand (op, mode) || const_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Extended precision register R0-R1.
|
||||
|
||||
(define_predicate "r0r1_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
return REG_P (op) && IS_R0R1_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; Extended precision register R2-R3.
|
||||
|
||||
(define_predicate "r2r3_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
return REG_P (op) && IS_R2R3_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; Low extended precision register R0-R7.
|
||||
|
||||
(define_predicate "ext_low_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
return REG_P (op) && IS_EXT_LOW_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; Extended precision register.
|
||||
|
||||
(define_predicate "ext_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
if (! REG_P (op))
|
||||
return 0;
|
||||
return IS_EXT_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; Standard precision register.
|
||||
|
||||
(define_predicate "std_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
return REG_P (op) && IS_STD_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; Standard precision or normal register.
|
||||
|
||||
(define_predicate "std_or_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (reload_in_progress)
|
||||
return std_reg_operand (op, mode);
|
||||
return reg_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Address register.
|
||||
|
||||
(define_predicate "addr_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
return c4x_a_register (op);
|
||||
})
|
||||
|
||||
;; Index register.
|
||||
|
||||
(define_predicate "index_reg_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (! reg_operand (op, mode))
|
||||
return 0;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
return c4x_x_register (op);
|
||||
})
|
||||
|
||||
;; DP register.
|
||||
|
||||
(define_predicate "dp_reg_operand"
|
||||
(match_code "reg")
|
||||
{
|
||||
return REG_P (op) && IS_DP_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; SP register.
|
||||
|
||||
(define_predicate "sp_reg_operand"
|
||||
(match_code "reg")
|
||||
{
|
||||
return REG_P (op) && IS_SP_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; ST register.
|
||||
|
||||
(define_predicate "st_reg_operand"
|
||||
(match_code "reg")
|
||||
{
|
||||
return REG_P (op) && IS_ST_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; RC register.
|
||||
|
||||
(define_predicate "rc_reg_operand"
|
||||
(match_code "reg")
|
||||
{
|
||||
return REG_P (op) && IS_RC_OR_PSEUDO_REG (op);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "call_address_operand"
|
||||
(match_code "reg,symbol_ref,label_ref,const")
|
||||
{
|
||||
return (REG_P (op) || symbolic_address_operand (op, mode));
|
||||
})
|
||||
|
||||
;; Check dst operand of a move instruction.
|
||||
|
||||
(define_predicate "dst_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (GET_CODE (op) == SUBREG
|
||||
&& mixed_subreg_operand (op, mode))
|
||||
return 0;
|
||||
|
||||
if (REG_P (op))
|
||||
return reg_operand (op, mode);
|
||||
|
||||
return nonimmediate_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Check src operand of two operand arithmetic instructions.
|
||||
|
||||
(define_predicate "src_operand"
|
||||
(match_code "subreg,reg,mem,const_int,const_double")
|
||||
{
|
||||
if (GET_CODE (op) == SUBREG
|
||||
&& mixed_subreg_operand (op, mode))
|
||||
return 0;
|
||||
|
||||
if (REG_P (op))
|
||||
return reg_operand (op, mode);
|
||||
|
||||
if (mode == VOIDmode)
|
||||
mode = GET_MODE (op);
|
||||
|
||||
if (GET_CODE (op) == CONST_INT)
|
||||
return (mode == QImode || mode == Pmode || mode == HImode)
|
||||
&& c4x_I_constant (op);
|
||||
|
||||
/* We don't like CONST_DOUBLE integers. */
|
||||
if (GET_CODE (op) == CONST_DOUBLE)
|
||||
return c4x_H_constant (op);
|
||||
|
||||
/* Disallow symbolic addresses. Only the predicate
|
||||
symbolic_address_operand will match these. */
|
||||
if (GET_CODE (op) == SYMBOL_REF
|
||||
|| GET_CODE (op) == LABEL_REF
|
||||
|| GET_CODE (op) == CONST)
|
||||
return 0;
|
||||
|
||||
/* If TARGET_LOAD_DIRECT_MEMS is nonzero, disallow direct memory
|
||||
access to symbolic addresses. These operands will get forced
|
||||
into a register and the movqi expander will generate a
|
||||
HIGH/LO_SUM pair if TARGET_EXPOSE_LDP is nonzero. */
|
||||
if (GET_CODE (op) == MEM
|
||||
&& ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
|
||||
|| GET_CODE (XEXP (op, 0)) == LABEL_REF
|
||||
|| GET_CODE (XEXP (op, 0)) == CONST)))
|
||||
return !TARGET_EXPOSE_LDP &&
|
||||
! TARGET_LOAD_DIRECT_MEMS && GET_MODE (op) == mode;
|
||||
|
||||
return general_operand (op, mode);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "src_hi_operand"
|
||||
(match_code "subreg,reg,mem,const_double")
|
||||
{
|
||||
if (c4x_O_constant (op))
|
||||
return 1;
|
||||
return src_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Check src operand of two operand logical instructions.
|
||||
|
||||
(define_predicate "lsrc_operand"
|
||||
(match_code "subreg,reg,mem,const_int,const_double")
|
||||
{
|
||||
if (mode == VOIDmode)
|
||||
mode = GET_MODE (op);
|
||||
|
||||
if (mode != QImode && mode != Pmode)
|
||||
fatal_insn ("mode not QImode", op);
|
||||
|
||||
if (GET_CODE (op) == CONST_INT)
|
||||
return c4x_L_constant (op) || c4x_J_constant (op);
|
||||
|
||||
return src_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Check src operand of two operand tricky instructions.
|
||||
|
||||
(define_predicate "tsrc_operand"
|
||||
(match_code "subreg,reg,mem,const_int,const_double")
|
||||
{
|
||||
if (mode == VOIDmode)
|
||||
mode = GET_MODE (op);
|
||||
|
||||
if (mode != QImode && mode != Pmode)
|
||||
fatal_insn ("mode not QImode", op);
|
||||
|
||||
if (GET_CODE (op) == CONST_INT)
|
||||
return c4x_L_constant (op) || c4x_N_constant (op) || c4x_J_constant (op);
|
||||
|
||||
return src_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Check src operand of two operand non immediate instructions.
|
||||
|
||||
(define_predicate "nonimmediate_src_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)
|
||||
return 0;
|
||||
|
||||
return src_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Check logical src operand of two operand non immediate instructions.
|
||||
|
||||
(define_predicate "nonimmediate_lsrc_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)
|
||||
return 0;
|
||||
|
||||
return lsrc_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Match any operand.
|
||||
|
||||
(define_predicate "any_operand"
|
||||
(match_code "subreg,reg,mem,const_int,const_double")
|
||||
{
|
||||
return 1;
|
||||
})
|
||||
|
||||
;; Check for indirect operands allowable in parallel instruction.
|
||||
|
||||
(define_predicate "par_ind_operand"
|
||||
(match_code "mem")
|
||||
{
|
||||
if (mode != VOIDmode && mode != GET_MODE (op))
|
||||
return 0;
|
||||
|
||||
return c4x_S_indirect (op);
|
||||
})
|
||||
|
||||
;; Check for operands allowable in parallel instruction.
|
||||
|
||||
(define_predicate "parallel_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
return ext_low_reg_operand (op, mode) || par_ind_operand (op, mode);
|
||||
})
|
||||
|
||||
;; Symbolic address operand.
|
||||
|
||||
(define_predicate "symbolic_address_operand"
|
||||
(match_code "symbol_ref,label_ref,const")
|
||||
{
|
||||
switch (GET_CODE (op))
|
||||
{
|
||||
case CONST:
|
||||
case SYMBOL_REF:
|
||||
case LABEL_REF:
|
||||
return 1;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
})
|
||||
|
|
@ -1,28 +0,0 @@
|
|||
/* Definitions of RTEMS executing on an TMS320C[34]x using coff
|
||||
Copyright (C) 1996, 1997, 1999, 2002, 2007 Free Software Foundation, Inc.
|
||||
Contributed by Joel Sherrill (joel@OARcorp.com).
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
/* Specify predefined symbols in preprocessor. */
|
||||
|
||||
#define TARGET_OS_CPP_BUILTINS() \
|
||||
do { \
|
||||
builtin_define ("__rtems__"); \
|
||||
builtin_define ("__USE_INIT_FINI__"); \
|
||||
builtin_assert ("system=rtems"); \
|
||||
} while (0)
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
LIB1ASMSRC = c4x/libgcc.S
|
||||
LIB1ASMFUNCS = _divsf3 _divsi3 _udivsi3 _umodsi3 _modsi3 _mulsi3 \
|
||||
_muldf3 _divdf3 _unsfltconst _unsfltcompare \
|
||||
_muldi3 _umuldi3_high _smuldi3_high _divdi3 _moddi3 _umoddi3 _udivdi3 \
|
||||
_fix_truncsfdi2 _ufix_truncsfdi2 _floatdisf2 _ufloatdisf2 \
|
||||
_floatdidf2 _ufloatdidf2 _fix_truncdfdi2 _ufix_truncdfdi2 _ffs
|
||||
|
||||
TARGET_LIBGCC2_CFLAGS = -Dexit=unused_exit
|
||||
|
||||
c4x-c.o: $(srcdir)/config/c4x/c4x-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
|
||||
$(TM_H) $(TREE_H) toplev.h $(CPPLIB_H) c-pragma.h $(TM_P_H)
|
||||
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/c4x/c4x-c.c
|
||||
|
||||
MULTILIB_OPTIONS = m30 msmall mmemparm
|
||||
MULTILIB_DIRNAMES = c3x small mem
|
||||
MULTILIB_MATCHES = m30=mcpu?30 m30=mcpu?31 m30=mcpu?32 m30=mcpu?33 m30=m31 m30=m32 m30=m33
|
||||
MULTILIB_EXCEPTIONS =
|
||||
MULTILIB_EXTRA_OPTS =
|
||||
LIBGCC = stmp-multilib
|
||||
INSTALL_LIBGCC = install-multilib
|
||||
|
|
@ -1,10 +0,0 @@
|
|||
# Custom RTEMS multilibs
|
||||
|
||||
# We'd actually want to support -msmall, but it trips a bug in gcc
|
||||
# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14436
|
||||
#
|
||||
# MULTILIB_OPTIONS = m30 msmall mmemparm
|
||||
# MULTILIB_DIRNAMES = c3x small mem
|
||||
|
||||
MULTILIB_OPTIONS = m30 mmemparm
|
||||
MULTILIB_DIRNAMES = c3x mem
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/* Definitions of various defaults for tm.h macros.
|
||||
Copyright (C) 1992, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
|
||||
2005, 2007
|
||||
2005, 2007, 2008
|
||||
Free Software Foundation, Inc.
|
||||
Contributed by Ron Guilmette (rfg@monkeys.com)
|
||||
|
||||
|
|
@ -655,7 +655,6 @@ along with GCC; see the file COPYING3. If not see
|
|||
#define UNKNOWN_FLOAT_FORMAT 0
|
||||
#define IEEE_FLOAT_FORMAT 1
|
||||
#define VAX_FLOAT_FORMAT 2
|
||||
#define C4X_FLOAT_FORMAT 3
|
||||
|
||||
/* Default to IEEE float if not specified. Nearly all machines use it. */
|
||||
#ifndef TARGET_FLOAT_FORMAT
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1996, 1998, 1999, 2000,
|
||||
@c 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
|
||||
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1996, 1998, 1999, 2000, 2001,
|
||||
@c 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
|
||||
|
||||
@c This is part of the GCC manual.
|
||||
@c For copying conditions, see the file gcc.texi.
|
||||
|
|
@ -2336,7 +2336,7 @@ This attribute is ignored for R8C target.
|
|||
|
||||
@item interrupt
|
||||
@cindex interrupt handler functions
|
||||
Use this attribute on the ARM, AVR, C4x, CRX, M32C, M32R/D, m68k, MS1,
|
||||
Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MS1,
|
||||
and Xstormy16 ports to indicate that the specified function is an
|
||||
interrupt handler. The compiler will generate function entry and exit
|
||||
sequences suitable for use in an interrupt handler when this attribute
|
||||
|
|
@ -2484,7 +2484,7 @@ defined by shared libraries.
|
|||
|
||||
@item naked
|
||||
@cindex function without a prologue/epilogue code
|
||||
Use this attribute on the ARM, AVR, C4x, IP2K and SPU ports to indicate that
|
||||
Use this attribute on the ARM, AVR, IP2K and SPU ports to indicate that
|
||||
the specified function does not need prologue/epilogue sequences generated by
|
||||
the compiler. It is up to the programmer to provide these sequences.
|
||||
|
||||
|
|
@ -10892,7 +10892,6 @@ Do not apply the @code{longcall} attribute to subsequent function
|
|||
declarations.
|
||||
@end table
|
||||
|
||||
@c Describe c4x pragmas here.
|
||||
@c Describe h8300 pragmas here.
|
||||
@c Describe sh pragmas here.
|
||||
@c Describe v850 pragmas here.
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@
|
|||
@end ifset
|
||||
|
||||
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
|
||||
@c 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
|
||||
@c 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
|
||||
@c *** Converted to texinfo by Dean Wakerley, dean@wakerley.com
|
||||
|
||||
@c IMPORTANT: whenever you modify this file, run `install.texi2html' to
|
||||
|
|
@ -71,7 +71,7 @@
|
|||
@c Part 2 Summary Description and Copyright
|
||||
@copying
|
||||
Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
|
||||
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
|
||||
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
|
||||
@sp 1
|
||||
Permission is granted to copy, distribute and/or modify this document
|
||||
under the terms of the GNU Free Documentation License, Version 1.2 or
|
||||
|
|
@ -2492,8 +2492,6 @@ information are.
|
|||
@item
|
||||
@uref{#bfin,,Blackfin}
|
||||
@item
|
||||
@uref{#c4x,,c4x}
|
||||
@item
|
||||
@uref{#dos,,DOS}
|
||||
@item
|
||||
@uref{#x-x-freebsd,,*-*-freebsd*}
|
||||
|
|
@ -2821,36 +2819,6 @@ See ``Blackfin Options'' in the main manual
|
|||
More information, and a version of binutils with support for this processor,
|
||||
is available at @uref{http://blackfin.uclinux.org}
|
||||
|
||||
@html
|
||||
<hr />
|
||||
@end html
|
||||
@heading @anchor{c4x}c4x
|
||||
|
||||
Texas Instruments TMS320C3x and TMS320C4x Floating Point Digital Signal
|
||||
Processors. These are used in embedded applications. There are no
|
||||
standard Unix configurations.
|
||||
@ifnothtml
|
||||
@xref{TMS320C3x/C4x Options,, TMS320C3x/C4x Options, gcc, Using the
|
||||
GNU Compiler Collection (GCC)},
|
||||
@end ifnothtml
|
||||
@ifhtml
|
||||
See ``TMS320C3x/C4x Options'' in the main manual
|
||||
@end ifhtml
|
||||
for the list of supported MCU types.
|
||||
|
||||
GCC can be configured as a cross compiler for both the C3x and C4x
|
||||
architectures on the same system. Use @samp{configure --target=c4x
|
||||
--enable-languages="c,c++"} to configure.
|
||||
|
||||
|
||||
Further installation notes and other useful information about C4x tools
|
||||
can also be obtained from:
|
||||
|
||||
@itemize @bullet
|
||||
@item
|
||||
@uref{http://www.elec.canterbury.ac.nz/c4x/,,http://www.elec.canterbury.ac.nz/c4x/}
|
||||
@end itemize
|
||||
|
||||
@html
|
||||
<hr />
|
||||
@end html
|
||||
|
|
|
|||
|
|
@ -772,12 +772,6 @@ See RS/6000 and PowerPC Options.
|
|||
@emph{System V Options}
|
||||
@gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}}
|
||||
|
||||
@emph{TMS320C3x/C4x Options}
|
||||
@gccoptlist{-mcpu=@var{cpu} -mbig -msmall -mregparm -mmemparm @gol
|
||||
-mfast-fix -mmpyi -mbk -mti -mdp-isr-reload @gol
|
||||
-mrpts=@var{count} -mrptb -mdb -mloop-unsigned @gol
|
||||
-mparallel-insns -mparallel-mpy -mpreserve-float}
|
||||
|
||||
@emph{V850 Options}
|
||||
@gccoptlist{-mlong-calls -mno-long-calls -mep -mno-ep @gol
|
||||
-mprolog-function -mno-prolog-function -mspace @gol
|
||||
|
|
@ -8257,7 +8251,6 @@ platform.
|
|||
* SPARC Options::
|
||||
* SPU Options::
|
||||
* System V Options::
|
||||
* TMS320C3x/C4x Options::
|
||||
* V850 Options::
|
||||
* VAX Options::
|
||||
* VxWorks Options::
|
||||
|
|
@ -14335,158 +14328,6 @@ The assembler uses this option.
|
|||
@c the generic assembler that comes with Solaris takes just -Ym.
|
||||
@end table
|
||||
|
||||
@node TMS320C3x/C4x Options
|
||||
@subsection TMS320C3x/C4x Options
|
||||
@cindex TMS320C3x/C4x Options
|
||||
|
||||
These @samp{-m} options are defined for TMS320C3x/C4x implementations:
|
||||
|
||||
@table @gcctabopt
|
||||
|
||||
@item -mcpu=@var{cpu_type}
|
||||
@opindex mcpu
|
||||
Set the instruction set, register set, and instruction scheduling
|
||||
parameters for machine type @var{cpu_type}. Supported values for
|
||||
@var{cpu_type} are @samp{c30}, @samp{c31}, @samp{c32}, @samp{c40}, and
|
||||
@samp{c44}. The default is @samp{c40} to generate code for the
|
||||
TMS320C40.
|
||||
|
||||
@item -mbig-memory
|
||||
@itemx -mbig
|
||||
@itemx -msmall-memory
|
||||
@itemx -msmall
|
||||
@opindex mbig-memory
|
||||
@opindex mbig
|
||||
@opindex msmall-memory
|
||||
@opindex msmall
|
||||
Generates code for the big or small memory model. The small memory
|
||||
model assumed that all data fits into one 64K word page. At run-time
|
||||
the data page (DP) register must be set to point to the 64K page
|
||||
containing the .bss and .data program sections. The big memory model is
|
||||
the default and requires reloading of the DP register for every direct
|
||||
memory access.
|
||||
|
||||
@item -mbk
|
||||
@itemx -mno-bk
|
||||
@opindex mbk
|
||||
@opindex mno-bk
|
||||
Allow (disallow) allocation of general integer operands into the block
|
||||
count register BK@.
|
||||
|
||||
@item -mdb
|
||||
@itemx -mno-db
|
||||
@opindex mdb
|
||||
@opindex mno-db
|
||||
Enable (disable) generation of code using decrement and branch,
|
||||
DBcond(D), instructions. This is enabled by default for the C4x. To be
|
||||
on the safe side, this is disabled for the C3x, since the maximum
|
||||
iteration count on the C3x is @math{2^{23} + 1} (but who iterates loops more than
|
||||
@math{2^{23}} times on the C3x?). Note that GCC will try to reverse a loop so
|
||||
that it can utilize the decrement and branch instruction, but will give
|
||||
up if there is more than one memory reference in the loop. Thus a loop
|
||||
where the loop counter is decremented can generate slightly more
|
||||
efficient code, in cases where the RPTB instruction cannot be utilized.
|
||||
|
||||
@item -mdp-isr-reload
|
||||
@itemx -mparanoid
|
||||
@opindex mdp-isr-reload
|
||||
@opindex mparanoid
|
||||
Force the DP register to be saved on entry to an interrupt service
|
||||
routine (ISR), reloaded to point to the data section, and restored on
|
||||
exit from the ISR@. This should not be required unless someone has
|
||||
violated the small memory model by modifying the DP register, say within
|
||||
an object library.
|
||||
|
||||
@item -mmpyi
|
||||
@itemx -mno-mpyi
|
||||
@opindex mmpyi
|
||||
@opindex mno-mpyi
|
||||
For the C3x use the 24-bit MPYI instruction for integer multiplies
|
||||
instead of a library call to guarantee 32-bit results. Note that if one
|
||||
of the operands is a constant, then the multiplication will be performed
|
||||
using shifts and adds. If the @option{-mmpyi} option is not specified for the C3x,
|
||||
then squaring operations are performed inline instead of a library call.
|
||||
|
||||
@item -mfast-fix
|
||||
@itemx -mno-fast-fix
|
||||
@opindex mfast-fix
|
||||
@opindex mno-fast-fix
|
||||
The C3x/C4x FIX instruction to convert a floating point value to an
|
||||
integer value chooses the nearest integer less than or equal to the
|
||||
floating point value rather than to the nearest integer. Thus if the
|
||||
floating point number is negative, the result will be incorrectly
|
||||
truncated an additional code is necessary to detect and correct this
|
||||
case. This option can be used to disable generation of the additional
|
||||
code required to correct the result.
|
||||
|
||||
@item -mrptb
|
||||
@itemx -mno-rptb
|
||||
@opindex mrptb
|
||||
@opindex mno-rptb
|
||||
Enable (disable) generation of repeat block sequences using the RPTB
|
||||
instruction for zero overhead looping. The RPTB construct is only used
|
||||
for innermost loops that do not call functions or jump across the loop
|
||||
boundaries. There is no advantage having nested RPTB loops due to the
|
||||
overhead required to save and restore the RC, RS, and RE registers.
|
||||
This is enabled by default with @option{-O2}.
|
||||
|
||||
@item -mrpts=@var{count}
|
||||
@itemx -mno-rpts
|
||||
@opindex mrpts
|
||||
@opindex mno-rpts
|
||||
Enable (disable) the use of the single instruction repeat instruction
|
||||
RPTS@. If a repeat block contains a single instruction, and the loop
|
||||
count can be guaranteed to be less than the value @var{count}, GCC will
|
||||
emit a RPTS instruction instead of a RPTB@. If no value is specified,
|
||||
then a RPTS will be emitted even if the loop count cannot be determined
|
||||
at compile time. Note that the repeated instruction following RPTS does
|
||||
not have to be reloaded from memory each iteration, thus freeing up the
|
||||
CPU buses for operands. However, since interrupts are blocked by this
|
||||
instruction, it is disabled by default.
|
||||
|
||||
@item -mloop-unsigned
|
||||
@itemx -mno-loop-unsigned
|
||||
@opindex mloop-unsigned
|
||||
@opindex mno-loop-unsigned
|
||||
The maximum iteration count when using RPTS and RPTB (and DB on the C40)
|
||||
is @math{2^{31} + 1} since these instructions test if the iteration count is
|
||||
negative to terminate the loop. If the iteration count is unsigned
|
||||
there is a possibility than the @math{2^{31} + 1} maximum iteration count may be
|
||||
exceeded. This switch allows an unsigned iteration count.
|
||||
|
||||
@item -mti
|
||||
@opindex mti
|
||||
Try to emit an assembler syntax that the TI assembler (asm30) is happy
|
||||
with. This also enforces compatibility with the API employed by the TI
|
||||
C3x C compiler. For example, long doubles are passed as structures
|
||||
rather than in floating point registers.
|
||||
|
||||
@item -mregparm
|
||||
@itemx -mmemparm
|
||||
@opindex mregparm
|
||||
@opindex mmemparm
|
||||
Generate code that uses registers (stack) for passing arguments to functions.
|
||||
By default, arguments are passed in registers where possible rather
|
||||
than by pushing arguments on to the stack.
|
||||
|
||||
@item -mparallel-insns
|
||||
@itemx -mno-parallel-insns
|
||||
@opindex mparallel-insns
|
||||
@opindex mno-parallel-insns
|
||||
Allow the generation of parallel instructions. This is enabled by
|
||||
default with @option{-O2}.
|
||||
|
||||
@item -mparallel-mpy
|
||||
@itemx -mno-parallel-mpy
|
||||
@opindex mparallel-mpy
|
||||
@opindex mno-parallel-mpy
|
||||
Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
|
||||
provided @option{-mparallel-insns} is also specified. These instructions have
|
||||
tight register constraints which can pessimize the code generation
|
||||
of large functions.
|
||||
|
||||
@end table
|
||||
|
||||
@node V850 Options
|
||||
@subsection V850 Options
|
||||
@cindex V850 Options
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1996, 1998, 1999, 2000, 2001,
|
||||
@c 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
|
||||
@c 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
|
||||
@c This is part of the GCC manual.
|
||||
@c For copying conditions, see the file gcc.texi.
|
||||
|
||||
|
|
@ -2847,88 +2847,6 @@ An immediate for the @code{iohl} instruction. const_int is sign extended to 128
|
|||
|
||||
@end table
|
||||
|
||||
@item TMS320C3x/C4x---@file{config/c4x/c4x.h}
|
||||
@table @code
|
||||
@item a
|
||||
Auxiliary (address) register (ar0-ar7)
|
||||
|
||||
@item b
|
||||
Stack pointer register (sp)
|
||||
|
||||
@item c
|
||||
Standard (32-bit) precision integer register
|
||||
|
||||
@item f
|
||||
Extended (40-bit) precision register (r0-r11)
|
||||
|
||||
@item k
|
||||
Block count register (bk)
|
||||
|
||||
@item q
|
||||
Extended (40-bit) precision low register (r0-r7)
|
||||
|
||||
@item t
|
||||
Extended (40-bit) precision register (r0-r1)
|
||||
|
||||
@item u
|
||||
Extended (40-bit) precision register (r2-r3)
|
||||
|
||||
@item v
|
||||
Repeat count register (rc)
|
||||
|
||||
@item x
|
||||
Index register (ir0-ir1)
|
||||
|
||||
@item y
|
||||
Status (condition code) register (st)
|
||||
|
||||
@item z
|
||||
Data page register (dp)
|
||||
|
||||
@item G
|
||||
Floating-point zero
|
||||
|
||||
@item H
|
||||
Immediate 16-bit floating-point constant
|
||||
|
||||
@item I
|
||||
Signed 16-bit constant
|
||||
|
||||
@item J
|
||||
Signed 8-bit constant
|
||||
|
||||
@item K
|
||||
Signed 5-bit constant
|
||||
|
||||
@item L
|
||||
Unsigned 16-bit constant
|
||||
|
||||
@item M
|
||||
Unsigned 8-bit constant
|
||||
|
||||
@item N
|
||||
Ones complement of unsigned 16-bit constant
|
||||
|
||||
@item O
|
||||
High 16-bit constant (32-bit constant with 16 LSBs zero)
|
||||
|
||||
@item Q
|
||||
Indirect memory reference with signed 8-bit or index register displacement
|
||||
|
||||
@item R
|
||||
Indirect memory reference with unsigned 5-bit displacement
|
||||
|
||||
@item S
|
||||
Indirect memory reference with 1 bit or index register displacement
|
||||
|
||||
@item T
|
||||
Direct memory reference
|
||||
|
||||
@item U
|
||||
Symbolic address
|
||||
|
||||
@end table
|
||||
|
||||
@item S/390 and zSeries---@file{config/s390/s390.h}
|
||||
@table @code
|
||||
@item a
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
@c Copyright (C) 1988,1989,1992,1993,1994,1995,1996,1997,1998,1999,2000,2001,
|
||||
@c 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
|
||||
@c 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
|
||||
@c This is part of the GCC manual.
|
||||
@c For copying conditions, see the file gcc.texi.
|
||||
|
||||
|
|
@ -1288,9 +1288,7 @@ mode, otherwise @var{mode} is VOIDmode. @var{mode} is provided in the
|
|||
case where structures of one field would require the structure's mode to
|
||||
retain the field's mode.
|
||||
|
||||
Normally, this is not needed. See the file @file{c4x.h} for an example
|
||||
of how to use this macro to prevent a structure having a floating point
|
||||
field from being accessed in an integer mode.
|
||||
Normally, this is not needed.
|
||||
@end defmac
|
||||
|
||||
@defmac ROUND_TYPE_ALIGN (@var{type}, @var{computed}, @var{specified})
|
||||
|
|
@ -1351,7 +1349,7 @@ targets.
|
|||
|
||||
@defmac TARGET_FLOAT_FORMAT
|
||||
A code distinguishing the floating point format of the target machine.
|
||||
There are four defined values:
|
||||
There are two defined values:
|
||||
|
||||
@ftable @code
|
||||
@item IEEE_FLOAT_FORMAT
|
||||
|
|
@ -1361,9 +1359,6 @@ need to define @code{TARGET_FLOAT_FORMAT} when the format is IEEE@.
|
|||
@item VAX_FLOAT_FORMAT
|
||||
This code indicates the ``F float'' (for @code{float}) and ``D float''
|
||||
or ``G float'' formats (for @code{double}) used on the VAX and PDP-11@.
|
||||
|
||||
@item C4X_FLOAT_FORMAT
|
||||
This code indicates the format used on the TMS320C3x/C4x.
|
||||
@end ftable
|
||||
|
||||
If your target uses a floating point format other than these, you must
|
||||
|
|
@ -9807,9 +9802,6 @@ arguments of pragmas registered with
|
|||
@code{c_register_pragma_with_expansion} but not on the arguments of
|
||||
pragmas registered with @code{c_register_pragma}.
|
||||
|
||||
For an example use of this routine, see @file{c4x.h} and the callback
|
||||
routines defined in @file{c4x-c.c}.
|
||||
|
||||
Note that the use of @code{pragma_lex} is specific to the C and C++
|
||||
compilers. It will not work in the Java or Fortran compilers, or any
|
||||
other language compilers for that matter. Thus if @code{pragma_lex} is going
|
||||
|
|
|
|||
231
gcc/real.c
231
gcc/real.c
|
|
@ -1,6 +1,6 @@
|
|||
/* real.c - software floating point emulation.
|
||||
Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999,
|
||||
2000, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
|
||||
2000, 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
|
||||
Contributed by Stephen L. Moshier (moshier@world.std.com).
|
||||
Re-written by Richard Henderson <rth@redhat.com>
|
||||
|
||||
|
|
@ -4278,235 +4278,6 @@ const struct real_format decimal_quad_format =
|
|||
false
|
||||
};
|
||||
|
||||
/* The "twos-complement" c4x format is officially defined as
|
||||
|
||||
x = s(~s).f * 2**e
|
||||
|
||||
This is rather misleading. One must remember that F is signed.
|
||||
A better description would be
|
||||
|
||||
x = -1**s * ((s + 1 + .f) * 2**e
|
||||
|
||||
So if we have a (4 bit) fraction of .1000 with a sign bit of 1,
|
||||
that's -1 * (1+1+(-.5)) == -1.5. I think.
|
||||
|
||||
The constructions here are taken from Tables 5-1 and 5-2 of the
|
||||
TMS320C4x User's Guide wherein step-by-step instructions for
|
||||
conversion from IEEE are presented. That's close enough to our
|
||||
internal representation so as to make things easy.
|
||||
|
||||
See http://www-s.ti.com/sc/psheets/spru063c/spru063c.pdf */
|
||||
|
||||
static void encode_c4x_single (const struct real_format *fmt,
|
||||
long *, const REAL_VALUE_TYPE *);
|
||||
static void decode_c4x_single (const struct real_format *,
|
||||
REAL_VALUE_TYPE *, const long *);
|
||||
static void encode_c4x_extended (const struct real_format *fmt,
|
||||
long *, const REAL_VALUE_TYPE *);
|
||||
static void decode_c4x_extended (const struct real_format *,
|
||||
REAL_VALUE_TYPE *, const long *);
|
||||
|
||||
static void
|
||||
encode_c4x_single (const struct real_format *fmt ATTRIBUTE_UNUSED,
|
||||
long *buf, const REAL_VALUE_TYPE *r)
|
||||
{
|
||||
unsigned long image, exp, sig;
|
||||
|
||||
switch (r->cl)
|
||||
{
|
||||
case rvc_zero:
|
||||
exp = -128;
|
||||
sig = 0;
|
||||
break;
|
||||
|
||||
case rvc_inf:
|
||||
case rvc_nan:
|
||||
exp = 127;
|
||||
sig = 0x800000 - r->sign;
|
||||
break;
|
||||
|
||||
case rvc_normal:
|
||||
exp = REAL_EXP (r) - 1;
|
||||
sig = (r->sig[SIGSZ-1] >> (HOST_BITS_PER_LONG - 24)) & 0x7fffff;
|
||||
if (r->sign)
|
||||
{
|
||||
if (sig)
|
||||
sig = -sig;
|
||||
else
|
||||
exp--;
|
||||
sig |= 0x800000;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
|
||||
image = ((exp & 0xff) << 24) | (sig & 0xffffff);
|
||||
buf[0] = image;
|
||||
}
|
||||
|
||||
static void
|
||||
decode_c4x_single (const struct real_format *fmt ATTRIBUTE_UNUSED,
|
||||
REAL_VALUE_TYPE *r, const long *buf)
|
||||
{
|
||||
unsigned long image = buf[0];
|
||||
unsigned long sig;
|
||||
int exp, sf;
|
||||
|
||||
exp = (((image >> 24) & 0xff) ^ 0x80) - 0x80;
|
||||
sf = ((image & 0xffffff) ^ 0x800000) - 0x800000;
|
||||
|
||||
memset (r, 0, sizeof (*r));
|
||||
|
||||
if (exp != -128)
|
||||
{
|
||||
r->cl = rvc_normal;
|
||||
|
||||
sig = sf & 0x7fffff;
|
||||
if (sf < 0)
|
||||
{
|
||||
r->sign = 1;
|
||||
if (sig)
|
||||
sig = -sig;
|
||||
else
|
||||
exp++;
|
||||
}
|
||||
sig = (sig << (HOST_BITS_PER_LONG - 24)) | SIG_MSB;
|
||||
|
||||
SET_REAL_EXP (r, exp + 1);
|
||||
r->sig[SIGSZ-1] = sig;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
encode_c4x_extended (const struct real_format *fmt ATTRIBUTE_UNUSED,
|
||||
long *buf, const REAL_VALUE_TYPE *r)
|
||||
{
|
||||
unsigned long exp, sig;
|
||||
|
||||
switch (r->cl)
|
||||
{
|
||||
case rvc_zero:
|
||||
exp = -128;
|
||||
sig = 0;
|
||||
break;
|
||||
|
||||
case rvc_inf:
|
||||
case rvc_nan:
|
||||
exp = 127;
|
||||
sig = 0x80000000 - r->sign;
|
||||
break;
|
||||
|
||||
case rvc_normal:
|
||||
exp = REAL_EXP (r) - 1;
|
||||
|
||||
sig = r->sig[SIGSZ-1];
|
||||
if (HOST_BITS_PER_LONG == 64)
|
||||
sig = sig >> 1 >> 31;
|
||||
sig &= 0x7fffffff;
|
||||
|
||||
if (r->sign)
|
||||
{
|
||||
if (sig)
|
||||
sig = -sig;
|
||||
else
|
||||
exp--;
|
||||
sig |= 0x80000000;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
|
||||
exp = (exp & 0xff) << 24;
|
||||
sig &= 0xffffffff;
|
||||
|
||||
if (FLOAT_WORDS_BIG_ENDIAN)
|
||||
buf[0] = exp, buf[1] = sig;
|
||||
else
|
||||
buf[0] = sig, buf[0] = exp;
|
||||
}
|
||||
|
||||
static void
|
||||
decode_c4x_extended (const struct real_format *fmt ATTRIBUTE_UNUSED,
|
||||
REAL_VALUE_TYPE *r, const long *buf)
|
||||
{
|
||||
unsigned long sig;
|
||||
int exp, sf;
|
||||
|
||||
if (FLOAT_WORDS_BIG_ENDIAN)
|
||||
exp = buf[0], sf = buf[1];
|
||||
else
|
||||
sf = buf[0], exp = buf[1];
|
||||
|
||||
exp = (((exp >> 24) & 0xff) & 0x80) - 0x80;
|
||||
sf = ((sf & 0xffffffff) ^ 0x80000000) - 0x80000000;
|
||||
|
||||
memset (r, 0, sizeof (*r));
|
||||
|
||||
if (exp != -128)
|
||||
{
|
||||
r->cl = rvc_normal;
|
||||
|
||||
sig = sf & 0x7fffffff;
|
||||
if (sf < 0)
|
||||
{
|
||||
r->sign = 1;
|
||||
if (sig)
|
||||
sig = -sig;
|
||||
else
|
||||
exp++;
|
||||
}
|
||||
if (HOST_BITS_PER_LONG == 64)
|
||||
sig = sig << 1 << 31;
|
||||
sig |= SIG_MSB;
|
||||
|
||||
SET_REAL_EXP (r, exp + 1);
|
||||
r->sig[SIGSZ-1] = sig;
|
||||
}
|
||||
}
|
||||
|
||||
const struct real_format c4x_single_format =
|
||||
{
|
||||
encode_c4x_single,
|
||||
decode_c4x_single,
|
||||
2,
|
||||
24,
|
||||
24,
|
||||
-126,
|
||||
128,
|
||||
23,
|
||||
-1,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false
|
||||
};
|
||||
|
||||
const struct real_format c4x_extended_format =
|
||||
{
|
||||
encode_c4x_extended,
|
||||
decode_c4x_extended,
|
||||
2,
|
||||
32,
|
||||
32,
|
||||
-126,
|
||||
128,
|
||||
31,
|
||||
-1,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false
|
||||
};
|
||||
|
||||
|
||||
/* A synthetic "format" for internal arithmetic. It's the size of the
|
||||
internal significand minus the two bits needed for proper rounding.
|
||||
The encode and decode routines exist only to satisfy our paranoia
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/* Definitions of floating-point access for GNU compiler.
|
||||
Copyright (C) 1989, 1991, 1994, 1996, 1997, 1998, 1999,
|
||||
2000, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
|
||||
2000, 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
|
|
@ -271,8 +271,6 @@ extern const struct real_format mips_quad_format;
|
|||
extern const struct real_format vax_f_format;
|
||||
extern const struct real_format vax_d_format;
|
||||
extern const struct real_format vax_g_format;
|
||||
extern const struct real_format c4x_single_format;
|
||||
extern const struct real_format c4x_extended_format;
|
||||
extern const struct real_format real_internal_format;
|
||||
extern const struct real_format decimal_single_format;
|
||||
extern const struct real_format decimal_double_format;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2008-01-25 Joseph Myers <joseph@codesourcery.com>
|
||||
|
||||
* gcc.dg/builtin-inf-1.c, gcc.dg/compare6.c, gcc.dg/sibcall-3.c,
|
||||
gcc.dg/sibcall-4.c, gcc.dg/torture/builtin-attr-1.c: Don't handle
|
||||
c4x-*-* targets.
|
||||
|
||||
2008-01-25 Richard Guenther <rguenther@suse.de>
|
||||
|
||||
PR middle-end/32244
|
||||
|
|
|
|||
|
|
@ -8,6 +8,6 @@ float fh = __builtin_huge_valf();
|
|||
double dh = __builtin_huge_val();
|
||||
long double lh = __builtin_huge_vall();
|
||||
|
||||
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* } 3 } */
|
||||
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* } 4 } */
|
||||
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* } 5 } */
|
||||
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* } 3 } */
|
||||
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* } 4 } */
|
||||
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* } 5 } */
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
/* PR c/2098 */
|
||||
/* Test for a warning on comparison on out-of-range data. */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-xfail-if "" { c4x-*-* } { "*" } { "" } } */
|
||||
/* { dg-options "-Wtype-limits" } */
|
||||
|
||||
signed char sc;
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
Copyright (C) 2002 Free Software Foundation Inc.
|
||||
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
|
||||
|
||||
/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
|
||||
/* { dg-do run { xfail arc-*-* avr-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
|
||||
/* -mlongcall disables sibcall patterns. */
|
||||
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
|
||||
/* { dg-options "-O2 -foptimize-sibling-calls" } */
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
Copyright (C) 2002 Free Software Foundation Inc.
|
||||
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
|
||||
|
||||
/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
|
||||
/* { dg-do run { xfail arc-*-* avr-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
|
||||
/* -mlongcall disables sibcall patterns. */
|
||||
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
|
||||
/* { dg-options "-O2 -foptimize-sibling-calls" } */
|
||||
|
|
|
|||
|
|
@ -339,7 +339,7 @@ FPTEST2 (fmod)
|
|||
BUILTIN_FPTEST0 (huge_val)
|
||||
FPTEST2 (hypot)
|
||||
FPTEST1T (ilogb, int)
|
||||
BUILTIN_FPTEST0 (inf) /* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* pdp11-*-* spu-*-* } } */
|
||||
BUILTIN_FPTEST0 (inf) /* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* pdp11-*-* spu-*-* } } */
|
||||
FPTEST1 (j0)
|
||||
FPTEST1 (j1)
|
||||
FPTEST2ARG1 (jn, int)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2008-01-25 Joseph Myers <joseph@codesourcery.com>
|
||||
|
||||
* config.host (tic4x-*-*, c4x-*-rtems*, tic4x-*-rtems*, c4x-*,
|
||||
tic4x-*, h8300-*-rtemscoff*, ns32k-*-netbsdelf*, ns32k-*-netbsd*,
|
||||
sh-*-rtemscoff*): Remove cases.
|
||||
|
||||
2007-12-27 Richard Sandiford <rsandifo@nildram.co.uk>
|
||||
|
||||
* Makefile.in (all): Use install-leaf rather than install.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# libgcc host-specific configuration file.
|
||||
# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
|
||||
# Free Software Foundation, Inc.
|
||||
# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
|
||||
# 2008 Free Software Foundation, Inc.
|
||||
|
||||
#This file is part of GCC.
|
||||
|
||||
|
|
@ -137,9 +137,6 @@ s390*-*-*)
|
|||
sh[123456789lbe]*-*-*)
|
||||
cpu_type=sh
|
||||
;;
|
||||
tic4x-*-*)
|
||||
cpu_type=c4x
|
||||
;;
|
||||
esac
|
||||
|
||||
# Common parts for widely ported systems.
|
||||
|
|
@ -258,10 +255,6 @@ bfin*-linux-uclibc*)
|
|||
;;
|
||||
bfin*-*)
|
||||
;;
|
||||
c4x-*-rtems* | tic4x-*-rtems*)
|
||||
;;
|
||||
c4x-* | tic4x-*)
|
||||
;;
|
||||
cris-*-aout)
|
||||
;;
|
||||
crisv32-*-elf | crisv32-*-none | cris-*-elf | cris-*-none)
|
||||
|
|
@ -279,8 +272,6 @@ frv-*-elf)
|
|||
;;
|
||||
frv-*-*linux*)
|
||||
;;
|
||||
h8300-*-rtemscoff*)
|
||||
;;
|
||||
h8300-*-rtems*)
|
||||
;;
|
||||
h8300-*-elf*)
|
||||
|
|
@ -473,11 +464,6 @@ mn10300-*-*)
|
|||
;;
|
||||
mt-*-elf)
|
||||
;;
|
||||
ns32k-*-netbsdelf*)
|
||||
echo "GCC does not yet support the ${host} target"; exit 1
|
||||
;;
|
||||
ns32k-*-netbsd*)
|
||||
;;
|
||||
pdp11-*-bsd)
|
||||
;;
|
||||
pdp11-*-*)
|
||||
|
|
@ -574,8 +560,6 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
|
|||
;;
|
||||
esac
|
||||
;;
|
||||
sh-*-rtemscoff*)
|
||||
;;
|
||||
sh-*-rtems*)
|
||||
;;
|
||||
sh-wrs-vxworks)
|
||||
|
|
|
|||
Loading…
Reference in New Issue